Power Semiconductor Devices
UCF
Power Diode
UCF
Ideal Power Diode
UCF
PNPN Diode
Holding current
Breakover voltage
UCF
DIAC (or PNPNP Diode)
 Behave like two PNPN diodes connecting back to back
 Can conduct in either direction
UCF
Silicon Controlled Rectifier (SCR) or Thyristor
UCF
Ideal SCR (1)
UCF
Ideal SCR (2)
UCF
TRIAC
like two SCRs connect back to back sharing a common gate
UCF
Ideal TRIAC (1)
UCF
Ideal TRIAC (2)
UCF
Power MOSFET (1)
UCF
Power MOSFET (2)
UCF
IGBT (1)
Insulated Gate Bipolar Transistor
UCF
IGBT (2)
AVAILABLE SEMICONDUCTOR SWITCHING DEVICES
In this section, the emphasis will be on the i-v switching characteristics of devices and
their corresponding power ratings and possible applications. Selecting the most appropriate device for a given application is not an easy task, requiring knowledge about the device's characteristics and unique features, innovation, and engineering design experience.
Unlike low-power (signal) devices, power devices are more complicated in structure,
driver design, and operational i-v characteristics. This knowledge is very important for
enabling power electronics engineers to design circuits that will make these devices close
to ideal. In this section, we will briefly discuss two broad families of power devices:
Bipolar and Unipolar Devices
1. Power diodes
2. Bipolar junction transistors
3. Insulated gate bipolar transistors (IGBTs)
4. Metal oxide semiconductor field-effect transistors (MOSFETs)
38
Chapter 2
Review of Switching Concepts and Power Semiconductor Devices
type oc 61:
50 nsaodS
ing of3 tv
Thyristor-Based Devices
1.
2.
3.
4.
Silicon-controlled rectifiers (SCRs)
Gate tum-off {GTO) thyristors
Triode ac switches (triacs)
Static induction transistors (SITs) and thyristors (SITHs)
5. MOS-controlled thyristors (MCTs)
2.5.1
Bipolar and Unipolar Devices
The Power Diode
The power diode is a two-terminal device composed of a pn junction and whose tumon state cannot be controlled (uncontrolled switch). The diode tum-on and tum-off is
decided by the external circuitry: A positive voltage imposed across it will tum it on
and a negative current through it turns it off.
The symbol and the practical and ideal i-v characteristic curves of the power diode
are shown in Fig. 2.8(a), (b), and (c), respectively. In the conduction state, the forward
voltage drop, ~, is typically 1 V or less. The diode current increases exponentially with
the voltage across it; i.e., a small increase in ~ produces a large increase in IF (see Problem 2.5). In the reverse-bias region, the device is in the off state and only a reverse saturation current, Is, exists in the diode (also known as leakage current). The breakdown
voltage, V8 R, is the maximum inverse voltage the diode is capable of blocking. V8 R is a
diode-rated parameter with values up to a few kilovolts, and in normal operation the
reverse voltage should not reach V8 R. Zener diodes are special diodes in which the breakdown voltage is approximately 6-12 V, controlled by the doping process.
In power circuits, power diodes have two important features:
1. Power-handling capabilities, including forward current carrying and reverse
voltage blocking
2. Reverse recovery time {trr) at tum-off
2. The Scball
a lowerilr
bipolar dial
carriers., 6
Finally.*=
teristics •
fewerc:a:e
rily geDCII
cuit, it is•
To study tbcJ
of Fig. 2.9(a). wli
Fig. 2.9(b). Forsi
normally en~
either a BIT oral
current I 0. At I
input voltage Viii
since tum-on .-1!
ward conductical
diode voltage &I
transient voltaF
why during
is in the steady a
since significallll
As shownia
its forward vablc,
reaches a negalit
=
the•
whichthec~
The parameter trr is very significant because the speed of turning off the diode could
be large enough to affect the operation of the circuit. At tum-on, the delay time is normally insignificant compared to the transient time in power electronic circuits.
Broadly speaking, two types of power diodes are available:
1. The bipolar diode, which is based on the pn semiconductor junction. Depending on the applications, a bipolar diode can be either the standard line-frequency
broken down • j
forward volfaF i
stant and is dell:ll
ample, since dlr:
parasitic induclll
turning off by~
....
On
+
Off
M
W
~
Figure 2.8 Power diode. (a) Circuit symbol. (b) Practical and (c) ideal switching characteristics.
Figure 2.9 Typil
at t = t0 . (b) DiD
I
2.5
Available Semiconductor Switching Devices
39
type or the fast-recovery high-frequency type, with its trr varying between
50 ns and 50 JJ-S. Typical voltage drop is 0.7-1.3 V, with reverse voltage blocking of3 kV and forward current of3.5 kA.
2. The Schottky diode, which is based on the metal-semiconductor junction. It has
a lower forward voltage drop than the bipolar (about 0.5 V or less). Unlike the
bipolar diode, whose current conduction depends on the minority and majority
carriers, the Schottky diode current depends mainly on the majority carriers.
Finally, the i-v characteristics of the Schottky diode are similar to the i-v characteristics of the bipolar diode. Unlike bipolar diodes, Schottky diodes generate
fewer excess minority carriers than majority carriers; hence its current is primarily generated due to the drift of majority carriers. Due to its large-leakage circuit, it is normally used in low-voltage, high-current de power supplies.
To study the reverse recovery characteristics of the diode, we consider the circuit
ofFig. 2.9(a), which has a typical diode current waveform during tum-off as shown in
Fig. 2.9(b). For simplicity we assume the switch is ideal. Such a circuit arrangement is
normally encountered in switch-mode de-to-de converters with the switch replaced by
either a BJT or a MOSFET. Initially we assume the diode is conducting with forward
current / 0 . At t = t0 , the switch is turned on, forcing the diode to tum off due to the de
input voltage fin· The tum-on characteristics of the diode are simpler to deal with
since tum-on only involves charging the diode depletion capacitor. The diode's forward conduction begins when its depletion capacitor has been charged. At tum-on, the
diode voltage drop is larger than the normal forward drop during conduction. This
transient voltage exists due to the large value of diode resistance at tum-on. This is
why during the diode's tum-on time the power dissipation is much larger than when it
is in the steady conduction state. The diode tum-off characteristics are more complex
since significant stored charges exist in the body of the pn junction and at the junction.
As shown in Fig. 2.9(b), during tum-off, the diode current linearly decreases from
its forward value, / 0 , at t = t0 to zero at t = t 1 and then continues to go negative until it
reaches a negative peak value at t = t2, known as the reverse recovery current, /RR• at
which the current starts to rise exponentially to zero at t = t3• The time intervals can be
broken down as follows: Between t0 and t 1, the diode current is positive and the diode
forward voltage is small. Hence, we assume the rate of change of diode current is constant and is determined by the total circuit inductance in series with the diode. In our example, since the switch is ideal, di 0 / dt and /RR are limited by the diode's and lead's
parasitic inductances. At t = t 1, the current becomes zero and the diode should begin
turning offby supporting reverse voltage. But because of the excess minority carriers.in
io
r=ro
Io 1-----.
Io
Non-ideal
tum-off
/V'
to tu
I
I
I
-------;-
~~-----~
lrr
(a)
(b)
Figure 2.9 Typical diode switching characteristics. (a) Switching circuit with S closed
at t = t0 . (b) Diode current.
40
Chapter 2
Review of Switching Concepts and Power Semiconductor Devices
the pn junction that need to be removed before the diode's reverse voltage begins to rise,
the diode remains in the conduction state for longer time, i.e., until t = t2 •
The delay from t 1 to t2 is due to the minority carriers in the depletion region,
whereas the delay from t2 to t3 is caused by the charge stored in the bulk of the semiconductor material. At t = t3, all charge carriers are removed, causing the device to be
fully switched off. The time it takes from the moment the diode current becomes negative until it becomes zero is the reverse recovery time, tmas shown in Fig. 2.9(b).
Between t2 and t3, the junction behaves like a capacitor whose voltage goes from
zero to the reverse voltage via a charging current in this interval. The total charge
carriers that cause a negative diode current flow when it is turned off constitute the
reverse recovery charge, Qm and can be expressed in terms of /RR and trr.
The time between t 2 and t3 may be very short compared to tm resulting in high
di I dt. The ratio between (t 3 - t2 ) and trr is a parameter that defines what is known as
diode snappiness. The smaller this ratio, the quicker the diode recovers its reverse
blocking voltage, resulting in what is known as a fast-recovery or hard-recovery diode.
Meanwhile, a diode with a high ratio of (t3 - t2) to trr takes a relatively long time to
bring its forward current to zero from its negative peak value. These diodes are known
as soft-recovery diodes. The fast-recovery diodes have high di I dt and normally experience oscillation at turn-off. Standard or general-purpose diodes have soft recovery time
and are used in low-speed applications where the frequency is less than a few kHz.
In general, an attempt to reduce either trr or JRR will result in an increase in the
other. The forward recovery voltage limits the efficiency because of device stresses
and higher switching losses, and trr limits the frequency of operation. Power electronics engineers should keep in mind that the transient voltage at tum-on and the transient current at tum-off might affect the external circuitry and cause unwanted
stresses. External snubber circuits are added to suppress these transient values.
.-\1 t
= t.
tbediodcc
~
:\t this poilll die . .
renl
.._.a
/IT Siacc - .
l·,.r,.,lL, ..
IIJUSl be added--
AIIolla".....-
a..TCOI~ . . . t
The pea ...
less m.a. cqllll . .
CXli]IOCICIICdaolk6
n:cO\"Cn tim:.de COll"-e:nas. ....
THBipelar.._
The scbemalic li
lBJT) are sa-a
EXAMPLE2.4
Consider the switching circuit shown in Fig. 2.10 by modeling the circuit parasitic inductance
as a lumped discrete value, L 5 • Assume the switch was open for a long time before being turned
on at t = t0 • Assume the same diode switching characteristics of Fig. 2.9(b), except that it is a
fast-recovery diode with t3 - t2 ""0. Derive the expressions for /RR and the peak switch current
in terms of the diode reverse recovery time.
SOLUTION While the diode is in the conduction state, its forward current is / 0 • When the switch is
closed at t = t0 , the diode voltage remains zero and its current is given by
terminal
~;a:
drawback is 6c •
lJnlikedlcSI
BITs ba"'e twoti
blocking voiiiF
011 state. BJT ...
suggest dull • •
Because1
smaller fJ.r....-.
and i5 fort 2: /0 is given by
is{t)
v.
= Lm(t- to)
to ~ I~ t2
s
,
~;tcbing spcllt:t
•
collector-emilll::r
largely by tbc a
known asao . .
uansistor is.. Fa-
current I 8 , tbc:a,
tr.msistor ~
~..1f111311~. tbdiall
Io
~·-=ebias~
Figure 2.10 Diode switching circuit
with parasitic inductor.
pb._~""DOO
caall
}!i._- is dcfinoll•
-----------".
2.5
:\t
1
=
11
Available Semiconductor Switching Devices
the diode current becomes zero and is becomes I 0 . Hence, the interval
by
11 -
41
t0 is given
vin
IRR = -lrr
Ls
The peak switch current occurs at t
= 12 when iD = -IRR and is given by
v
I s,peak = _!!!.t
L rr +I0
s
:\t this point the diode is turned off and the peak inductor current is higher than the load current I 0 . Since the load is highly inductive, its value cannot increase suddenly by the amount
Jintrr/ Ls without creating high reverse voltage across the diode. As a result, a snubber circuit
must be added across the diode to dissipate excess stored energy in the inductor.
Another important point is that when L 5 becomes very small, a very large reverse recovery
current occurs that could damage the diode and cause large switching losses.
The peak value of the reverse current, -IRR• is a very important parameter and it can be
less than, equal to, or larger than the forward current I 0 , depending on the external circuitry
connected to the diode, and the diode parasitic inductance. The fast-recovery diodes have low
recovery time, nonnally less than 50 ns, and are used in applications such as high-frequency dede converters, where the speed of recovery is critical.
The Bipolar Junction Transistors (BJT)
The schematic symbol and i-v characteristics for the bipolar junction transistors
(BJT) are shown in Fig. 2.ll(a), (b), and (c), respectively. It is a two-junction, threeterminal device with the minority carriers being the main conducting charges. The
switching speed of the BJT is much faster than that of thyristor-type devices. A major
drawback is the second breakdown problem. 2
Unlike the SCR, the BJT is turned on by constantly applying a base signal. Power
BJTs have two different properties from the low-power BJT and logic transistor: large
blocking voltage in the off state and high forward current-carrying capabilities in the
on state. BJT power ratings reach up to 1200 V and 500 A. These high rating values
suggest that the power BJT's driving circuits are more complicated.
Because the BJT is a current-driven device, the larger the base current, the
smaller f3rorcel and the deeper the transistor is driven into saturation. In saturation, the
collector-emitter voltage is almost constant and the collector current is determined
largely by the external circuit to the switch. It is sometimes useful to define what is
known as an overdrive factor, which gives a measure to how deep in saturation the
transistor is. For example, if the transistor is at the edge of saturation with given base
current 18 , then with an overdrive factor of 10 the base current becomes 1018 and the
transistor becomes deeper in saturation.
::--:ormally, the first breakdown voltage refers to the avalanche breakdown caused by the increase in the
reverse bias voltage, which can be nondestructive. The second breakdown voltage is a destructive
phenomenon caused by localized overheating spots in the device.
3
f3rorccd is defined as the ratio I c I / 8 when the transistor is operating in the saturation mode.
I
f
~l
42
Chapter 2
Review of Switching Concepts and Power Semiconductor Devices
ie
+
On state
veE
Off state
-----4~----~--------.veE
(a)
(b)
ie
Saturation (on state)
,;V ,il_- - - - Active region
Increasing
base
current
r
(c)
Figure 2.11 BJT switching characteristics. (a) npn transistor. (b) Ideal i-v
characteristics. (c) Practical i-v characteristics.
Since the base thickness is inversely proportional to the current gain {3, Darlingtonconnected BIT pairs have been developed in which the collectors of two devices are
joined and the base of the first is connected to the emitter of the second, as shown in
Fig. 2.12. This arrangement results in an overall gain that approximately equals the product of the individual {3's of the two transistors. Transistor Q1 serves as an auxiliary transistor, which provides the base current necessary to tum on Q2• Because there is a high
current gain, a smaller base current to Q2 is needed to drive the power Darlington pair.
Darlington power transistors are widely used in UPSs and various ac and de motor drives
up to hundreds of kilowatts and tens of kilohertz. A modern Darlington pair has ratings
up to 1.2 kV with current up to 800 A and operating frequency up to several kilohertz.
Triple Darlingtons are also available, in which the current gain becomes proportional to the product of the three individual currents gains of the transistors. To turn
off the Darlington switch, all base currents must become zero, resulting in slower
switching speed compared to a single transistor. Also, the overall collector-emitter
saturation voltage, VeE sat is higher than for a single transistor, as will be illustrated in
Exercise 2.5.
'
2.5
Available Semiconductor Switching Devices
43
Figure 2.12 Darlington-connected BJT.
There are three regions of operation: saturation, active, and cutoff. As a power
S'o\itch, the BJT must operate either in the saturation region (on state) or in the cutoff
region (off state). The third state is when the transistor is in the linear region and is
:lSed as an analog amplifier.
To investigate the tum-on and tum-off processes, we consider a simple inverter
.:ircuit shown in Fig. 2.13(a) with its switching waveforms as shown in Fig. 2.13(b).
Tlk: voltage v1 is the base driving voltage with positive polarity, V1, to push positive
.current into the base, I 81 = (V1 - V8 E) I R 8 , and a negative polarity, V2 , to quickly dis.:barge the base current, 182 = -(V2 + VBE) I R 8 . At time t = t0 , V1 is applied with
positive de voltage, +V1• Because it takes time to charge the internal depletion capacillor to tum the junction on at V8 E = 0.7 V, a delay time, td, elapses before the colleclL"'f" current starts flowing. After the junction is turned on, the collector starts flowing
exponentially through R8 and the emitter-base junction capacitor. During this period,
1lhe minority carriers are being stored in the transistor base region. The collector curl:'Clt increases until it reaches its maximum saturated value, /on• determined by
_
/on-
~n- VcE,sat
R
The time it takes for the collector current to rise from 10% to 90% of its maxivalue, /on• is called the rise time. For simplicity, Fig. 2.13(b) shows the rise time
itm Ic = 0 to / 00 • The total switching on time is given by ton = td + tr- To tum off
die transistor, a negative (or zero) base voltage is normally applied, resulting in a base
arrent 182 being pulled out of the base as shown in Fig. 2.13(b). The collector current
Jbes not start decreasing until sometime later after the stored saturation charge in the
'htie bas been removed. This time is called the storage time, ts; it is normally longer
6aJ rbe delay time, td, and usually determines the limiting range of the switching
~ If the base voltage is not negative (i.e., in the absence of 182 ), the entire base
'ewtmt must be removed through the process of recombination.
To tum on the BJT, a large current must be pushed to the base. This base current
1&11& be large enough to saturate the transistor. In the saturation region, both baseCIIIlllfier and base-collector junctions are forward biased. This is why the BJT is known
a a current-driven device. When it is operated in the saturation region, 18 > lei {3,
wilcre 13 is the de current gain. In this region a new de current gain 13 is defined to
IDiiicate the depth of the transistor saturation. The saturation collector-emitter voltage
• P'·en as VCE sat• and f3rorced is defined as
Dllm
Ic
f3rorced
=IB
44
Chapter 2
Review of Switching Concepts and Power Semiconductor Devices
.....
•
lit
•
v~----r----H-
to
Vz-r--I
I
I
I
fBI
---1---1-1---~~
I
I
I
-Isz
I
I
I
I
---1- -r-------I
I
I
I
ic
I
I
I
Ion
I
--++--1
I
I
I
I
I
I
I
I
I
I
I
Figure 2.13 Switching characteristics for
the BJT. (a) Circuit. (b) Switching
waveforms.
(b)
where Ic and 18 are the collector and base currents in saturation, respectively, and
< {3. The smaller f3rorced• the deeper the transistor is driven into saturation. T~
ically, f3rorced can be as low as 1. Ideally, vCE,sat = 0, but in practice this value varies
between 0.1 and 0.6 V, depending on how deep in saturation the device is driven. The
new ratio of collector to emitter current is much smaller than the case when the transistor is operated in the active mode. At the edge of saturation, f3rorced = {3.
The total power dissipation in the transistor is obtained by adding the input
supplied by the collector current and the input power supplied by the base ~..~~o.,.t­
hence, the total power dissipation is defined as follows:
f3rorced
Pdiss
= VcEic+ VBEIB
EXERCISE 2.4
Consider the transistor circuit shown in Fig. E2.4. Assume the transistor is operating in the saturation region with VCEsat = 0.5 V, V8 E = 0.75 V, VD = 0.7 V, and D = 0.5. Sketch i8 , veE•
and iv. Determine the o~erall efficiency of the circuit (neglect the power supplied through the
base).
2.5
Available Semiconductor Switching Devices
t
T,
45
.
Figure E2.4
1J = 80.6%
To determine the voltage, current, and power operational limits, normally a plot of i-v
characteristics is given, as shown in Fig. 2.14. It gives the region in which the transistor can
operate within its limits, the region is known as the safe operation area (SOA). It represents
the permissible range of current, voltage, and power of the device in operation. The locus of
switch voltage versus switch current during tum-on and tum-off must lie within the SOA.
(a) Show that the current gain of the triple Darlington transistors shown in Fig. E2.5 is given by
(b) Assume transistor Q1 has collector-emitter saturation voltage Vc£I,sat· Show that Vc£J,sat for
transistor Q3 is given by
VC£3,sat
Assume identical
V8 E
=
VCEI,sat+2VBE
for the three transistors.
Max power
Current limit
(Pcmax)
Second
breakdown limit
SOA
/Voltage limit
veE. max
-----+-------------------------------------L-----.
Figure 2.14 Safe Operation Area (SOA) for a BJT.
veE
46
Chapter 2
Review of Switching Concepts and Power Semiconductor Devices
ic
Figure E2.5
EXERCISE 2.6
Consider the simple BJT switch shown in Fig. E2.6. Determine f3rorced for R8 = 1 k.O.
R 8 = 10 k!l, R 8 = 20 kO. Use V8 E = 0.7 V, VCE,sat = 0.3 V and assume an ideal diode.
JOY
D
Figure E2.6
ANSWER
1.25, 12.5, 25
Initially, the BJT was developed to be used in linear audio output amplifiers.
Soon BJT devices were used in switch-mode and high-frequency converters for aerospace applications to reduce the size and weight of magnetic components and filter
capacitors. In applications where self-tum-off devices are needed, such as de choppers
and inverters, BJTs quickly replaced thyristors.
The Power MOSFET
In this section, an overview of power MOSFET semiconductor switching devices will
be given. A detailed discussion of the physical structure, fabrication, and physical behavior of the device and its packaging is beyond the scope of this chapter. The emphasis here will be on the device's regions of operation and its terminal i-v switching
characteristics.
Unlike the bipolar junction transistor, the metal oxide semiconductor field-effect
transistor (MOSFET) device belongs to the unipolar device family, since it uses only
the majority carriers in conduction. The development of metal oxide semiconductor
technology for microelectronic circuits opened the way for the power MOSFET device in 1975. Selecting the most appropriate device for a given application is not an
easy task, requiring knowledge about the device characteristics, and unique features,
as well as innovation and engineering design experience. Unlike low-power (signal) devices, power devices are more complicated in structure, driver design, and
operational i-v characteristics. This knowledge is very important in enabling a power
electronics engineer to design circuits that will make these devices close to ideal.
. . . . I.A . .
2.5
Available Semiconductor Switching Devices
47
Drain (D)
JD
<-•G:~~ ,:,
_l
s
Source (S)
(a)
(b)
D
D
Figure 2.15 MOSFET device symbols.
s
s
(c)
(d)
(a) n-channel enhancement-mode.
(b) p-channel enhancement-mode.
(c) n-channel depletion-mode.
(d) p-channel depletion-mode.
The device symbols for p- and n-channel enhancement and depletion types are shown
iD Fig. 2.15. Figure 2.16 shows the i-v characteristics for then-channel enhancement~'J)e ~OSFET. It is the fastest power switching device, with a switching frequency of
lDOre than 1 MHz, a voltage power rating up to 600 V, and a current rating as high as
.SO .-\. ~OSFET regions of operations will be studied shortly.
Triode
Saturation region
(linear region) (active region)
4
~,4
os< vcs- VTht vos> vcs- VTh
~
I
r
vcs increases
VGS < VTh
(cutoff
---~~~ss~~~~~~~~SSSS~~r:eg:io~n) vos
Source (S)
(a)
(b)
F"'C'Ire 2.16 (a) n-channel enhancement-mode MOSFET and (b) its i0 vs. v0 s characteristics.
48
Chapter 2
Review of Switching Concepts and Power Semiconductor Devices
Gate
Source
Drain
(a)
Gate
Drain
(b)
Figure 2.17 (a) Vertical cross-sectional view of a power MOSFET.
(b) Simplified representation.
MOSFET Structure Unlike the lateral-channel MOSET devices used in man
IC technologies, in which the gate, source, and drain terminals are located on th'
same surface of the silicon wafer, power MOSFETs use a vertical channel struc
ture to increase the device's power rating. In the vertical channel structure, the
source and drain are on opposite sides of the silicon wafer. Figure 2.17(a) shows avertical cross-sectional view of a power MOSFET. Figure 2.17(b) shows a simplified
representation. There are several discrete types of the vertical-structure power
MOSFET available commercially today, such as the V-MOSFET, U-MOSFET,
D-MOSFET, and S-MOSFET. The pn junction between the p-hase region (also,
referred to as the body or bulk region) and the n-drift region provides the ·.
forward voltage blocking capabilities. The source metal contact is connected
directly to the p-hase region through a break in the n+ source region to allow for
a fixed potential to the p-hase region during normal device operation. When the
gate and source terminals are set at the same potential ( VGS = 0), no channel is
established in the p-hase region (i.e., the channel region remains unmodulated).
The lower doping in the n-drift region is needed to achieve higher drain voltage
blocking capabilities. For the drain-source current, iD, to flow, a conductive path
must be established between the n+ and n- regions through the p-hase diffusion
region.
.,t;.
2.5
Available Semiconductor Switching Devices
49
On-State Resistance When the MOSFET is in the on state (triode region), the channel of the device behaves like a constant resistance, RDs(on)• that is linearly proportional to the change between vDS and iD, as given by the following relation:
RDS(on) =
dVDSi
7JT;;
VGS=constant
The total conduction (on-state) power loss for a given MOSFET with forward current
ID and on-resistance RDS(on) is given by
p on,diss
= IbRDS(on)
The value of RDS(on) can be significant and varies between tens of milliohms and a few
ohms for low-voltage and high-voltage MOSFET, respectively. The on-state resistance is an important data sheet parameter, since it determines the forward voltage
drop across the device and its total power losses.
Unlike the current-controlled bipolar device, which requires base current to allow
the current to flow in the collector, the power MOSFET is a voltage-controlled unipolar
device and requires only a small amount of input (gate) current. As a result, it requires
less drive power than the BJT. However, it is a nonlatching current like that of the BJT;
i.e., a gate-source voltage must be maintained. Moreover, since only majority carriers
contribute to the current flow, MOSFETs surpass all other devices in switching speed,
with speeds exceeding a few megahertz. Comparing the BJT and the MOSFET, the BJT
has higher power-handling capabilities and lower switching speed, while the MOSFET
device has lower power-handling capabilities and relatively fast switching speed. The
~OSFET device has a higher on-state resistance than the bipolar transistor. Another difference is that the BJT parameters are more sensitive to junction temperature compared
to the MOSFET parameters. Unlike the BJT, MOSFET devices don't suffer from second breakdown voltages, and sharing current in parallel devices is possible.
Internal Body Diode The modem power MOSFET has an internal diode called a
body diode connected between the source and the drain, as shown in Fig. 2.18(a). This
diode provides a reverse direction for the drain current, allowing a bidirectional switch
implementation. Even though the MOSFET 's body diode has adequate current and
switching speed ratings, in some power electronic applications that require the use of
ultra-fast diodes, an external fast-recovery diode is added in an anti-parallel fashion,
with the body diode blocked by a slow-recovery diode, as shown in Fig. 2.18(b).
Internal Capacitors Another important parameter that affects the MOSFET's switching
behavior is the parasitic capacitances between the device's three terminals, namely, the
gate-to-source (Cgs), gate-to-drain (Cgd), and drain-to-source (Cds) capacitances, shown in
Fig. 2.19(a). The values of these capacitances are nonlinear and a function of the device's
structure, geometry, and bias voltages. During tum-on, capacitors cgd and cgs must be
charged through the gate; hence, the design of the gate control circuit must take into consideration the variation in these capacitances. The largest variation occurs in the gate-todrain capacitance as the drain-to-gate voltage varies. The MOSFET parasitic capacitances
are given in terms of the device's data sheet parameters ciss• coss• and crss as follows,
cgd
cgs
= crss
= ciss- crss
cds = coss- crss
2.5
Available Semiconductor Switching Devices
51
charge and discharge the gate-to-source and gate-to-drain parasitic capacitances to
tum the device on and off, respectively.
In power electronics, the aim is to use power switching devices to operate at
higher and higher frequencies. Hence, the size and weight associated with the output
transformer, inductors, and filter capacitors will decrease. As a result, MOSFETs are
used extensively in power supply designs that require high switching frequencies,
including switching and resonant-mode power supplies and brushless de motor drives.
Because of the device's large conduction losses, its power rating is limited to a few
kilowatts. Because of its many advantages over BJT devices, modern MOSFET
devices have received high market acceptance.
Regions of Operation Most MOSFET devices used in power electronics applications are of then-channel, enhancement type, like that shown in Fig. 2.16(a). For the
~OSFET to carry drain current, a channel between the drain and the source must be
created. This occurs when the gate-to-source voltage exceeds the device threshold
voltage, VTh· For vcs > VTh• the device can be either in the triode region, which is
also called "constant resistance" region, or in the saturation region, depending on the
value of vDs· For a given Vcs• with a small vDS (vDS < Vcs- VTh) the device operates in
the triode region (saturation region in the BJT), and with a large vDs (vDs > Vcs - VTh),
the device enters the saturation region (active region in the BJT). For Vcs < VTh, the
device turns off, with the drain current almost equal to zero. Under both regions of operation, the gate current is almost zero. This is why the MOSFET is known as a voltagedriven device and, therefore, requires a simple gate control circuit.
The characteristic curves in Fig. 2.16(b) show that there are three distinct regions
of operation, labeled as triode region, saturation region, and cutoff region. When used
as a switching device, only the triode and cutoff regions are used; when it is used as an
amplifier, the MOSFET must operate in the saturation region, which corresponds to
the active region in the BJT.
The device operates in the cutoff region (off state) when v cs < vTh• resulting in
no induced channel. In order to operate the MOSFET in either the triode or saturation
region, a channel must first be induced. This can be accomplished by applying a gateto-source voltage that exceeds vTh• i.e.,
Vcs > VTh
Once the channel is induced, the MOSFET can operate either in the triode region (when
the channel is continuous with no pinch-off, resulting in the drain current being proportional to the channel resistance) or in the saturation region (the channel pinches off, resulting in constant /D). The gate-to-drain bias voltage (vcv) determines whether the
induced channel undergoes pinch-off or not. This is subject to the following restrictions.
For the triode mode of operation, we have
VcD > VTh
and for the saturation region of operation, we have
vcD
<
VTh
Pinch-off occurs when vcD = VTh·
In terms of vDS• the preceding inequalities may be expressed as follows:
1. For the triode region of operation,
52
Chapter 2
Review of Switching Concepts and Power Semiconductor Devices
2. For the saturation region of operation,
vDs > vGs- VTh
3. For the cutoff region of operation
vGs < VTh
It can be shown that the drain current, iD, can be mathematically approximated
follows:
iD = k[2(vGs- VTh)vDs-
vbs1
(triode region)
(saturation region)
iD = k(vGs- VTh)2
where
1-Ln
= electron mobility
Cox = oxide capacitance per unit area
L = length of the channel
W = width of the channel
Typical values for these parameters are given in the PSPICE model discussed later. At
the boundary between the saturation (active) and triode regions, we have
resulting in the following equation for iD:
1.D
=
k
2
VDS
The input transfer characteristic curve for iD vs. vGs when the device is operating in
the saturation region is shown in Fig. 2.20.
The large-signal equivalent circuit model for an n-channel enhancement-type
MOSFET operating in the saturation mode is shown in Fig. 2.21. The drain current is
represented by a current source as a function of VTh and vGs·
If we assume the channel is pinched off, the drain-source current will no longer be
constant but rather will depend on the value of v DS as shown in Fig. 2.22. The increased
Figure 2.20 Input transfer characteristics for a MOSFET
device operating in the saturation region.
2.5
Available Semiconductor Switching Devices
io
G •
53
D
•
+
+
vos
s
Figure 2.21 Large-signal equivalent circuit model.
\'alue of v 0 s results in reduced channel length, resulting in a phenomenon known as
channel length modulation. If the v05 -i0 lines are extended as shown in Fig. 2.22,
they all intercept the vos axis at a single point labeled -1 I A, where A is a positive constant MOSFET parameter. The term (1 + Av0 s) is added to the i 0 equation to account
for the increase in i 0 due to the channel length modulation. i 0 is thus given by
i 0 = k(vcs- V11,)2(1
+ Av 0 s)
(saturation region)
From the definition of r0 given, it is easy to show that the MOSFET output resistance can be expressed as follows:
If we assume the MOSFET is operating under small-signal conditions, i.e., the
,-ariation in Vcs on the i 0 vs. Vcs characteristic curve is in the neighborhood of the de
operating point Q at / 0 and Vcs' as shown in Fig. 2.23, the i 0 current source can be
represented as the product of the slope gm and vcs' as shown in Fig. 2.24.
Figure 2.22 MOSFET characteristic curve including output resistance.
54
Chapter 2
Review of Switching Concepts and Power Semiconductor Devices
Io
Figure 2.23 Linearized i0 vs. vcs curve with operating de point (Q).
G•e--..
e
+
....--------tf------0
ro
s
Figure 2.24 Small-signal equivalent circuit including
MOSFET output resistance.
Input Capacitance Because the MOSFET is a majority-carrier transport device,
it is inherently capable of high-frequency operation. Still, the MOSFET has two
limitations:
1. High input gate capacitances
2. Transient/delay due to carrier transport through the drift region
As stated earlier, the input capacitance consists of two components: the gate-to-source
and gate-to-drain capacitances. The input capacitances can be expressed in terms of the
device junction capacitances by applying the Miller theorem to Fig. 2.25(a). Using the
Miller theorem, the total input capacitance, Cin• between the gate and source is given by
Cin =
Cgs + (1 + gmro)Cgd
The frequency response of the MOSFET circuit is limited by the charging and
discharging times of Cin· Miller effect is inherent in any feedback transistor circuit
with resistive load that exhibits a feedback capacitance from the input to the output. The objective is to reduce the feedback gate-to-drain resistance. The output
capacitance between the drain and source, Cds• does not affect the tum-on and tum-off
MOSFET switching characteristics. Figure 2.26 shows how Cgd and Cgs vary under
increased drain-source voltage, Vos·
In power electronics applications, power MOSFETs are operated at high frequencies in order to reduce the size of the magnetic components. To reduce the switching
2.5
Available Semiconductor Switching Devices
55
.----*-- D
s
(a)
G
•
I I
D
•
+
(b)
F"~ure 2.25 (a) Small-signal equivalent circuit including parasitic
.:apacitances. (b) Applying the Miller theorem.
Up;Icitance
Voltage
Figure 2.26 Variation of Cgd and
function of v0 s.
Cgs
as a
losses, power MOSFETs are maintained in either the on state (conduction state) or off
state (forward blocking state).
Safe Operation Area The safe operation area (SOA) of a device provides the current and voltage limits the device must handle to avoid destructive failure. The typical
SOA for a MOSFET device is shown in Fig. 2.27. The maximum current limit while
the device is on is determined by the maximum power dissipation.
As the drain-source voltage starts increasing, the device starts leaving the on state
and enters the saturation (linear) region. During the transition time the device exhibits
56
Chapter 2
Review of Switching Concepts and Power Semiconductor Devices
Max power
(Pcmaxl
Current limit
Second
breakdown limit
SOA
Voltage limit
vos,max
Figure 2.27 Safe operation area for a MOSFET.
large voltage and current simultaneously. At higher drain-source voltage values that
approach the avalanche breakdown, it is observed that a power MOSFET suffers from
a second breakdown phenomenon. The second breakdown occurs when the MOSFET
is in the blocking state (oft), and a further increase in v05 will cause a sudden drop in
the blocking voltage. The source of this phenomenon in MOSFETs is the presence of a
parasitic n-type bipolar transistor, as shown in Fig. 2.28. The inherent presence of the
body diode in the MOSFET structure makes the device attractive to applications in
which bidirectional current flow is needed in the power switches.
Temperature Effect Today's commercial MOSFET devices have excellent response
for high operating temperatures. The effect of temperature is more prominent on the
on-state resistance, as shown in Fig. 2.29. As the on-state resistance increases, the conducDrain
Gate
_j
Figure 2.28 MOSFET equivalent
circuit including the parasitic BJT
Source
Ros(on)
Temperature
Figure 2.29 The on-state resistance as a
function of temperature.
2.5
Available Semiconductor Switching Devices
57
Collector
c
~
c
c-t
G
~
E
E
Emitter
(a)
(b)
(c)
F"tgure 2.30 (a) IGBT equivalent circuit, (b) simplified equivalent circuit, and (c) symbol.
tion losses also increase. This large vDS(on) limits the use of the MOSFET in high,·oltage applications. The use of silicon carbide instead of silicon has reduced vDS(on)
manifold.
As the device technology keeps improving in terms of switch speeds and powerhandling capabilities, it is expected that the MOSFET will continue to replace the BJT
in all types of power electronic systems.
The Insulated Gate Bipolar Transistor (IGBT)
The detailed equivalent circuit model, the simplified two-transistor circuit model,
and the schematic symbol for the insulated gate bipolar transistors (IGBT) are shown
in Fig. 2.30(a), (b) and (c), respectively. Its i-v characteristic is similar to the
~OSFET device and is not shown here. Since the IGBT architecture consists of a
~OSFET and a BJT as shown in Fig. 2.30(b), it is clear that the IGBT has the high input impedance of the MOSFET along with the high current gain and small on-state conduction voltage of the BJT. The device was commercially introduced in 1983 and
combines the advantages of MOSFETs, BJTs, and thyristor devices: the high current density allowed in BJT devices and the low-power gate drive needed in
~OSFET devices.
The device is turned off by zero gate voltage, which removes the conducting
channel. However, a negative base cannot turn off the pnp transistor current. As
a result the turn-off time is higher in the IGBT than in the bipolar transistor.
However, like the GTO (to be discussed shortly), the IGBT has a tail current at
turn-off due to the recombination of carriers from the base region. At turn-on, a
positive gate voltage is applied with respect to the emitter of the npn transistor,
creating an n-channel in the MOS device that causes the pnp transistor to start
conducting.
Its input capacitance is significantly smaller than that of the MOSFET device,
and the device does not exhibit the second-breakdown phenomenon. It is faster than
the BJT and can operate up to 20 kHz in medium-power applications. Currently, it is
available at ratings as high as 1.2 kV and 400 A. The improvement in its fabrication
is promising, and it is expected that it will replace the BJT in the majority of power
electronics applications.
58
2.5.2
Chapter 2
Review of Switching Concepts and Power Semiconductor Devices
Thyristor-Based Devices
The generic term thyristor refers to the family of power semiconductor devices
made of three pn junctions (four layers of pnpn) that can be latched into the on
state through an external gate signal that causes a regeneration mechanism in the
device. In this section, we will discuss four main members of the thyristor family that are currently used in power electronic circuits: The silicon-controlled
rectifier (SCR), gate turn-off thyristor (GTO), triode ac switch (triac), static induction transistor (SIT), static induction thyristor (SITH), and MOS-controlled
thyristor (MCT).
The Silicon-Controlled Rectifier
The silicon-controlled rectifier (SCR) is the oldest power controllable device utilized
in power electronic circuits, introduced in 1958. Unlike the diode, the SCR can block
voltages bidirectionally and carry current unidirectionally. Until the 1970s, when
power transistors were presented, the conventional thyristor had been used extensively in various industrial applications. The SCR is a three-terminal device composed of a four-semiconductor pn junction. Unlike the diode, the SCR has a third
terminal called the "gate" used for control purposes.
The symbol and i-v characteristics for the SCR are shown in Fig. 2.3l(a) and (b),
respectively. The ideal switching characteristic curves are shown in Fig. 2.3l(c),
where v AK and iA are the voltage across the anode-cathode terminals and the current
through the anode, respectively.
The latching current is always less than the minimum trigger current specified in
the device's data sheet. The holding current is the minimum forward current the SCR
can carry in the absence of a gate drive. The forward breakover voltage, V80 , is the
voltage across the anode-cathode terminal that causes the SCR to tum on without the
application of a gate current. Reverse avalanche (breakdown) occurs when vAK is negatively large.
The normal operation of the SCR occurs when its gate is used to control the tumon process by injecting a gate current iG to allow the forward current to flow; vAK is
positive and can be turned off by applying a negative vAK across it.
It must be noted that once the SCR is turned on, the gate signal can be removed.
For this reason, this device is also known as a latch device. The gate current must be
applied for a very short time and normally can go up to I 00 rnA. Once the SCR is
turned on, it has a 0.5-2 V forward voltage.
The physical structure of the SCR consists of three pn junctions, as shown in
Fig. 2.32. The different doping levels shown are used to help sustain a large block
voltage and speed the breakdown process. Under no external bias voltage, the majority carriers diffuse across the junctions and recombine with the minority carriers,
resulting in zero net current.
The Off State Generally speaking, thyristor tum-off can be carried out by reversing
the anode-cathode voltage (i.e., through natural ac commutation), or it can be turned
off through forced commutation by switching a previously negatively charged capacitor across the SCR or by the insertion of a series impedance to reduce the forward current below the device's holding current.
In order to tum off the SCR, v AK must be negative (v AK < 0); of course, the triggering gate signal is immaterial (the presence of iG only increases electron movement
across the junction J 2 ). Under this condition, junctions J 1 and J 3 are reverse biased and
2.5
Available Semiconductor Switching Devices
Anode (A)
Forward blocking
region
Cathode (K)
(a)
Latching current
Max reverse
ll
vol~age
__ _,;
1
Reverse
...amche region
Holding current
Forward
breakover voltage
Reverse blocking
region
(b)
Reverse voltage
blocking
Forward current
On +-carrying (on)
Forward voltage
blocking (oft)
(c)
F"~gure 2.31 SCR switching characteristics. (a) Symbol. (b) i-v characteristics. (c) Ideal
~itching characteristics.
Anode
Pt
nj
f - - - - - - 1 12
P2
Cathode
Figure 2.32 Simplified physical structure of the SCR: no biasing.
59
60
Chapter 2
Review of Switching Concepts and Power Semiconductor Devices
junction J 2 is forward biased. Like two reverse-bias diodes, the only currents that
through the device are the leakage currents, /s 1 and Is 3 , of junctions J 1 and J 3 ,
tively. Notice that the larger the depletion region driven to the low doping level of n1
compared to p 1, as shown in Fig. 2.33(a), the larger the reverse voltage and the
the depletion regions of J 1 and J 3 become. Junction J 2 is forward biased with Tnr""""""
current,IF2, equal to (ls 1 = Id. The junction J 3 breaks down at lower voltages thanJ1
due to different doping levels, and the large reverse blocking voltage is sustained by
junction J 1•
Typical tum-off times for the SCR range from a few microseconds to I 00 J.LS for
low and high voltage ratings, respectively.
The On State To tum on the SCR in the conduction state, a positive anode-cathode
voltage must be applied (vAK > 0) and a gate current must be injected to initiate the anstate regeneration process. For vAK > 0 and iG = 0, junctions J 1 and J 3 are in the
forward-bias states and J 2 is in the reverse-bias state. Since n 1 is less doped than
the p 2 region, the depletion region grows mostly into the n 1 region, as shown in
Fig. 2.33(b).
Without a trigger current (iG = 0), the junction J 2 is in the forward-blocking condition, and the only current that flows in the device is the small leakage current, lsz•
through J 2 since it is reverse biased. The forward current remains small until the critical forward breakover voltage, V80 , is exceeded. At this point, the potential energy of
the barrier at junction J 2 increases, accelerating the electron-hole pair generation until
avalanche breakdown occurs, resulting in the thyristor being switched rapidly into the
conduction state. This trigger mechanism should be avoided unless specified as safe
by the manufacturer.
Gate triggering is achieved when a small pulse current, iG, is injected at the
gate, introducing an avalanche condition across J 2 and forward currents, I Fl and
IF3, that flow through J 1 and J 3 , respectively. In order to explain the thyristor gate
firing mechanism, normally the SCR is replaced by the model of two interconnected complementary pnp and npn transistors Q1 and Qz, respectively, as shown
in Fig. 2.34.
We consider only the forward blocking and forward conducting states, since in the
reverse blocking state the only current that flows is the leakage current of Q 1 and Q2•
Anode
Depletion
region
Anode
r-__..-._..,
-------
lt
Figure 2.33 Depletion layer
Cathode
Cathode
(a)
(b)
(a) under reverse bias (vAK < 0) and
(b) under forward bias (vAK > 0).
2.5
Available Semiconductor Switching Devices
61
p
iA
n
iC2
G
ic
p
iK
n
K
(a)
(b)
Figure 2.34 Two-transistor analogy
model for the SCR. (a) pn junction
representation. (b) Transistor circuit
representation.
To derive the terminal current relation for the SCR, we tum to the large-signal model of
the transistor, called the Ebers-Moll (EM) model, which is used for both transistor junctions, the npn and the pnp. Figure 2.35(a) and (b) shows the EM models for the npn and
pnp transistors, respectively. Here ap14 and an denote the forward a, which is close to
unity, and aRI and aR2 denote the reverse a, which is normally very small (0.02). For
simplicity we will assume aRI and aR2 are zero. The currents Io,Bc and Io.cs represent
the diode leakage currents for the base-collector diode of Q2 and the collector-base
diode of Q 1 when both transistors are in the active mode. These currents are also known
as the collector-to-base saturation current while the emitter is open-circuit, Ic802 , for the
npn transistor, and base-to-collector current, I 8 c 01 , for the pnp transistor. The direction
of Ic802 and I8 c01 are opposite to the direction of the leakage currents as shown in
Fig. 2.35(a) and (b). Recall that, in the active region, the base-emitter junction is forward biased and the base-collector junction is reverse biased.
First, let us assume there's no gate triggering (ic = 0). Replacing the equivalent
EM models of Fig. 2.35(a) and (b) into Fig. 2.35(c), we obtain the two-transistor
equivalent circuit model. With simple algebraic manipulation, we can show that
.
IK
.
=
lA
IcsOI + Inc02
= 1-(al +a2)
With ic = 0, the only current that will flow is the leakage current (a 1 and a 2 are
small). Normally a 1 + a 2 ~ 1 to keep it off. If a 1 + a 2 = 1, the SCR will enter a
sustained breakdown, with the anode current limited only by the external circuitry.
To avoid entering the breakdown region, a gate signal is injected, resulting in the
following forward current:
(2.1)
4
Forward a (aF) is the same as the single transistor's a when operating in the active region, given by
= {31 (I +{3), where f3 is the transistor current gain, f3 = lei18 .
a
62
Chapter 2
Review of Switching Concepts and Power Semiconductor Devices
IcB02~
IBcOlj
anio.BE
iB2
CXFJiD,EB
iBI
82
81
io,EBj
aR2ID,BC""'O
82
-----+
aRI/D.CB""'O
~ i£2=iK
iB2
£2
£2
(c)
Figure 2.35 Complete Ebers-Moll model for (a) the npn transistor and (b) the pnp
transistor. (c) Equivalent circuit model for Fig. 2.34(b).
For the generation process to start, we design the SCR for a 1 + a 2
"'
I.
EXERCISE 2.7
Show that for the generation process to start, the following relation must be satisfied:
2.5
Available Semiconductor Switching Devices
63
"lien the thyristor was invented, all the schemes for force-commutating mercury1930s soon became thyristor-based circuits with expanded applications
• ildude ac drives and UPSs. However, because of their cost and low efficiency,
r6pl5lor circuits did not penetrate the adjustable-speed-drive application area. Today's
waions range from single phase-controlled rectifier circuits to static var compen~ in utility systems. Because of its limited frequency of operation, the application
.t'lllr thyristor has reached saturation.
:~a-.aifiers of the
'lllle schematic symbol and the practical and ideal switching i-v characteristics for the
111r111m-offthyristor (GTO) are shown in Fig. 2.36(a), (b), and (c), respectively. The
*Hc:e is as old as the SCR and was introduced commercially in 1962. Like the SCR,
be turned on with a positive gate signal, but unlike the SCR, applying a negative
!lillie signal, as shown in Fig. 2.36(b), turns off the GTO. Once the GTO is turned on or
11111[ 1be gate signal can be removed. The device has a higher on-state voltage than the
SCJt at comparable currents. The GTO is normally an off device; it has a very poor
-.off current gain and it exhibits a second-breakdown problem at tum-off.
•em
.,.:_;
K
Ia)
Trigger ojj'by
negative gate signal
(b)
iA
On state
Reverse
blocking state
Off' state
VAK
(c)
lttgore 2.36 GTO switching characteristics. (a) Symbol. (b) i-v characteristics.
lcl Ideal switching characteristics.
64
Chapter 2
Review of Switching Concepts and Power Semiconductor Devices
Because of its high switching power dissipation, the GTO's frequency of operation is limited to less than 1 kHz, and modern GTO devices are rated at 4.5 kV and at
currents as high as 3 kA. The GTO is used in high current and voltage applications,
such as voltage-fed inverters and induction heating resonant converters.
The Triode AC Switch (Triac)
Like the GTO, the triode ac (triac) switching device was introduced immediately
after the SCR. In fact, the triac is nothing but a pair of SCRs connected in reverseparallel on one integrated chip, as shown in Fig. 2.37. It is also known as a bidirectional SCR. The triac's equivalent circuit and the circuit schematic symbol are
shown in Fig. 2.37(a) and (b), respectively. The device can be triggered in the
positive and negative half-cycle of the ac voltage source by applying a positive or
a negative gate signal, respectively. Today's triac ratings are up to 800 V at 40 A.
The i-v characteristics and the ideal switching characteristics are shown in Fig. 2.37(c)
and (d). Use of the triac is considerably limited due to its low rates of rise of voltage and current. Applications include light dimming, heating control, and various
home appliances.
The Diac
Finally, we should mention another power device known as the diac, which is essentially a gateless triac constructed to break down at low forward and reverse voltages.
The diac is mainly used as a triggering device for the triac.
Static Induction Transistors and Thyristors
In 1987 a device known as the static induction transistor (SIT) was introduced. One
year later, the static induction thyristor (SITH) was introduced. The symbols for the
SIT and SITH are shown in Fig. 2.38(a) and (b), respectively.
The SIT is a high-power and high-frequency device. The device is almost identical to the JFET, but with its special gate construction it has a lower channel resistance
compared to the JFET.
The SIT and SITH are normally on devices and have no reverse voltage blocking
capabilities. The SITH device turns off in the same way as the GTO, by applying a
negative gate current, but it has a higher conduction drop than the GTO. Finally, both
devices are majority-carrier devices with positive temperature coefficients, allowing
device paralleling.
Among the SIT's major applications are audio and VHF/UHF amplifiers, microwaves, AM/FM transmitters, induction heating, and high-voltage, low-current power
supplies. It has a large forward voltage drop compared to the MOSFET; hence, it is
not normally used in power electronic converter applications. The applications of the
SITH include static var compensators and induction heating.
The MOS-Controlled Thyristor
The simplified equivalent circuit model and the schematic symbol for a p-type MOScontrolled thyristor (MCT) are shown in Fig. 2.39(a) and (b), respectively. Its ideal
i-v switching characteristic is similar to that of the GTO, as shown in Fig. 2.39(c). The
device was commercially introduced in 1988. Like the GTO device, it has a high turnoff current gain.
2.5
Available Semiconductor Switching Devices
A (anode)
65
A
MT1
iA
SCR,
+
VAK
SCR 2
G
G·p~el
K
MT 2
K (cathode)
(a)
(b)
iA
On state
Forward current
carrying
Off state
Off state
~-
Reverse current
carrying
(c)
iA
On
~
Off
Off
".
VAK
On
(d)
Figure 2.37 Triac switching characteristics. (a) Equivalent representation using two SCRs.
(b) Symbol. (c) i-v characteristics. (d) Ideal switching characteristics.
The p-MCT is turned on by applying a negative gate voltage (less than -5 V) with
respect to the cathode, turning on the p-FET and turning off the n-FET, initiating
the regenerative mechanism in the SCR connected npn and pnp transistors. Similarly,
applying a positive gate signal with respect to the cathode initiates the turn-off.
The n-MCT has the same device structure, except that the p-FET and n-FET are
66
Chapter 2
Review of Switching Concepts and Power Semiconductor Devices
D (drain)
A (anode)
G (gate)
G (gate)
/
K (cathode)
S (source)
Figure 2.38 {a) SIT symbol. (b) SITH
symbol.
(b)
(a)
A (anode)
A
I~
~
G(ga~
0
G
+
VAK
K
K (cathode)
(b)
(a)
A
On state
G
0
Reverse
blocking state
Off state
~
I~
K
(c)
(d)
Figure 2.39 MCT switching characteristics. (a) Equivalent circuit.
(b) p-MCT symbol. (c) Ideal switching characteristics. (d) n-MCT symbol.
interchanged; hence, a positive and a negative gate signal turns the n-MCT on and off,
respectively. The schematic symbol for the n-MCT is shown in Fig. 2.39(d).
The MCT's current and voltage ratings exceed 1 kV and 100 A and are continuously being improved. The device can be easily connected in series and in parallel
combinations to boost power rating.
2.7
Future Trends in Power Devices
67
This device is serious competition for the IGBT. It has the same frequency of
operation as the IGBT but with a smaller voltage drop and a higher operating temperature. Intensive efforts are under way to introduce a new improvement in the device,
and it is expected to receive wider acceptance in medium- and high-power applications.
Other Power Devices
Other devices of the thyristor family include the reverse-conducting thyristor (RCT),
which is nothing but a built-in anti-parallel body diode connected across the SCR to
allow cmTent to flow in the opposite direction, and the light-activated SCR (LASCR),
which is used in high-voltage and high-current applications such as HVDC systems.
Their power ratings go up to hundreds of kilovolts and hundreds of kiloamperes, and
they provide complete electrical isolation between the power and control circuits.
CO)IPARISON OF POWER DEVICES
Depending on the applications, the power range processed in power electronics is very
wide-from hundreds ofmilliwatts to hundreds of megawatts. Therefore, it is very difficult to find a single switching device type to cover all power electronics applications.
Today's available power devices have tremendous power and frequency rating ranges as
well as diversity. Their forward current ratings range from a few amperes to a few kiloamperes, their blocking voltage rating ranges from a few volts to a few kilovolts, and
their switching frequency ranges from a few hundred hertz to a few megahertz, as illustrated in Table 2.2. This table gives only relative comparison between available power
semiconductor devices because there is no straightforward technique that gives a ranking for these devices. Devices are still being developed very rapidly with higher current,
voltage, and switching frequency ratings. Figure 2.40 shows a plot of frequency versus
power, illustrating these rating ranges for various available power devices.
FLIURE TRENDS IN POWER DEVICES
It is expected that improvements in power-handling capabilities and increases in the
frequency of operation of power devices will continue to drive the research and developments in semiconductor technology. From power MOSFETs to power MOS-IGBTs
Table 2.2
Comparison of Power Semiconductor Devices
Device
type
Thyristor
(SCR)
Triac
GTO
BJT
(Darlington)
MOSFET
IGBT
SIT
SITH
MCT
Year made
available
Rated
voltage
Rated
current
Rated
frequency
Rated
power
Forward
voltage
1957
6 kV
3.5 kA
500Hz
IOOsMW
1.5-2.5 v
1958
1962
1960s
lkV
4.5 kV
1.2 kV
IOOA
3kA
800A
500Hz
2kHz
lOkHz
IOOs kW
!OsMW
IMW
1.5-2V
3--4 v
1.5-3 v
1976
1983
1987
1975
1988
500V
1.2kV
4kV
4kV
3 kV
50 A
400A
600A
600A
2kV
IMHz
20kHz
100kHz
10kHz
20-100 kHz
IOOkW
IOOs kW
IOskW
IOskW
!OsMW
3--4 v
3--4 v
I0-20V
2--4 v
1-2 v
68
Chapter 2
p
Review of Switching Concepts and Power Semiconductor Devices
As power rating
GTO
•
MCT
•
SITH e
BJT
•
•
IGBT
As frequency
increases, power
decreases
f
Frequency (Hz)
Figure 2.40 Frequency versus power rating ranges for various power devices.
to power MOS-controlled thyristors, the power rating has consistently increased by a
factor of 5 from one type to another. Major research activities will focus on obtaining
new device structures based on the MOS-BJT technology integration to rapidly
increase power ratings. It is expected that the power MOS-BJT technology will capture
more than 90% of the total power transistor market.
The continuing development of power semiconductor technology has resulted in
power systems with driver circuits, logic and control, device protection, and switching
devices designed and fabricated on a single chip. Such power IC modules are called
"smart power" devices. For example, some oftoday's power supplies are available as ICs
for use in low-power applications. There is no doubt that the development of smart power
devices will continue in the near future, addressing more power electronics applications.
2.8
SNUBBER CIRCUITS
To relieve switches from overstress during switching, switching aid circuits, known as
snubber circuits, are normally added to the power switching device. The objectives of
snubber circuits may be summarized as (1) reducing the switching power losses in the
main power device in the power electronic circuit, (2) avoiding second breakdowns,
and (3) controlling the device's dv I dt or di I dt in order to avoid latching in pnpn devices. There are a wide range of tum-on and tum-off snubber circuits available in
today's power electronic circuits. These include dissipative and nondissipative passive snubber circuits, and nondissipative active snubber circuits. In dissipative
snubber circuits a capacitor is used to slow the device's voltage rise during tum-off, or
an inductor to slow the device's current rise during tum-on. Figure 2.41(a) and (b)
shows popular tum-off and tum-on snubber circuits, respectively. In Fig. 2.4l(a), a
capacitor is used to reduce the voltage rise dv5wl dt across the switch during turn-off. In
Fig. 2.41 (b), a snubber inductor, Ls, is used to slow down the rise of the inductor current
Problems
69
L.,.
D
(b)
(a)
F"tgt~re 2.41 Passive snubber circuits: (a) tum-off and (b) tum-on
:!llubber circuits.
With turn-on
llld turn-off
~ubbers
Figure 2.42
isw
versus
vsw
switching loci.
di5" / dt (the inductor current equals the switch current, i5w). Figure 2.42 shows the
switching loci for a practical switch (transistor) with and without snubber circuits. For
a detailed discussion on all types of snubber circuits and their design methods, refer to
the references at the end of the textbook.
is ideal and operating at a duty ratio of
(b) Determine the average output voltage.
(c) Determine the average output power delivered
to the load.
(d) Determine the average output power supplied
by the de source.
(e) Determine the efficiency of the circuit.
DC-DC Converter
Buck and Boost Converter Topologies
Buck Vo/Vin = D (duty ratio)
Implementation Using a Switch and a Diode
Implementation Using Two Switches
Boost Vo/Vin = 1/(1-D)
Implementation Using a Switch and a Diode
Implementation Using Two Switches
For bidirectional Buck/Boost applications, only topologies using two switches can be used.
Combined Bidirectional Topology
Buck
Boost
Bidirectional
Boost
Vhigh
Vlow
1

1  D1
Buck
Vlow
 1  D1
Vhigh
Consistent since D2=1-D1.
Example: Excitation from Low Voltage Side
When D1=0.6 and Vlow =40 V, we have Vhigh = 40/(1-0.6)=100 V.
Example: Excitation from High Voltage Side
136
Chapter 4
Nonisolated Switch-Mode de-de Converters
EXERCISE 4.2
Repeat Example 4.1 by assuming the switch has a 1.8 V voltage drop across it when
ANSWER
4.2.1
0.64, 0.75, 93.6%
The Buck Converter
Topology and Basic Operation
Figure 4.9(a) and (b) shows the circuit configuration for a buck converter with a
and two-switch implementation. Figure 4.9(c) shows the transistor-diode ,.. ,1"'"''uwo
tion. This topology is known as a buck converter because it steps down the average
voltage below the input voltage.
Throughout this chapter to obtain the steady-state characteristic equations, we
assume that power switching devices and the converter components are lossless.
over, the exact steady-state analysis of these converters requires solving sec:ona-<Ja
nonlinear systems. Such analysis is complex and because of the nature of the
voltage, it is not necessary. Since these converters' function is to produce de output.
+
+
R
(a)
v0
(b)
+
R
v0
(c)
J
10
On
{
Off
·I·
T
DT
On
L
I
I
I
I
T
I
(d)
Figure 4.9 The buck (step-down) converter. (a) Two-switch implementation. (b) Single-pole,
double-throw switch implementation. (c) Transistor-diode implementation. (d) Switching
waveform for the power switch.
4.2
Continuous Conduction Mode
137
output voltage v 0 (t) consists of the desired de and the undesired ac components. Practically, the output ripple due to switching is very small (less than 1%) compared to the
level of the de output voltage. As a result, we will assume the output ripple voltage is
small and can be neglected when evaluating converter voltage gains, i.e., v0 = ~- In
other words, the ripple-free output voltage assumption is made since the output time
constant for the filter capacitor and the output resistor, RC, is very large. Moreover, the
analysis will be based on the converter operating in the steady-state condition, i.e., the
converter currents and voltages have reached their steady-state values. These assumptions can be summarized and represented mathematically as follows:
1. Since we assume lossless components and ideal switching devices, the average
input power, Pin , and the average output power, P 0 , are equal:
(4.4)
2. Since we assume steady-state operation, the inductor current and the capacitor
voltage are periodic over one switching cycle, i.e.,
iL(to) = iL(to + T)
(4.5a)
= vc(tO + T)
(4.5b)
vc(to)
where t0 is the initial switching time and Tis the switching period.
3. Since we assume ideal capacitors and inductors, the average inductor voltage
and the average capacitor current are zero:
fc = -1
IT+
0
1
Tt 0
ic(t) dt = 0
(4.6)
(4.7)
In fact, Eq. (4.7) is a representation of Faraday's law, which states that voltage
time during charging equals voltage time during discharging. This is also known as
the volt-second principle. These two relations suggest that the total energy stored in
the capacitor or the inductor over one switching cycle is zero. Finally, throughout the
analysis in this chapter, the typical switching waveform for the power devices given
in Fig 4.9(d) will be used to represent the switching action of the power switch. For
simplicity we set the initial switching time to zero, t 0 = 0.
Again, Dis known as the duty ratio or duty cycle, defined in Eq. (4.2). The power
transistor is turned on for a period of DT and turned off for the remaining time
( 1 - D) T. Depending on whether the switch is turned on or off, the inductor current
will be either charging through fin or discharging through the diode, respectively. As a
result, there are two modes of operation. We first consider mode 1, when the switch is
on, shown in Fig. 4.10(a).
As shown in the figure, when the switch is on, the input voltage, fin, forces the diode into the reverse bias region. To determine the voltage conversion ratio, the average input and output currents, and the output voltage, we use the inductor current as a
state variable in the following equation:
Vin =
VL
+ Vo
d'
=L~+V0
dt
(4.8)
138
Chapter 4
Nonisolated Switch-Mode de-de Converters
+
c
R
(a)
+
R
D
Vo
(b)
Figure 4.10 Equivalent circuit modes for the buck converter. (a) Mode I: The power
on. (b) Mode 2: The power switch is off.
Equation (4.8) can be rearranged as follows:
diL
1
dt = z(Vin- Vo)
Integrating Eq. (4.9) from t = 0 tot with JL(O) as the initial condition, we obtain
iL(t) = !(Vin- V0 )t+JL(0)
L
Equation (4.10) suggests that the inductor current charges linearly with a slope
( Vin - V0 )1 L , where I L ( 0) is the initial inductor current value at t = 0, when
switch is first turned on. This equation applies as long as the switch is on.
the equivalent circuit model changes when the power switch is turned off at t =
resulting in the equivalent circuit of mode 2 shown in Fig. 4.IO(b), during which
diode is conducting.
As shown in Fig. 4.10(b), in order for the inductor current to maintain its conttlnlll"
ity, the diode is forced to conduct by becoming forward biased so that the diode
up" the current in the direction shown. The diode is known asjlyback or tre.~-vt·ne.~LliiP
because of the manner in which it is forced to tum on. The resultant equation that
scribes mode 2 operation is
diL
1
-=--V
dt
L o
Integrating both sides ofEq. (4.11)
obtain
fort~
DT with iL(DT) as an initial condition, we
where IL (DT) is the initial inductor current when the switch is first turned off.
4.2
Continuous Conduction Mode
139
Equation (4.12) suggests that the inductor current starts discharging at t = DT
with the slope of- V/ L , as shown in Fig. 4.11 (a). In steady-state operation we have
(4.13)
Evaluating Eq. (4.10) at t = DT and Eq. (4.12) at t = T and using Eq. (4.13), we obtain the following two relations for IL(O) and IL(DT):
IL(DT) =
IL(O)
=
!(vin- V
0
L
)DT+ IL(O)
_Vo(l-D)T+ IL(DT)
L
(4.14a)
(4.14b)
The steady-state current and voltage waveforms are shown in Fig. 4.11. I Lmax and I Lmin
are the inductor current values at the instants the switch is turned off and on, respectively.
Voltage Conversion
Next we use the preceding relations to derive expressions for the voltage conversion,
and average input and output currents. From Eqs. (4.14) we obtain
vo
(4.15)
-=D
vin
iL
hmax=h(D~)~---=1---------
o
----
_
I
/Lmin =IL(O)
~ t
1
0
DT
1
(a)
T
1
I
I
V;,~~~l~--+L-~----~----~~~~F-------~
I
(b)
I
I
IL~~~~7i
\~
~~;/f=i---------t=-t----- ~
I
I
(c)
I
t
I
N
1
I
I
I
:
:
I
ioi
t
I
~
-+--~~~----~~~--+~---~~ t
lLmax-lo
(d)
c+ --~
·
1
lLmin-lo-V
I
I
I
DT
I
I
:
~
(e)
I
)
~
t
Figure 4.11 Steady-state
wavefonns for the buck
converter: (a) inductor
current, (b) inductor voltage,
(c) input current, (d) diode
current, and (e) capacitor
current.
140
Chapter 4
Nonisolated Switch-Mode de-de Converters
Hence, the maximum output voltage gain is 1. We should point out that Eq. (4.1
be obtained easily by using the volt-second principle across the inductor,
given as follows:
Mode 1
(interval D T)
Mode2
(interval (1- D)T)
(Inductor voltage)( time) +
(Inductor voltage)(time)
=0
where VL equals ( vin- Vo) and -Vo during time intervals DT and
respectively.
We can make two observations on the buck voltage gain equation V0 = D v.
First, since all the converter components (L, C, D, Q) are ideal, they don't
·
any power, resulting in 100% voltage efficiency. Second, the average input and
voltage ratio has a linear control characteristic curve, as shown in Fig. 4.12. By
ing the value of the duty cycle, D, we can control the average output voltage to
desired level.
Average Input and Output Currents
The input current, iin, as illustrated in Fig. 4.1l(c), with an average value of /in, given by
fin= !fTiin(t) dt
To
Since iin = iL in mode 1, we substitute for iL(t) from Eq. (4.10), and by evaluating
integral between t = 0 and t = D T, we obtain
1
lin= L(Vin- V0 )D 2 T+IL(O)D
2
Using Eq. (4.14b), we obtain
where !Lmax and /Lmin represent IL(DT) and IL(O), respectively.
Similarly, by inspection, the average output current is given by
J = J = ]Lmin + hmax
0
L
2
_ Vo
- R
0.5
----if---+---+----+ D
0.5
Figure 4.12 Ideal output control characteristic
curve for the buck converter.
4.2
Continuous Conduction Mode
141
From Eqs. (4.14) and (4.20) we can solve for the maximum and minimum inductor
currents, to obtain
]Lmax
(1+(1-D)TJ
R
(4.21)
_ (1R- (1-D)TJ
(4.22)
=
DVin
2L
2L
]Lmin- DVin
Substituting these equations in Eqs. (4.19) and (4.20), we obtain
= DVin
I
o
R
D2Vin
Jin=~
Hence, the current gain is given by
(4.23)
This relation can be obtained by equating the average input and output power, to yield
From Eqs. (4.15) and (4.23), it is clear that the current and voltage relations for
the converter are equivalent to a de transformer model with a ratio of D, as shown in
Fig. 4.13. The sinusoidal curve and straight line drawn across the transformer windings indicate that the transformer is capable of transferring ac and de, respectively.
Critical Inductor Value
It is clear that for I Lmin ;;t:. 0 , the converter will operate in the continuous conduction
mode (cern). To find the minimum inductor value that is needed to keep the converter
in the cern, we set JLmin to zero and solve for L:
_ (1R- (1-D)TJ _0
]Lmin - D vin
Lcrit
I :D
+
=
(1-D)
-2-
2L
TR
-
(4.24)
/()
+
Figure 4.13 Equivalent circuit representation for the
buck converter, referred to as a de-de transformer.
142
Chapter 4
Nonisolated Switch-Mode de-de Converters
where Lcrit is the critical inductance minimum value for a given D, T, and R
converter enters the discontinuous conduction mode (dcm) of operation.
Output Voltage Ripple
Since we have assumed that the output voltage has no ripple, the entire ac
current from the inductor passes through the parallel capacitor, and only de
rent is delivered to the load resistor. In practice, the value of the output
is an important design parameter since it influences the overall size of the
de converter and how much of the switching frequency ripple is being
Having said that, it is design practice to choose a larger output capacitor in
to limit the ac ripple across V0 • Theoretically speaking, if C ~ oo, the
acts like a short circuit to the ac ripple, resulting in zero output voltage
we assume Cis finite, then there exists a voltage ripple superimposed on the
age output voltage. In order to derive an expression for the capacitor ripple
age, we first obtain an expression for the capacitor current, which is given by
following relation:
As a result, the initial capacitor current at t = 0 is given by
and at t = DT,
Jc(DT) = JL(DT) -10
=
+
(/Lmax; /Lmin)
The resultant capacitor current and voltage are shown in Fig. 4.14.
DT
T
DT
l+DT
T
2
Figure 4.14 Capacitor current and voltage waveforms.
4.2
Continuous Conduction Mode
143
The instantaneous capacitor current can be expressed in terms of /).I from
Eqs. (4.21) and (4.22), as shown in the following equations:
i {t)
= ILmax- ILmin! _ ILmax- ILmin =
e
DT
2
/).I! _/).I
DT
2
0 $ t < DT
(4.25a)
.
i (!} = _ I Lmax -ILmm{t-DT)
+ IL max -IL mm·
e
(I -D)T
2
=
-/).I (t-DT)+/).I
(I -D)T
2
0$ t < DT
(4.25b)
where /).I= ( Vin(I- D)TD)/L.
From the capacitor voltage-current relation, ie = C(dv/ dt), the capacitor voltage, vel(!), can be expressed by the following integral fort 2::0:
Vel
(t)
=
.!.Jt
c
ie
dt + Ve(O)
0
where Ve(O) is the initial capacitor voltage at t = 0. Substituting for ie(t) from
Eq. (4.25a), we obtain the following equation:
Vel(!)=
bf: (~~~-~I)
dt+ Ve(O)
Evaluating this integral yields
1 /).I t 2 /).I
v l(t) = - - - - -t+
e
CDT2 2C
ve(0)
0$ t < DT
(4.26)
Similarly, for t 2:: D T, the capacitor voltage is given by
vc 2 (t) =
.!.Jt
C
ie dt + Ve(DT)
DT
where Ve(DT) is the initial capacitor voltage when the switch is turned off at
t = DT. From Eq. (4.27) vc 2 (t) is given by
v 2 (t) =
e
2
-/).I
(t-DT) + /).I(t-DT)+ V (DT)
C(l -D)T
2
2C
e
DT$t < T
(4.27)
Since the capacitor voltage is in the steady state, we have v e (t = D T) =
1
ve 2 (t = DT) and vel (0) = ve 2 (T), resulting in the following boundary conditions
for the capacitor voltage:
Since the average capacitor voltage is V0 , then we have in general
V"
~ ~[J,"' vc~ (t) dt + [
v"'(t)
d~
Substituting for vel and ve 2 from Eqs. (4.26) and (4.27), we obtain
V = /).I (l-2D)T+ V (0)
o
12C
e
(4.28)
144
Chapter 4
Nonisolated Switch-Mode de-de Converters
Substitute for aJ = (DVin(l-D)T)/L in Eq. (4.28) to yield
V (O) = DV [1- (1-D)(l- 2D)T2]
c
m
12CL
(4.29}
Hence, the capacitor initial values at t = 0 and t = D T are equal, as expected since
the capacitor current is symmetrical. Since the peak capacitor voltage occurs when the
inductor current is zero, we have the capacitor minimum voltage occurring at
t = DT/2, which is obtained from Eq. (4.26):
V
c,min
= 1 ai (DT)
C2DT
2
T
aJ(DT) + V (O)
- 2C
T
c
(4.30a)
= _aJ DT+ V (0)
8C
c
and the maximum capacitor voltage occurring at t
Eq. (4.27):
V
= -
c,max
aJ
2C(l-D)T
=
(1 + D)T/2 as obtained from
((1 +D)
T- D r) + M ((1 + D) T- Dr)+ V (D T)
2
2C
2
c
2
(4.30b)
= :~(1-D) + Vc(DT)
Substituting for Vc(O) from Eq. (4.29) and using aJ = (DVin(l-D)T)IL, it can be
shown that vc, min and vc, max are expressed as follows:
V
. =V[1-(l-D)( 2 -D)T2]
vc,max
24CL
o
c,mm
=
vo [' + (l-D2)r2]
CL
24
(4.31a)
(4.31b)
Hence, the variation in the capacitor peak voltage is given by
and from Eqs. (4.31) we obtain
avc =~(1-D)
8LCj2
Sometimes it is useful to express the ratio of the ripple to the output voltage,
ave_
1-D
Vo - 8LCJ2
(4.32)
This term is known as the output voltage ripple and represents the regulation. As expected, when the filtering capacitor and the frequency increase, the voltage ripple
decreases.
Using Capacitor Charge to Evaluate !i Vc
Another useful way to evaluate the expression for a vc without having to obtain the
exact expression for vc(t) is to use the total charge, Q, deposited on the capacitor current interval. Figure 4.14 shows the waveform for ic and vc with areas of positive
4.2
145
Continuous Conduction Mode
charge(+) and negative charge(-). Because of waveform symmetry, t = DT/2 and
t = (1 + D) T 12 represent the ic zero crossing times when the capacitor voltage is
minimum, Vc, min , and maximum, Vc, max , respectively. Hence, the capacitor voltage
ripple is Ll Vc. The total charge stored in the capacitor between t = D T12 and
t = ( 1 +D) T 12 is obtained from the following equation:
dQ = cdvc
dt
dt
st<
So the total charge Q between capacitor current ic zero crossings (DT/2
(1 + D)T/2) is given by
(4.33)
However, since the total charge is related to the current according to the relation
._dQ
dt
l--
then we have
1 I(I+D)T/2
LlQ = - -
T/ 2
i dt =Area under the curve
DT/2
= ~( 1 + DT- P..r)~Lll
2
2
2
(4.34)
2
= ~I~Lli
222
From Eqs. (4.33) and (4.34), we obtain
LlVc =
g~LlJ
Substituting for Lll = (D Vin(l- D)T)/L, we obtain
LlVc 1 -D 2
-=--T
Vo
8LC
(4.35)
_ 1-D
--8LCj2
Consider a buck converter with the following circuit parameters: Vin = 20 V, V0 = 15 V, and
lo = 5 A, for f= 50 kHz. Determine: (a) D, (b) Lcrit, (c) maximum and minimum inductor
currents for L = lOOLcrit, (d) average input and output power, and (e) capacitor voltage ripple
for C = 0.47 ~-tF.
(a) D = 0.75
(b) Using R = 3 .Q and T = 20 J-LS, the critical inductor value is given by
Lcrit
(1-D)
2
= -
TR
= 7.5
~-tH
146
Chapter 4
(c) For L
Nonisolated Switch-Mode de-de Converters
= lOOLcrit = 750 JLH = 0.75 mH, we have
I
.
Lmm
= D V.
m
(.!.R _(1 -D)
T)
2L
= (0.75)(20)G-3.33 X I0-3)
]Lmin =
4.95 A
fLmax
= (0.75)(20)G + 3.33 X
]Lmax
= 5.05
I0-3)
A
(d) Since it is an ideal converter, the average output and input powers are given by
(e) The capacitor voltage ripple is given by
LlVo
1-D
Vo - 8LCj2
(1- 0.75)
8(0.75 mH)(0.47 JLF)(50 x 103)2
vdV
0
= 0.035 = 3.5%
0
EXAMPLE4.3
Design a buck converter with the following specifications: Ll V0 / V0 = 0.5%,
P 0 = 12 W, f= 30kHz, and D = 0.4.
SOLUTION
Vin
In order to design this converter, we need to calculate the values for L, C, and R.
The output voltage is given by
Hence, the output current is
The output resistance is
8
R = - = 5.33
1.5
n
The critical inductance for cern is given by
1-D
Lent =-2-TR
=(
1 )(30:
-20.4
= 53.3
JLH
103 }
33
= 20 V,
4.2
Continuous Conduction Mode
147
Let us select L = 600 JLH. Based on this value, the maximum and minimum inductor currents
are given by
1
Lmax
= DV.m (.!.R + (1-D)T)
L
2
=
(0.4)(20{5.~3 + 0.0167)
= 1.63 A
lLmin
=
(0.4)(20)( 5 .~ 3 - 0.0167)
= 1.37 A
The ripple voltage is given by
L1Vo
1-D
= - - =0.005
Vo
8LCj2
Solving for C,
C=
1-D
(8Lj2)0.005
C = 27.78 JLF
Redesign Example 4.2 to achieve an output ripple voltage not to exceed I% and an inductor
current ripple not to exceed I 0% at the average load current.
0.15 mH, 8.33 JLF, 3 fl
Determine the diode and transistor average and rms current values for Exercise 4.3.
1.25 A, 3.75 A, 2.5 A, 4.33 A
Show that the expression for the peak capacitor voltage at t = (I + D)T/2 is as given by Eq. (4.31b).
The Boost Converter
Basic Topology and Voltage Gain
Other possible switch and transistor-diode arrangements are shown in Fig. 4.15(a)
and (b), respectively. This topology is known as a boost converter since the output
voltage is higher than the input, as will be shown in this section.
148
Chapter 4
Nonisolated Switch-Mode de-de Converters
+
c
(a)
io
+
ic
c
R
v,
Figure 4.15 Boost converter. (a) Twoswitch implementation. (b) Transistordiode implementation.
(b)
Similar to the case for the buck converter, we assume all the converter components are ideal and the transistor switching waveform is as shown in Fig. 4.9(d)_
When the switch is turned on, the equivalent circuit of mode 1 is shown in
Fig. 4.16(a). This is a charging interval, and the voltage across the inductor is Vin•
and iL(t) is given by
iL(t) =
~ Vint + !L(O)
0::; t < DT
where JL(O) is the initial inductor current value at t = 0 .When the switch is turned
off at t = DT, the resultant equivalent mode 2 circuit is shown in Fig. 4.16(b).
The inductor voltage is Vin- V0 , and iL(t) is given by
DT::; t < T
s
(a)
D
+
c
(b)
R
v"
Figure 4.16 Equivalent circuit modes
for the boost converter. (a) Mode 1: The
switch is on. (b) Mode 2: The switch
is off.
=DT
Evaluating Eqs. (4.36) and (4.3 7) at t
fact that IL(T) = IL(O), we obtain
4.2
Continuous Conduction Mode
and t
= T,
149
respectively, and using the
(4.38a)
(4.38b)
From Eqs. (4.38a) and (4.38b), the resulting voltage conversion is given by
vo1
-V;n
1-D
(4.39)
Hence, the voltage gain is always greater than 1. Also from Eqs. (4.38), the inductor
ripple current is given by
(4.40a)
1
= -V DT
L
m
Substituting for V;n from Eq. (4.39), we obtain
!1! = ~ VOD(l- D)T
L
(4.40b)
Key current and voltage waveforms are given in Fig. 4.17.
Average Input and Output Currents
The input current is the same as the inductor current as shown in Fig. 4.17(a). Hence,
the average input current by inspection is given by
f. =
/Lmax
+ /Lmin
2
m
(4.41)
The average output current is the same as the average diode current and is given by
(4.42)
Since we assume an ideal converter, the average input and output powers must be
equal. Using Eqs. (4.41) and (4.42), we get
resulting in
f;n- Vo -----
10
V;n
(4.43)
1-D
As with the buck converter, the input-output current and voltage ratios are equivalent
to a de transformer with a transformer mode ratio equal to 1 I ( 1 -D) , as shown in
Fig. 4.18.
150
Chapter 4
Nonisolated Switch-Mode de-de Converters
iL
IL(DT)~-----~
1[(0)~
o
:or
:r
(a)
VL
I
I
I
I
I
I
-(Vo- Vin )
I
I
(b)
t-+-----------~+----_-_-_-_-_-_-_-_-~:-------~-"--------~·
I
I
f[(DT)
I
I
I
I
:
__
t
(c)
hmax -lo
-10 1 - - - - '
(d)
Figure 4.17 Current and voltage waveforms for the boost converter.
Figure 4.18 Equivalent transformer circuit representation for the boost converter.
Using Eqs. (4.38) and (4.42), we can solve for the maximum and minimum inductor current values:
IL(O) = ILmin =
vin (
1
DT)
R(l-D)2- 2L
1
I L (DT) --ILmax- Vin ( R(l-D)2
+ DT)
2L
-~·
(4.44a)
(4.44b)
4.2
Continuous Conduction Mode
151
For positive values of JLmax and /Lmin, the converter will operate in the continuous
conduction mode. To solve for the minimum critical inductor value that will keep the
converter in the cern, we set /Lmin to zero:
/Lmin
=0
Under this boundary condition, the critical inductor value is given by
(4.45)
Output Ripple Voltage
It is clear from Fig. 4.17 that when the diode is reverse biased, the capacitor current is
the same as the load current. Since we assume the load current is purely de, the
capacitor current is given by
0 '5:.1 < DT
ic = -Jo
DT'5:.t < T
ic=iL-Jo
The capacitor current waveform is shown in Fig. 4.17(d) and redrawn in Fig. 4.19
along with the capacitor voltage waveform. Mathematical expressions for ic can be
obtained directly from this figure.
The current iAt) is expressed mathematically as
ic(t) =
!!.I (t-DT)+I (DT)
(1-D)T
c
DT'5:.t'5:.T
0
-/() f...-------1
I
I
I
Vc(O)
Vr,
Vc(DT)
I
I
I
I
I
I
-----------t-------
I
---
====--====t--=========--L_l
0
I
I
I
I
I
I
I
I
I
I
I
I
I
I
DT
T
L\vc=
l"gT
Figure 4.19 Capacitor current and voltage waveforms for the boost converter, assuming
/Lmin
> /o ·
(4.46)
152
Chapter 4
Nonisolated Switch-Mode de-de Converters
where Ic(DT) is the initial ic(t) at t
given by
vc(t) =
= DT.
.!.ft -I
c0
0
dt
The capacitor voltage for 0:::; t < DT
+ Vc(O)
I
=- ~t+ Vc(O)
where Vc(O) is the initial capacitor voltage at t
At t = D T we have
= 0.
Since the average capacitor voltage is V0 , we can solve for Vc(O) and Vc(DT) as
Vc(O)
=
IODT
Vo + 2C
IODT
Vc(DT) = Vo- 2C
and the capacitor voltage variation is given by
For DT$ t < T the capacitor voltage is given by
vc(t) =
.!.fT
[ -M (t-DT)+Ic(DT)]dt+ Vc(DT)
c DT (1-D)T
I (DT)( 1 - D)T
+ Vc (DT)
C
AI
u
( -DT)2 + c
2-C--(.,._l---D--,)-T
t
The output ripple voltage is given by
Then the voltage ripple is given by
dVo _DT
vo - RC
- D
- RCJ
EXAMPLE4.4
Sketch the current waveforms for iL, iin• iD, i 0 , and ic for the boost converter with the following parameters: L = 1.8 mH, Vin =50 V, V0 = 120 V, R = 20 0., C = 147 J-LF, and
f= 15 kHz . Also sketch the voltage waveforms for vL, vsw, vc, and vD.
SOLUTION In order to sketch the waveforms, we need to find D, the maximum and minimum inductor
currents, and the average output current.
4.2
Continuous Conduction Mode
153
The duty cycle is given by
vo
Vin
= - - = 120
1-D
50
which yields D = 0.58
Using R = 20 fl and T = 66.67 J.LS , the maximum and minimum inductor currents are
given by
I
!Lmax = Vin ( (l-D)2R
DT) =
+ 2L
14.94 A
and
The average input and output currents are given by
f. =
IL
In
max
+ IL .
mm = 14 4 A
2
.
The capacitor peak currents are given by
/cmax
= /Lmax-
fo
= 8.94 A
/cmin
= /Lmin-
fo
= 7.86 A
Hence,
fj.Jc
= Ucmax- /cmin) = 1.074 A
Notice this value must be equal to !J.IL.
The capacitor voltage is given by
vJt)it=O = 120 V
vc(t)lr=DT =
-1
c'jDT+ 120 V
= -S. 9S A(0.58)(66.67 J.LS) + 120 V = 118.43 V
147 J.LF
Hence, the ripple is 1.57 V.
Design a boost converter with the following specifications: P 0 = 27 W,
Vin = 28 V, !J.V/Vo = 2%,fs =35kHz.
First let's determine the duty cycle, D:
D = 1 - Vin = 1 - 28 = 0.3
vo
40
For continuous conduction mode, the inductance minimum value is given by
V0 = 40 V,
154
Chapter 4
Nonisolated Switch-Mode de-de Converters
where
T = 28.57 J.tS
R
2
= v; = (40 > = 59.26 n
27
P0
Lcrit
= 124.44
J.tH
We choose L = 200 J.tH since L should be greater than Lcrit for cern operation.
The output ripple voltage is
~.Vo
V0
0.0
2
-
D
RCf
0.3
= (59.26)C(35 kHz)
C
=
7.23 11-F
EXERCISE 4.6
Determine the average and rms current values for the diode and transistor in Example 4.4.
ANSWER
4.2.3
8.4 A, II A, 6 A, 9.28 A
The Buck-Boost Converter
The third possible converter type is obtained by interchanging the diode and the inductor of the buck converter to realize the design of Fig. 4.20. This converter is
known as a buck-boost converter since its voltage gain can be less than, equal to, or
R
Vin
v,
+
(a)
io
ic
c
Vin
R
v,)
+
Figure 4.20 Buck-boost converter.
(a) Switch implementation. (b) Transistor-
(b)
diode implementation.