Jonathan Roderick
Hakan Durmus
Pre-lab
Experiment #8
(Pre-lab #6 revisited)
1)
Derive the expressions given for the Gain, input resistance and output resistance for the common collector
circuit in figure 6.5 (lab #6).
2)
Derive the expressions given for the Gain, input resistance and output resistance for the common base
circuit in figure 6.6 (lab #6).
3)
Derive the expressions for the gain, input resistance, and output resistance for the low-frequency commonemitter amplifier in Figure 8.1(schematic representation in experiment #5 figure 5.4). Using a 5v supply,
correctly choose values for the resistors, pictured in figure 5.4 of the last lab, so the transistor is properly
biased in linear operation, while also achieving a gain of 7. Use SPICE to verify your design and use the
Spice models given to you in your homework. Use the .op command to verify the bias currents and
voltages as well as the transistor gm for your circuit, then perform a .ac analysis to observe the frequency
response. Do a hand analysis and SPICE simulation to confirm your response.
Rin
Rout
Figure 8.1 An AC schematic diagram of a Common Emitter Amplifier.
4)
In lab, we have used the common-emitter canonic cells as an amplifier, as seen in figure 8.1, and as a filter,
as seen in figure 8.2. We now wish to combine the two in order to achieve a filter with gain. We first want to filter
the signal, and then we want to apply a gain to the desired signal. The question is how is this achieved. The system
diagram below represents this:
Input signal
Output signal
Filter
Amplifier
Load
With what you have learned so far, would it be adequate to just replace the boxes with the appropriate
canonic cells?
Your job:
A)
B)
C)
To design the following system using the appropriate BJT canonic cells and to explore, identify,
and address any design concerns that maybe present.
Modify the above system diagram and present a new system diagram to account for any design
concerns you were able to discover.
You will then build your system using the appropriate BJT canonic cells and verify your
suspicions in Spice.
Example of one design problem: Is the input impedance of the common-emitter amplifier high enough so
that it doesn’t affect the time constant of the filter? If not, how do you design the system so that the
impedance of the amplifier doesn’t affect the time constant of the filter?
VCC=5V
CD
Vs
RCC
RB2
RB1
CL
V0
REE
Figure 8.2 Band-pass filter.
Design Specs:
Band pass filter: Center frequency of 8.5k Hz
Bandwidth of 4k Hz
Amplifier:
Gain of 20
Ic=1mA
Load:
300 Ohms
Signals:
Input and output signals are both sinusoidal voltages
Input signal needs a magnitude of 10mV (You will actually build this, so you may need
to design a resistor divider to attenuate the output of the function generator if the actual
generator that you will use in lab has a min magnitude that is higher than 10mV)
Spice models:
Use spice and the BJT models that were given in your HW.
Jonathan Roderick
Hakan Durmus
Lab #8
1)
Build the circuit in figure 1, while making sure that you have biased it in the linear region
of operation. Design it to have a gain of three, while using a 5V supply. First measure
the input resistance, Rin, two ways:
A) Put a capacitor, Cc, in series with the input and measure the time constant.
B) Apply the ohm-meter method with a real supply; make sure all other independent sources are set
to zero.
Do parts (A) and (B) agree? Which way do you think is more accurate? Why? How could you increase
Rin? Remember what values you measure for Rin, you’ll need it for your final project.
Rin
Figure 1. A common emitter amplifier
2)
Build the system diagram in problem 4 of the pre-lab. Do this by just replacing the boxes with the
appropriate canonic cells. Since in was discovered before that really large gains might not be realized with
a single common-emitter amplifier, cascade a couple of them to get a gain of 20. Observe the output signal
across the source. Does it meet the filter and gain specifications that we stipulated?
3)
Build the new topology you designed for the pre-lab. Measure the gain and filtering characteristics of your
circuit. Record the % deviation of your circuit versus the one built for part 2? Does you design meet the
specifications in the pre-lab by ± 5%? If not tweak the design until you it does .