U niversity of S outhern C alifornia
School Of Engineering
Department Of Electrical Engineering
EE 348:
Homework Assignment #01
(Due 01/22/2001)
Spring, 2002
Choma
Problem #01:
Under commonly encountered operating conditions, Fig. (P1) is a valid linearized equivalent circuit of a voltage amplifier realized in bipolar junction transistor (BJT)
device technology. The input signal source is represented by its Thévenin equivalent circuit,
which consists of voltage source Vs and resistance Rs. The output, or response, to this input signal is the indicated voltage, Vo, which is developed across the shunt interconnection of load
resistance Rl and load capacitance Cl. The actual BJT is modeled by the current controlled current source, I, and the three resistances, ro, rb, and r. Typically, , which is dimensionless, is
of the order of 100 or so, ro is generally at least the mid tens -to- low hundreds of kilo-ohms, rb
can be as large as 200 , and r is of the order of a few thousand ohms. The resistance, Re, is a
circuit element used for biasing and linearity purposes. It is generally chosen to be of the order
of fifty to a few hundred ohms. Note that regardless of the nature and numerical value of the
transistor and circuit parameters, the model in Fig. (P1) is a linear active circuit, not unlike circuits encountered in the first circuit theory course.
Rs Rin
Rout
rb
Vo

Vs

r
I
ro
Rl
Cl
I
Re
Fig. (P1)
(a). Determine, and express as a function of Vs, the Thévenin equivalent voltage, say Vot, that
drives the load consisting of the shunt interconnection of resistor Rl and capacitor Cl.
(b). Derive an expression for the Thévenin equivalent resistance, Rout, facing the aforementioned shunt load impedance.
(c). Using the results of the preceding two parts of this problem, find the low frequency value
of the voltage gain, Vo/Vs, of the circuit. Simplify this gain expression for the case of infinitely large ro and large .
(d). Derive an expression for the low frequency input resistance, Rin, “seen” by the signal
EE 348
University of Southern California
J. Choma, Jr.
source. Simplify this resistance expression for the case of infinitely large ro.
(e). What is the time constant, say l, associated with the load capacitance, Cl? Simplify this
time constant expression for the case of infinitely large ro. What is the significance of this
time constant to the 3-dB bandwidth of the amplifier circuit?
(f). Take Rs = 300 , Rl = 1,000 ,  = 120, rb = 190 , r = 1.5 K, ro = 80 K, Re = 100
, and Cl = 10 pF. Calculate the low frequency voltage gain, the output resistance, Rout,
the circuit 3-dB bandwidth, and the gain-bandwidth product, say ωu, of the amplifier.
(g). Test the foregoing general mathematical expressions by examining the low frequency voltage gain, Rout, and the low frequency input resistance, Rin, by invoking the special case of 
= 0. Do the resultant simplifications of these respective solutions mirror expected results?
Problem #02:
In terms of the complex frequency, or Laplace variable, “s,” the voltage
gain, Vo/Vs, of the circuit depicted in Fig. (P1) can be written as
Av (s) =
Vo (s)
V (s)
s
=
Av (0)
1+
s
.
b
(a). What is the engineering significance of Av(0)? Using the results of Problem #01, give a
general expression for Av(0), as well as an expression for Av(0) approximated for the case
of infinitely large ro. Numerically evaluate these expressions, and compare the numerical
results.
(b). What is the engineering significance of ωb? Using the results of Problem #01, give a general expression for ωb, as well as an expression for ωb approximated for the case of infinitely large ro. Numerically evaluate these expressions, and compare the numerical results.
(c). Using the results of Parts (a) and (b) of this problem, numerically evaluate, both “exactly”
and approximately in accordance with a presumption of infinitely large ro, the gainbandwidth product, ωu, of the circuit.
(d). Upon studying the results of the preceding three parts of this problem, give an opinion as
to the engineering significance of the model parameter, ro.
Problem #03:
Reconsider the transfer function, given in Problem #02, of the amplifier in
Fig. (P1). Use EXCEL or similar other software to respond to Parts (a) through (d) of this
problem.
(a). Plot the generalized frequency response of the amplifier. Normalize the gain axis of this
frequency response to the zero frequency value of voltage gain, and normalize the frequency axis to the 3-dB bandwidth of the amplifier.
(b). Plot the generalized phase response of the amplifier. Scale the phase angle axis of this plot
in degrees, and normalize the frequency axis to the 3-dB bandwidth of the amplifier.
(c). Evaluate the input/output (I/O) steady state delay, say D(ω). Provide a plot of the normalized delay, ωbD(ω), versus the normalized frequency variable, ω/ωb.
(d). Evaluate the unit step response of the amplifier. Plot this response, normalized to its
steady state value, versus the normalized time variable, ωbt.
Homework #02
2
Spring Semester, 2002
EE 348
University of Southern California
J. Choma, Jr.
(e). In terms of ωb, determine the time, say Tr, required by the amplifier to achieve a step
response that equals 90% of its steady state value.
Problem #04:
Under very high frequency operating conditions, Fig. (P4) is a reasonable
approximation of the equivalent circuit of a tuned amplifier realized in submicron metal-oxidesemiconductor field-effect transistor (MOSFET) device technology. The indicated circuit
architecture is a simplified version of a radio frequency (RF) amplifier commonly utilized in the
front end of a radio receiver or cellular telephone. The input signal source is represented by its
Thévenin equivalent circuit, which consists of voltage source Vs and resistance Rs. In an RF
application, the Thévenin resistance, Rs, generally represents the characteristic impedance of the
transmission line that couples the antenna signal source to the amplifier input port. The output,
or response, to the input signal, Vs, is the indicated voltage, Vo, which is developed across the
load inductance Lo. The actual MOSFET is modeled by the frequency dependent current controlled current source, (ωT/s)I, and the capacitance, Ci. Typically, ωT is of the order of the mid
tens of giga-radians/sec, while Ci is typically in the range of the mid tens of femptofarads. The
inductance, Li, is a circuit element that is exploited to achieve maximum power transfer between
the applied input signal and the amplifier input port, whose input impedance is delineated as
Zin(s). Note that regardless of the nature and numerical value of the transistor and circuit parameters, the model in Fig. (P4) is a linear active circuit, not unlike circuits encountered in the
first circuit theory course.

Zin(s)
Rs
( s T )I
Ci
I
Vo

Vs
Li
Lo

Fig. (P4)
(a). Show that the indicated input impedance, Zin(s), is expressible as,
Z (s) = R
in
eff
+ sL
eff
+
1
.
sCeff
Give, in terms of Ci, Li, and ωT, expressions for the effective input resistance, inductance,
and capacitance, Reff, Leff, and Ceff, respectively.
(b). Let the resonant frequency of the input impedance be denoted as ωi. What is ωi in terms of
inductance Li and capacitance Ci? What design condition must be satisfied at the resonant
frequency to achieve a match terminated input port; that is, Zin(jωi)  Rs?
(c). Show that under steady state sinusoidal operating conditions and the match terminated
constraint focused upon in the preceding part of this problem, the voltage gain of the RF
amplifier can be written in the form,
Homework #02
3
Spring Semester, 2002
EE 348
University of Southern California
Av (jω) =
Vo
= 
Vs
Lo 2Li

 
1 + jQ 
 i

 
 i
J. Choma, Jr.
,
where Q is the quality factor associated with the input amplifier port at the resonant frequency, ωi.
(d). With a source resistance, Rs, of 50 , a desired tuned center frequency, ωi, of 2(1200
MHz), and a transistor that has ωT = 2(20 GHz), compute the requisite values of output
inductance, Lo, tuning inductance, Li, and circuit quality factor, Q for a tuned center frequency gain magnitude of 20 dB.
Homework #02
4
Spring Semester, 2002
EE 348
University of Southern California
J. Choma, Jr.
U niversity of S outhern C alifornia
School Of Engineering
Department Of Electrical Engineering
EE 348:
Homework Assignment #01
(SOLUTIONS: Due 01/22/2001)
Spring, 2002
Choma
Problem #01:
Homework #02
5
Spring Semester, 2002