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Asymmetric Real Time Scheduling on a
Multimedia Processor
February 1, 1998
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Download PDF
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BibTex
Authors

Alessandro Forin

Andrew Raffman

Jerry Van Aken
Publication Type
TechReport
Pages
15
Number
MSR-TR-98-09

Abstract

Related Info
Abstract
This paper describes the hardware and system software support for multi-tasking a dualprocessor used in a multimedia system. One of the two processors is a conventional RISC
processor, the other is a vector processor of new design. There is no commonality in the
instruction sets of the two processors. We schedule the former preemptively and the latter
cooperatively via check points, resulting in an asymmetric scheduling algorithm. Media
processing requires predictable scheduling behaviors. Programmers can inform our scheduler of
the Real Time requirements of their computations using time-constraints. Scheduling decisions
are very fine-grained, and place strong efficiency demands on the system implementation.
Related Info
Related Files
 tr-98-09.doc
Research Areas
 Hardware, devices and quantum computing
Research Labs
 Microsoft Research Lab - Redmond
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