An Ultra Low Power System
Architecture for Sensor Network
Applications
Mark Hempstead, Nikhil Tripathi, Patrick Mauro,
Prof. Gu-Yeon Wei, Prof. David Brooks
Division of Engineering and Applied Sciences
Harvard University
Cambridge, MA
Overview
• Wireless sensor networks (WSN) are
constrained by energy consumption
• Goal: Average power consumption <100 µW enables
energy scavenging methods
• Our architectural approach:
•
•
•
•
Holistic approach
Event-driven architecture
Modular hardware accelerators
Fine-grain power management
• In the implementation phase
2
Outline
• What are sensor networks?
• Project motivation and design constraints
• Event-driven architecture
• Performance and power estimates
• Conclusion and future work
3
Sample Application Space
• Monitoring Apps
• Structural/Earthquake/Weather/Habitat monitoring
• Building/Border/Battlefield detection
• Road/traffic monitoring
• Medical Apps
• Long-term health monitoring
• Untethered Pulseox Sensors
• Business Applications
• Supply Chain Management
• Expired/Damaged Goods Tracking
• Automatic Checkout Systems
4
Example App: Great Duck Island
• Great Duck Island (GDI), Maine - (UC Berkeley)
•
•
•
Gather temp, humidity, IR readings from Leach's Storm Petrel
burrows and weather station motes
Determine occupancy of nests to understand migration patterns
Total of 150 nodes deployed in 2003, over 650,000 observations
taken
• Performance Requirements are Low
•
Samples taken and transmitted once every 5 min
• Power consumption limited lifetime of deployment
Single Hop Network
Multi-Hop Network
R. Szewczyk et al. An Analysis of a Large Scale Habitat Monitoring Application. ACM
Conference on Embedded Networked Sensor Systems (SenSys), 2004.
5
Example Sensor Network Node
Low Power
Low Throughput
TinyOS for Event Driven
Wireless Communication
and Adhoc Networking
Programmable CPU
Battery Operated
Interface to
Various Sensors
Small Form Factor
Mica2 Mote – Designed by UC Berkeley, Manufactured by Crossbow
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Energy is the primary limitation
CPU Mode
Current @3V
Radio Mode
Current @3V
Active
8.0 mA
Receive
7.0 mA
Idle
3.2 mA
Transmit Min Power
3.7 mA
Standby
216 µA
Transmit Max Power
21.5 mA
Sensor Board
0.7 mA
Power-save 110 µA
• Mica2 Power Consumption Measured by component
• Not the complete picture, how is power consumed in
an application?
V. Shnayder, M. Hempstead, B. Chen, G. Werner-Allen, M. Welsh. Simulating the Power
Consumption of Large-Scale Sensor Network Applications. (SenSys'04).
7
Application-level Power Analysis
Total energy consumption per component of
“Surge”, a multi-hop routing application, run
for 60 sec on the Mica2 mote.
SensorBoard
6%
CPU
35%
Due to General
Purpose architecture
of CPU
Requires software
overhead to run
TinyOS
Radio
59%
Can be decreased at application and protocol
levels however this requires more CPU
computation
Design Goal: Average Power consumption of < 100 µW to enable
energy scavenging methods. Where should design energy be
focused to decrease energy consumption?
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Regular Application Behavior
Sense and Transmit
Abstract View
Timer
Interrupt
Collect Sensor
Data
Prepare
Message
Send Radio
Message
Example - GDI
Every 5 min
Burrow Occupancy
- infrared
- humidity
- Pack data in
packet
- Calculate
checksum
- wait for
acknowledgement
Receive and Forward
Message
Arrives
Decode
Message
Search Routing
Table
Resend Radio
Message
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Flexibility/Programmability
Key goals of our architecture
General Purpose
CPU
Remove
Software
Overhead
OUR SYSTEM
Retain
Programmability
ASIC
Energy Efficiency
•
•
•
•
•
•
Event-driven computation
Hardware accelerators for power-efficiency
Exploit regular operations
Optimize for sensor net workloads
Modular design
Fine-grain power management
10
Abstract view of architecture
Shared
Memory
Radio
Transceiver
General Purpose
Event
Microcontroller
Processor
Slave
Blocks
Sensors
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Detailed view of architecture
Radio
Addr/Data
Event
Processor
Interrupt
Power Ctrl
SRAM
Sensors
Addr/Data
System Bus
Micro
Controller
Message
Processor
Data
Filter
Timer
• Regular events
mapped solely to
EP and slaves
• Micro Controller
included for
irregular events
• Slaves provide
application
specific HW
• All resource
usage is explicit
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Event Processor
• Interrupts invoke EP interrupt service routines
• 8 instructions
• 4 power control/control transfer
• 4 read/write/transfer data to devices
READY
Interrupt to
LOOKUP
process
Lookup is
complete
FETCH
EXECUTE
Fetch Complete
Fetch Next
Instruction
ISR Complete
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App. Example: Sense + Transmit
System Initialization/Reprogram
Collect Sensor
Data
Prepare
Message
Micro
Controller
Sensors
Radio
Addr/Data
Event
Processor
Interrupt
Power Ctrl
SRAM
System Bus
Timer
Interrupt
Message
Processor
Data
Filter
Timer
Send Radio
Message
Configuration written to memory and timer
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Example: Sense + Transmit (2)
Collect Sensor
Data
Prepare
Message
Send Radio
Message
Micro
Controller
Radio
Addr/Data
Event
Processor
Sensors
Addr/Data
Interrupt
Power Ctrl
SRAM
System Bus
Timer
Interrupt
Message
Processor
Data
Filter
Timer
Pseudo Code
<timer intaddr>:
SWITCHON <sensor>
SWITCHON <message proc>
TRANSFER <reading size> <sensor addr><message proc addr>
SWITCHOFF <sensor>
WRITEI <ctrl_wrd> <message proc>
TERMINATE;
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Example: Sense + Transmit (3)
Collect Sensor
Data
Prepare
Message
Send Radio
Message
Micro
Controller
Radio
Addr/Data
Event
Processor
Interrupt
Power Ctrl
SRAM
Sensors
Addr/Data
System Bus
Timer
Interrupt
Message
Processor
Data
Filter
Timer
Pseudo Code
<message proc mesg. ready intaddr>:
SWITCHON <radio>
TRANSFER <mesg size> <message proc> <radio>
SWITCHOFF <message proc>
WRITEI <ctrl_wrd> <radio>
TERMINATE;
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Example: Sense + Transmit (4)
Collect Sensor
Data
Prepare
Message
Micro
Controller
Radio
Addr/Data
Event
Processor
Send Radio
Message
Interrupt
Power Ctrl
SRAM
Sensors
Addr/Data
System Bus
Timer
Interrupt
Message
Processor
Data
Filter
Timer
Pseudo Code
<radio, message sent intaddr>
SWITCHOFF <radio>
TERMINATE;
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Example: Sense + Transmit (5)
Collect Sensor
Data
Prepare
Message
Send Radio
Message
Micro
Controller
Radio
Addr/Data
Event
Processor
Interrupt
Power Ctrl
SRAM
Sensors
Addr/Data
System Bus
Timer
Interrupt
Message
Processor
Data
Filter
Timer
System Idle
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Implementation
• Process technology study (see paper)
• Does Moore’s Law help us?
• Leakage power increasing concern
• Tradeoff active power and leakage power
• Architectural enables low power circuit
techniques
• Fine-grain power management – VDD gating
• Simple Circuit Implementation
•
•
•
•
Synchronous design
VDD roughly 2VT
Performance Target: 100 kHz
Possible to use less common circuit design
styles (subthreshold, asynchronous)
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Initial Results
• Developed performance model for system
architecture in SystemC (~8K lines of code)
• GP microcontroller, event processor, slave
blocks, radio
• Power Model
• VHDL for Event Processor + Key Blocks
• Custom design (SRAM, CAM)
• 0.25 µm Process Technology
• Workload Analysis and early comparison to
other architectures included in the paper
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Performance Comparison
1600
1400
Mica-2
ED Arch
1200
1000
Cycles 800
600
400
200
0
Total send Total send Receive and
path without path with
process a
filter
filter
regular
message
Timer
change
Threshold
change
Roughly 10x cycle-reduction justifies 100KHz clock speed
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Power estimates
100000
ED Active
ED Idle
Mica2 Active
Mica2 Idle
10000
1000
100
uW
10
1
0.1
0.01
0.001
0.0001
Event
Processor
Timer
Message
Processor
Memory
Threshold
Filter
System
Unknown blocks: GP microcontroller, busses, off-chip interfaces
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Conclusion/Future work
• Wireless Sensor Networks provide unique
opportunities for low power, low throughput
design
• Architecture meets design goals
• Less than 100 µW average power consumption
• Event Processor provides event handling in HW
• HW slaves provide application specific
processing for regular tasks
• Fits sensor network application characteristics
• Implementation phase of first chip
• Stay Tuned!
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