Automated synthesis of 8-Output Voltage Distributor using Incremental
Evolution
Yerbol Sapargaliyev, Tatana G. Kalganova
School of Engineering and Design, Brunel University
Uxbridge, Middlesex, UB8 3PH, UK
{Yerbol.Sapar, Tatiana.Kalganova}@brunel.ac.uk
Abstract
The automated synthesis of the analog electronic
circuit, including both the topology and the numerical
values for each of the circuit’s component, is recognized
as a difficult problem. This problem is aggregating
considerably when the size of a circuit and the number of
its input/output pins increases.
In this paper for the first time the method of automated
synthesis of the analog electronic circuit by mean of
evolution is applied to the synthesis of multi-output
circuit, namely 8-output voltage distributor, that
distributes the incoming voltage signal among the outputs
in filter-like mode. Using the substructure reuse, dynamic
fitness function and incremental evolution techniques the
largest analogue circuit has been evolved in the area that
has 138 components.
1. Introduction
The Evolutionary Electronics is one of the most
promising areas of today’s electronics. It is also known as
automatic design of electronic circuits with help of
Evolutionary Algorithm (EA). EA together with a circuit
simulation tool (or the real hardware) automatically
designs the circuit for the given problem. The circuits
evolved may have unconventional designs. The EA is
nowadays mostly represented by Genetic Algorithm,
Genetic Programming, or Evolutionary Strategy (ES). The
general idea is the EA navigated by fitness values,
provides randomly created and mutated chromosomes.
Each chromosome encodes the structure for a circuit in
the form of a genotype and has to be evaluated by a fitness
function. The fitness function assigns each chromosome
with a fitness value that defines how close the current
hardware is to the target by its functional characteristics.
Selecting the best chromosomes by their fitness, cloning
them (and/or crossing them over), mutating and evaluating
them compose the full cycle of the search process.
According to the Darwinian laws of natural selection,
running the cycle repeatedly will lead to the best
individual. The successful circuits most of all depend on
the evolutionary technique that one has worked out and
applied. The evolutionary technique is a set of rules
according to which, parameters of EA (e.g., mutation rate,
crossover, selection), genotype length varying strategies
[3], mutation types and the circuit representation
techniques are designed and managed.
Despite that recently the EA was successfully applied
to the design of the range of analog circuits (low-pass
filters [1], [2],[4],[6],[8],[9],[13]-[17],[20]-[22],[24],[25],
high-pass
filters[1],[14],[17],[20],[22],
amplifiers
[1],[4],[7],[11],[13],[18][19],[19],[20],[24],[26],[27],
digital-to-analog and analog-to-digital converters [1],[5],
computational circuits [1], [3],[23], other kind of circuits
[1],[8],[11]), all the previously reported designs were the
analog circuits with maximum two outputs [1]. By
contrast with the evolutionary design of digital circuits,
where the scalability problem caused by numerous inputs
and outputs is tackled ([29],[30],[31]), in the analog
domain we could not find any similar example.
One reason is that the analog circuit with multiple
outputs is supposed to perform a complicated signal
processing providing the package of high-ordered output
signals (in time) to the circuit’s outputs. The size of such
kind of circuit may count hundreds of components that
expand the solution space to search in drastically (about to
b2k3l+ck+l, where k and l are the numbers of 2-pin and
3-pin components in the circuit and b, c are some
constants).
In this paper we described the successful attempt to
overcome this issue by applying ES to the design of 8output Voltage Distributor. The conventional method of a
circuit design could easily solve this task by utilizing the
up-to-date digital signal processing circuits, such as
controllers
with
built-in
analog-digital-analogue
conversion. However, purely analogue circuits, in
comparison with digital ones, can provide considerably
shorter delay in the circuit response and suggest the
economy in components. The last argument becomes more
vital if the difference in components between the
competing circuits reaches hundreds of times.
The next section overviews the previous work in the
area. Section 3 introduces the whole evolutionary
technique. Section 4 describes the experiment. And,
finally, the last section concludes the paper.
2. Previous work
The importance of analogue evolutionary circuit design
is well described in [3] and [6]. In Table 1 we included
the majority of the works in evolutionary analogue circuit
design. Most of the works start from evolving a passive
low-pass filter which consist of R,C,L components. A
low-pass filter is a convenient tool for the probation of
evolutionary technique and tuning the EA parameters
towards the more sophisticated designs [9].
The second stage of probation of the technique is
usually undertaken over the circuits that have already been
evolved previously by other researchers, however these
are much more sophisticated and consisted of R,C,L and
Q (npn/pnp) components. Obtained by authors the
computational circuits [10] encouraged to approach more
complex circuits targeting the analog circuits that never
have been designed before due to their complexity. The
evolutionary design of complex circuits are numerously
instantiated in digital domain, where according to [30]
“designers have introduced various approaches, which can
be divided into three classes: functional level evolution,
incremental evolution and development”. Among these
methods only “divide-and-conquer” ([1],[12]) were
distinctly utilized in analog domain, however, as it can be
seen from Table 1, the targeted circuits there were not
complex enough to fully exploit the potential of the
proposed techniques.
The experiment described in this paper utilized the
incremental evolution, last one we see as a case of more
general “divide-and-conquer” approach. Incremental
evolution has widely been exploited in digital circuit
synthesis (i.e. [28], [30]). The essence of incremental
evolution lies in decomposing the target into subtargets
that are supposed to be evolved more easily than initial
target. In our case, the 8-output Voltage Distributor was
decomposed into 8 separate subcircuits each of which was
connected to the same one source and had its own output
(Figure 1). The evolution started from the first device and
upon the completion of the task moved to the next one,
and continued until it finally designed the 8-th subcircuit.
The experiment is accepted as finished if all 8 subcircuits
evolved with satisfied fitness. Since the experiment ran
non-stop throughout all eight substages, the dynamic
fitness function was introduced similar to “adaptive fitness
schedule” from [7] that is, the fitness function was
incremented “whenever the current fitness threshold was
reached by at least one chromosome in a population”.
Table 1. Notable advances on the evolution of analog circuits. SA is Simulated Annealing, CS is Clonal Selection,
D&C is Divide-and-Conquer, Dev is Development
Method
Maximum
inputs/outputs of
evolved circuits
Maximum
circuit size
evolved
No
No
1/1
22
Yes
D&C
3/3
64
No
No
No
No
No
No
No
No
No
Dev
No
Dev
No
No
No
1/1
1/1
2/2
1/1
2/1
1/1
1/1
1/1
1/1
1/1
1/1
2/1
1/1
1/1
1/1
23
12
19
10
18
22
41
66
33
19
17
46
11
7
15
Year
Type of
EA
Parameter
optimization
Substructure reuse
Kruiscamp et al [27]
1995
GA
No
Koza et al [1]
1997
GP
No
Lohn et al [6]
Goh et al [13]
Zebulum et al [4]
Grimbleby [15]
Dastidar, et al [18]
Ando et al [14]
Sripramong et al [19]
Shibata et al [23]
Alpaydın et al [26]
Fan et al [16]
Chang et al Su [21]
Mattiussi et al [8]
Xia et al [24]
Gan et al [20]
Das et al [22]
2000
2000
1998
1999
2005
2003
2002
2002
2003
2002
2006
2007
2007
2007
2007
GA
GA
GP,GA
GA
GA
GP,GA
ES+SA
GA
ES+SA
GP
GP
GA
GA
CS
GA
No
No
No
GA
GA
GP,GA
hill-climbing
GA
No
No
No
No
No
No
GA
No
No
No
No
Yes
No
No
No
No
Yes
Yes
Yes
No
No
No
Wang et al [12]
2008
GP
GA
No
D&C
1/1
13
Kim et al [25]
2009
ES
GA
No
No
1/1
14
Sapargaliyev et al [9]
2006
ES
No
No
No
1/1
27
Sapargaliyev et al [10]
2009
ES
No
Yes
1/1
44
In this paper
2009
ES
No
Yes
No
Increme
ntal
1/8
138
3. Evolutionary technique
3.3 Program structure and mutation types
3.1. Representation and embryo circuit
We suggest five types of components that the targeted
circuit would consist of: NPN bipolar transistor (Qn),
PNP bipolar transistor (Qp), resistor (R), inductor (L) and
capacitor (C). The linear (direct) circuit representation is
proposed for use, similar to one that exploited in [4],
where is every component of a circuit is represented as a
particular gene, and each gene consists of exactly 4 loci
corresponding to component’s features: component’s
name, component’s nodes and component’s parameter
(except Q). In such a way the whole circuit is represented
by the column of genes that called “chromosome” of that
particular circuit. The chromosome looks exactly the same
as the PSPICE netlist, so, there is no necessity to convert
the genotype into the netlist.
Figure 1. Embryo circuit
Figure 2. The N-output
Voltage Distributor
The embryo circuit is a group of components
(including a source of input signal) that is predetermined
for the particular circuit. Mostly, these components are
located at the circuit’s inputs and outputs.
On Figure 1 there is the embryo for 8-out Voltage
Distributor. It consists of source of input signals (V_IN),
eight source resistors (Rs) and eight load resistors
(Rl1…Rl8). The embryo also have two sources of direct
voltage suggesting the evolution to choose between (or
use both) 15V and 1.5V.
Figure 3 generally shows the algorithm of the
experiment. It consists of 4 main blocks that have been
coded and united in one C++ program.
Figure 3. The flowchart of the experiment
The Start-block provides the population of embryo
chromosomes in the form of PSPICE netlists to the ES
block. At this stage the embryo is cloned to amount of the
population number, and then every clone is grown up
randomly with the help of 5 starting components
described in section 3.1.
The ES block contains and applies the particular
parameters of ES, such as: mutation rate, population size,
selection criteria (fitness function) and termination terms.
First of all, the ES block gets the whole population of size
P with the fitness value assigned to each chromosome
from the previous block. According to the prescribed
selection value S% (usually from 1 chromosome to 50%
of the total population), it chooses the best S% of the
chromosomes as parents for the next generation. Then, the
ES block clones each of the selected parent chromosome
in amount of (P*S/100) per individual that makes the
population complete again.
After that, the block applies the mutation procedure to
each individual. There are totally 4 types of mutations,
which are the Add_new_component_mutation (ANEM),
the
Delete_component_mutation
(DEM),
the
Circuit_structure_mutation (CSM), last one includes 3
subtypes: component_name_mutation, component_pin_
mutation and component_parameter_mutation. We also
regarded the Substructure_reuse_mutation (SRM), during
which the group of genes are modified at one procedure,
as another type of mutation, since it is just another way of
chromosome modification. Each mutation modifies M%
of the total amount of the chromosome’s loci, where M is
the prescribed mutation rate value (usually varying from 0
to 10%). Since any gene (whole component) contents
exactly of 4 loci, the ANEM and DEM modifies
(adds/subtracts) the chromosome per fours loci at least,
whereas CSM mutates per ones loci. So, to mutate 5% of
the chromosome with 20 genes (80 loci) means to modify
only 4 loci, which is achievable by applying one ANEM
or one DEM procedure or applying CSM four times.
In general, the behavior of the chromosome’s length
(circuit size) during evolution corresponds to “oscillating
length genotype strategy” proposed in [4], where the
chromosome’s length can grow-up as well as short in size
down.
Getting the cir-batch-file from Block 2 (ES block), the
Block 3 starts PSPICE, simulate and saves the results in
out-file. PSPICE is utilized in non-interactive batch
simulation mode.
Block 4 contains the fitness function. It reads all
chromosomes one by one from out-file, evaluates them
assigning the fitness, selects the best S%, ranges them and
sends the results to the Block 2.
design of the first subcircuit, the second task was the
design of both the first and the second subsicruts, the third
task was a design of the first, the second and the third
subcircuits and so on. Finally, the 8-th task was a design
of all 8 subcircuits that is the whole Voltage Distributor
circuit. For each task the new fitness function was
introduced, that incrementally counted the fitness of all
subcircuites evolved at the time.
3.4 Targeted circuit and the incremental
evolution
The main advantage of such the approach was the
possibility to start the evolution of the next subcircuit (i.e.
the 3-rd) based on the reuse of the previously evolved
subcircuits (i.e. the 1-st and 2-nd). Due to the similarity of
functions that subcircuits are going to perform, the
evolution’s task (except the first subcircuit) was just to
reprocess the previously evolved sibcircuits to the new
subcircuit with a new pass band.
There are two types of substructure reuse that we
implied in the frame of this work. The first one is one of
the mutations (SRM) applied to chromosomes using as
substructures the fragments of successful chromosomes.
Another kind of reuse was applied during incremental in
between the transition from one subcircuit to another
using as substructures the whole subcircuits evolved in
previous substages. If the place for the first substructure
inside the circuit is randomized, the place for the second
one is definite: between source and load resistors on
Figure 1.
The general view of the N-output Voltage Distributor is
presented on Figure 2, where in our case N=8. As an input
signal for targeted circuit we took the piecewise voltage
form starting from 0V, going up to 5V for 3.5sec and
down to 0V for last 1.5sec. (Figure 4.). The task for each
output was working in filter-like mode that is to pass the
input signal that located within particular voltage band,
saving the form of the input signal. That is, the band-pass
width for each of the output was the same and equaled to
0.625V: the 1-st output passed the only voltages from 0 to
0.625V), the 2-nd output passed the only voltages from
(0.625-1.25V), the 3-rd band-pass was (1.25-1.875V) , the
4-th was (1.875-2.5V), the 5-th was (2.5-3.125V), the 6-th
was (3.125-3.75V) , the 7-th was (3.75-4.375V) and
finally the 8-th was (4.375-5V). The summary of transient
analysis at input and eight output pins of the targeted ideal
8-out Voltage Distributor is presented on Figure 4. As
could be seen, the graph on Figure 4 must exactly repeat
the form of the input piecewise signal.
As mentioned above, the incremental evolution was
introduced for design of 8-output Voltage Distributor. The
fitness function were incremented each time whenever the
current task was fulfilled. Totally 8 tasks corresponding to
8 subcircuits were set. Each subcircuit was responsible to
get the incoming signal and to provide the outcoming
signal to the corresponding output. If the first task was a
Figure 4. The united transient analysis of potential at
input and eight output pins of the targeted 8-out
Voltage Distributor.
3.5 Fitness function and experiment
implementation
The dynamic fitness function scheduled to each
incremental substage as a simple sum of the fitness values
of all subcircuits evolved at the time. The final fitness
function of the 8-output Voltage Distributor was
i 8
F=  F i , where Fi is a fitness value of the
i 1
subcircuit i that calculated by the following way: we made
the OrCAD PSPICE simulator to perform transient
analysis at each output for 5 seconds at 81 equidistant
time-points; a fitness value was set to the sum, over these
81 fitness cases of the absolute weighted deviation
between the target value and the actual output value
voltage produced by the circuit; the fitness penalized the
output voltage by 10 if it was not within 50% of the target
voltage value. The smaller the fitness value, the closer the
circuit to the target. The termination criteria for the whole
circuit was the fitness value was not improve over 20
consecutive generations, or if the best subcircuit exceeded
100 components.
The condition for stopping the
evolution of current subcircuit and getting to another was
whether fitness exceeds the fitness threshold (0.05) or the
generation number exceeds 200.
The Evolutionary Strategy with linear representation
and oscillating length genotype was utilized. 1%-selection
scheme was applied that is S=1% of the best
chromosomes were chosen for the next generation. Being
chosen for the next generation each chromosome
contributed 100 new chromosomes for the next
population, thus, totally 1% of the selected chromosomes
generated 100% population of the next generation. The
evolutionary strategy is deserved the name of the simplest
evolutionary algorithm, because it doesn’t content the
crossover operation: all the offspring chromosomes are
identical to a correspondent parent. A static mutation rate
of 5% was allowed to apply to each chromosome by one
of the mutation instruments described in subsection 3.3.
Population size of 30,000 chromosomes was set. We
used 5 PCs with Intel Core 2 Duo/2GHz processor
running at the same time independently from each other.
The results presented in the next section are the best out of
the 5 runs for each case with different seeds for the
random number generator.
4 Experimental Results
The average time of the evolution of the 8-out Voltage
Distributor was 344 hours, which is about 43 hours per
subcircuit. The best-of-run circuit (Figure 5) appeared at
629-th generation and had 138 components (embryo
excl.), among which 38 resistors, 8 capacitors, 7
inductors, 46 NPN transistors and 39 PNP transistors,
with the best overall fitness 1.757. Table 2 highlights the
detailed information per incremental substage: the best
fitness, the component number of the evolved subcircuit
and the successful generation number. The most ideal
signal with fitness 0.028 was provided by out-pin No.2
that responsible for band 0.625V-1.25V; the worst reply
with fitness 0.797 was at the out-pin No.7 in band 3.75V4.375V. Figure 6A shows the transient reply of the circuit
for the incoming piecewise signal.
Table 2. The summary of evolved 8-out Voltage
Distributor and its composed subcircuits.
Fitness Component
Generation
No
succeed
Subcircuit 1
0.095
10
76
Subcircuit 2
0.028
22
132
Subcircuit 3
0.174
16
110
Subcircuit 4
0.323
23
37
Subcircuit 5
0.049
14
26
Subcircuit 6
0.200
23
107
Subcircuit 7
0.797
22
104
Subcircuit 8
0.089
8
37
Total
1.757
138
629
To verify that circuit we had got worked properly we
applied the different arbitrary signals to it. Figure 6B
shows the more complicated piecewise signal and the
transient reply at outputs. Figure 6C shows the arbitrary
sinusoidal signal applied and the transient reply of the
circuit. As could be visually noticed each particular
subcircuit gives accurate replies throughout the different
examples, what enables us to assume that the relative
fitness of each of the subcircuit as well as the whole
circuit less of all depends on the characteristics of the
incoming signal.
5 Conclusion
In this paper we described the application of the ES to
the design of analog multi-output circuit, namely 8-output
Voltage Distributor. To succeed with the target we
utilized the linear representation, oscillating length
genotype strategy, four types of mutation including the
substructure reuse and the incremental evolution together
with the dynamic fitness function that led us to the
universal Voltage Distributor circuit with 8 outputs and
with the largest component number for evolved analog
circuits 138.
The technique described is plain with simple algorithm
that could be easily reconstructed.
R0
1.5V
R1
1.8k
270K
Qn6
Qp0
Rl1
Qp1
Rs1
Qn0
V_OUT_1
15V
Qn2
Qn4
10
1.5V
30
R2
9.4k
Qn3
15V
C1 2.7E-5
C0
33n
1.5V
R3
1.8k
Qp7
Qp2
R8
390
Qp4
R18 2.7E+7
1.5V
Qp3
Qn5
Qn8
Qp6
R7
Qp9
1.5V
15V
Qn7
30
Qn10
R4
R10
Qn14
1E+3
R5
15V
C2
1.5V
3.9n
C3
39n
Qp13
1.5V
3.9E+4
R9
47
Qp10
1.2E+5K
1.5V
Rl3
Qn12
Qp14
30
Qp11
Qn11
R19
1E+5
R37 1E+5
10
Qn13
15V
15V
1.5V
L1 2.7M
Qn20
R13
Qn17
Qp18
Qn15
Rl4
R16 12K
30
R17
82K
R14
1E+5
15V
Qp16
Qn18
R12
L0
Qn16
C4
2.7E-3
1.5V
Qn19
3.3K
2.7M
Qp17
Qp15
R20 68K
15V
1.5V
R15 56K
Qp37
1.5V
R23
470
V_OUT_4
10
1.5V
R11
1.8K
V_IN
Qn45
Qp19
12K
Rs4
V_OUT_3
Qp12
15V
Qn28
V_OUT_2
10
150K
Qp5
15V
Qn9
Rs3
Rl2
Qp8
1.5V
Rs2
L5
L4 0.68
56M
Rs5
1.5V
Qn22
Qn23
30
Rl5 10
Qp21
15V
V_OUT_5
Qn25
R21
1.8K
Qn21
1.5V
Qn24
Qp22
Qp20
1.2K R22
15V
R27 1.2K
L6
Qn26
15V
68M
R24
1.8K
1.8E-4
C6
R26 180
15V
Rs6
1.5V
Qn29
C7
27n
Qp23 Qp27
Qn27
30
Qn30
10
R28 180K
Qp29
Qn36
15V
Qp25
V_OUT_6
1.5V
Qn31
Qp24
Rl6
Qp35
R29 18K
Qp26 R25 68
Qn47
15V
15V
Rs7
30
R31 2.2K
15V
Qp30
Qp33
Qp32
Qn37
Qn35
Qp34
Qn33
1.5V
Qn39
Qp31
Qn34
1.5V
15V
R33 2.2K
R35
1.5V
1E+9 R30 820
Qn41
15V
Rl7
V_OUT_7
Qn38
1.5V
Qn42
Qn40
15V
R32
4.7K
1.5V
10
R34
C5
82n
1.5K
Qp39
15V
Qn43
Qp38
Qn46
L3 0.33
Rl8
1.5V
Rs8
Qn44
15V
L2 6.8M
Qp36
30
15V
R36 18
Figure 5. The evolved 138-component 8-output Voltage Distributor
10
V_OUT_8
A
B
C
Figure 6. The summary of transient analysis at input and outputs of the 8-out Voltage Distributor. A-the input
signal is a piecewise signal used in evolution, B-the input signal is an arbitrary piecewise signal applied for the
circuit verification, C-the input signal is an arbitrary sinusoidal signal applied for the circuit verification
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