Token Bit Manager
for the CMS Pixel Readout
Edward Bartz
(R.Stone)
Rutgers University
• Description of the TBM Functions
• First Prototype in DMILL
• 0.25 m Translation
CMS Pixel Electronics
Systems Review
5 November 2003
slide 1
TBM Overview
• Orchestrate the Readout of Several Pixel Chips
on a Single Analog Output Link
• Provide a Link Between the Front End Controller
and the Pixel Chips For Control Commands
 Custom, Mixed Mode, Rad-Hard, Chip Located
Near Pixel Readout Chips
slide 2
Dual TBM Chip
Dual TBM Chip
Analog 40 MHz
Analog
Control
L1A Output
Output
Clock
Commands
• Two Token Bit Manager’s
– Each TBM Controls one ROC Chain
HUB
CLK
–8 to 24 ROCs per TBM
L1
• Control Network Hub
– Port addressing for control
commands
Dual
TBM
TBM
TBM
–6 to 14 Dual TBMs per Control Link
–120 Links in the Detector
~1200 TBMs & 20,000 ROCs
Analog
Output
Chain of Read
Out Chips
Chain of Read
Out Chips
slide 3
TBM Functions
•
Write header and trailer (2 bit analog encoded digital)
– 8 bit Event Number  Header
– 8 bit Error status word  Trailer
•
L1
Clock Trigger Reset
To Flash
ADC
Distribute to Pixel Readout Chips (ROC)
– L1 triggers (2 Outputs/TBM)
– Clock (2 Outputs/TBM)
•
Control readout through token pass
•
Stack triggers awaiting token pass
– 32 event deep
– No readout after 16 deep
Analog
Output
TBM
Token Out
ROC
CLK L1
ROC
Token In
ROC
Analog Output
slide 4
Analog Output
•
Levels Chosen To Match ROC
•
Output Levels Fully Adjustable
– Gain Adjustment
– Differential Offset Adjustment
– Driver Current Adjustment
•
Output Driver Identical to ROC
Note: Voltages are referenced to Analog Optical
Link input. Levels 4&5 ROC Only
slide 5
TBM Control Features
• Analog Adjustments
–
–
Adjust Analog Levels
Disable Analog Output
• Trigger Control
–
–
–
Inject Any Trigger Type
Ignore Incoming Triggers
Disable Trigger Outputs
• Stack Control
–
–
Read Number of Events on Stack
Read Stack Contents (non-destructively)
• General Control
–
–
–
Switch Readout to 40 MHz or 20 MHz
Disable TBM Clock
Reset TBM
• Token Passing
–
–
Disable Token Passing
Reset Token Out
slide 6
Control Network Hub
• Up to 32 hubs addressable.
Control Link
Dual TBM
• 5 Ports per hub.
– 4 mI2C (40 MHz) external  ROCs.
– 1 mI2C (40 MHz) internal  TBMs.
• Functions of addressed hub.
– Selects addressed port.
– Strips off byte containing hub/port
address. Passes remainder.
– Reflects data back to Front End
Controller.
HUB
mI2C
TBM TBM
4 mI2C Ports Output Only
ROC ROC
ROC ROC
slide 7
DMILL Dual TBM
Control sections
Hub
1st (& only)
Sub. 5/02
Stacks
Analog sections
4 mm
It Works!
5.3 mm
slide 8
TBM Test Results
Status Reg.
Event # = 11
3
2
1
0
UBLK
Token Pass
Header ID
• Header marker 3 “UBLK” + “1”
–8 Bit Event Number (4 Clocks)
• Trailer marker 2 “UBLK” + 2 “1”
–8 Bit Status Word (4 Clocks)
Trailer ID
• Power consumption 600 mW
–core 140 mW
–Differential Drivers 460 mW
• 6 Tested / 5 Fully Functional
slide 9
Analog Adjustability
TBM 1
TBM 2
Before
Adjustment
After
Adjustment
slide 10
1 MHz Trigger Rate
Expected Max CMS Trigger Rate = 100KHz
Event
Number
Header ID
Status Info
Trailer ID
slide 11
Hub Testing
•
•
Internal fast port - fully tested and functional
External fast ports - fully tested and functional
mI2C Command Output From Port 0
Serial Data
Serial Clock
slide 12
Changes For 0.25 m
• Reduce Power Consumption
– Redesign LVDS Drivers
– Minimize Clock Usage
– Shut Down Clock when not needed
• Limit use of Analog bus
– Pass ROC Analog Through TBM
– Analog Output Line Driver
• Redesign Serial Protocol For CMS Optical Transceivers.
– 8 Bit data + Complement Bit 8  4 Bit data + Complement Bit 4
– Request Modification to Optical Receiver Chip
• Allow Transition Dual  Single TBM Operation
slide 13
TBM Operation Modes
ROCs
Readout token chip 1-8
ROC readout
Dual Mode
S
Readout token chip 9-16
S
ROC readout
Half-Module Readout 1
Half-Module Readout 2
Readout token
ROC readout
Single Mode
TBM
S
Module Readout
ROC readout
slide 14
Single Event Upset
SEU cross section of 0.25m Flipflop
300 MeV/c pion beam
Standard: s =2 x 10-13 cm2
Protected: s =2 x 10-15 cm2
[cm2]
10-12
10-13
(284 ff per DTBM)
10-14
10-15
TBM
Placement
Expected
Flux
Time Per SEU
Protected F/F
(MHz/cm2)
(Hrs/SEU)
4cm Barrel
40
12
7cm Barrel
20
24
11cm Barrel/
Foreward
8
60
10-16
10-171.4
1.6
1.8
Standard Latch
2.0
2.2
2.4
2.6
Protected Latch
slide 15
0.25 m Hub
• IBM Process
– 3 metal layers
– MIMCaps
“Fast” Hub
• “Fast” Hub
– Normally Part of TBM
– Tested in Simulation with ROC
Control Section
– PSI Low Power LVDS Drivers
• “Slow” Hub
“Slow” Hub
– Can reside on same control link
as Fast hubs
– Provides Control data for PLL &
Laser Drivers Via I2c Protocol
• Submitted June 2003
• Received: Sept. 19, 2003
slide 16
Slow Hub
Modified Version of Fast Hub
Modifications
40 MHz
Clock
1 to 7
Decoder
Odd
Data
Bits
1 to 7
Decoder
Slow Clock
Out
Start-Stop
Serial
Data In
8 Bit
Reg.
Serial
Data
Return
Divide
By 256
Slow Data
I/O
Address
Compare
7 to 1
Mux
slide 17
0.25 m Dual TBM
• IBM Process
– 3 metal layers
– MIMCaps
• 3 voltage regulators
Analog
Readout
Analog
Power
Stacks
Control
Sections
– Core Digital
– Analog
– LVDS Drivers
•
4.4 mm
Pad Dominated
Hub
•
Completed: October 2003
– CERN rules check now
– Nov 10th MPW submission
Regulators
3.2 mm
slide 18
2nd 0.25 m Version
• Fix any bugs?
• Improvements
Analog
Readout
Analog
Power
Stacks
– Rad-Hard regulator band gap reference Control
Sections
– More flexibility in token passing (bypass nonresponding ROC segment)
– TBM Aout driver enhancements
• Spring 2004 submission?
Hub
Regulators
slide 19
Conclusion
• Dual TBM worked on first DMILL submission
• 0.25 m Fast and Slow Hubs are Awaiting Testing
• 0.25 m TBM Complete
– 10 November 2003 MPW Submission
• Second 0.25 m Prototype Submission Anticipated
• Production TBM Available End of 2004
slide 20