GLAST LAT Project
Gamma-ray Large
Area Space
Telescope
DOE/NASA Peer Critical Design Review, March 19-20, 2003
GLAST Large Area Telescope:
Electronics, Data Acquisition &
Flight Software
Electronics
Gunther Haller
Stanford Linear Accelerator Center
Manager, Electronics, DAQ & FSW
LAT Chief Electronics Engineer
haller@slac.stanford.edu
(650) 926-4257
G. Haller
4.1.7 Electronics V5
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GLAST LAT Project
DOE/NASA Peer Critical Design Review, March 19-20, 2003
Electronics Outline
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Overview
Team
Front-End Electronics
Tower Electronics Module
– GLAST Calorimeter Cable Controller ASIC (GCCC)
– GLAST Tracker Cable Controller ASIC (GTCC)
GAS Unit
GLAST Global Trigger Controller (GLTC)
SIU/EPU Crate
– LAT Communication Board
– Spacecraft Interface Board
– Processor
Spacecraft Interface
Verification & Test
Testbed
Summary
G. Haller
4.1.7 Electronics V5
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GLAST LAT Project
DOE/NASA Peer Critical Design Review, March 19-20, 2003
LAT Electronics (Signals)
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TKR: Tracker
CAL: Calorimeter
ACD: Anti-Coincidence
Detector
TEM: Tower Electronics
Module
EPU: Event Processor Unit
SIU: Spacecraft Interface
Unit
GAS Unit: Global TriggerACD-Signal Distribution
Unit
From SC P/R
1 PPS/GRB
Alert
To SC P
Science Data
Filtering Software
EPU
P0
EPU
P1
EPU
R
SIU
P
SIU
R
Command/
Control/Monitor
Software
GAS
Board P
GAS
Board R
GAS Unit
Command Response Unit
Global Trigger
Event Builder
ACD Electronics Module
TEM 0
C
A
L
T
K
R
Command Response Unit
Global Trigger
Event Builder
ACD Electronics Module
Prime
Redundant
TEM 7
C
A
L
T
K
R
TEM 8
A
C
D
0
G. Haller
To SC P/R
MIL1553/
Discretes
To SC R
Science Data
A
C
D
A
C
D
1
C
A
L
T
K
R
TEM 15
C
A
L
T
K
R
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4.1.7 Electronics V5
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GLAST LAT Project
DOE/NASA Peer Critical Design Review, March 19-20, 2003
LAT Electronics (Power)
SC Main
Feed P
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TKR: Tracker
CAL: Calorimeter
ACD: Anti-Coincidence
Detector
TEM: Tower Electronics
Module
EPU: Event Processor Unit
SIU: Spacecraft Interface
Unit
GAS Unit: Global TriggerACD-Signal Distribution
Unit
PDU: Power Distribution
Unit*
EPU
P0
EPU
P1
SC SIU P
Feed
SC Main
Feed R
SC SIU R
Feed
SIU
P
EPU
R
PDU
Board P
SIU
R
PDU
Board R
PDU
Monitoring and Power
Distribution
Monitoring and Power
Ditribution
Prime
Redundant
ACD PS
P
GASU
DAQ P
GASU
DAQ R
ACD PS
R
GASU
TEM 0
C
A
L
T
K
R
TEM 7
C
A
L
T
K
R
TEM 8
A
C
D
A
C
D
A
C
D
0
1
11
C
A
L
T
K
R
TEM 15
C
A
L
T
K
R
* PDU is presented separate in Power System presentation
G. Haller
4.1.7 Electronics V5
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GLAST LAT Project
DOE/NASA Peer Critical Design Review, March 19-20, 2003
Team
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Manager
– Gunther Haller, SLAC
Flight Software Lead
– JJ Russell, SLAC
DAQ System Lead
– Mike Huffer, SLAC
Mechanical-Thermal Lead
– Dave Nelson, SLAC
Power-EMI Lead
– Dave Nelson, SLAC
EGSE Lead
– Mike Huffer, SLAC
I&T Lead
– Dave Nelson, SLAC
Mission Assurance Lead
– Darren Marsh, Nick
Virmani (SLAC, Swales)
Manufacturing Lead
– Jerry Clinton, SLAC
Flight-Software Team: see
FSW presentation
G. Haller
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Power Distribution Unit
– Patrick Young, SLAC
GAS Unit
– Joszef Ludvig, SLAC
TEM DAQ Module
– Leonid Sapozhnikov, SLAC
Tower Power Supply
– Vendor (Oversight: Dave
Nelson, SLAC)
Spacecraft Interface Board
– Michael Lovellette, Greg
Clifford, Dennis Silver (NRL &
Silver Engineering)
– Software: Dan Wood (NRL)
Crate Backplane
– Robert O’Leary, SLAC
Crate Power Supply Board
– Robert O’Leary, SLAC
LAT Communication Board
– Sandra Frazier, SLAC
GLAST Tracker Cable Controller ASIC
– Leonid Sapozhnikov, Noman
Ahmed, SLAC
GLAST Calorimeter Cable Controller
ASIC
– Leonid Sapozhnikov, Noman
Ahmed, SLAC
GLAST Global Trigger ASIC
– Joszef Ludvig, Noman Ahmed,
SLAC
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Front-End Simulator
– Mark McDougald,
SLAC
Parts
– Mark Freytag, SLAC
Harness
– Dave Nelson, Mark
Freytag, SLAC
Packaging
– Jobe Noriel, SLAC
ASIC & Board Analysis
– Dieter Freytag, Oren
Milgrome, SLAC
TKR sub-system electronics
– Manager: Robert
Johnson, UCSC
– EE: Dave Nelson,
SLAC
CAL sub-system electronics
– System Manager: Neil
Johnson, NRL
– EE: Jim Ampe, NRL
ACD sub-system electronics
– Manager: Dave
Thompson, GSFC
– EE: Glenn Unger,
GSFC
4.1.7 Electronics V5
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GLAST LAT Project
DOE/NASA Peer Critical Design Review, March 19-20, 2003
Tracker Electronics
GTRC ASIC
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G. Haller
GTFE ASIC
TKR sub-system electronics
• Si-Strip Detectors
• 24 GTFE (GLAST Tracker Front-End) ASIC (1,536 signal channels)
• 2 GTRC (GLAST Tracker Readout Controller) ASIC
• MCM (Multi-Chip Module)
• Flex-cables
Presented in tracker sub-system CDR
4.1.7 Electronics V5
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GLAST LAT Project
DOE/NASA Peer Critical Design Review, March 19-20, 2003
Calorimeter Electronics
GCRC ASIC
GCFE ASIC
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CAL sub-system electronics
• Diodes
• 48 GCFE (GLAST Calorimeter Front-End) ASIC
• 4 GCRC (GLAST Calorimeter Readout Controller) ASIC
• AFEE (Analog Front-End Electronics) board
Presented in calorimeter sub-system CDR
G. Haller
4.1.7 Electronics V5
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GLAST LAT Project
DOE/NASA Peer Critical Design Review, March 19-20, 2003
ACD Electronics
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GAFE ASIC
ACD sub-system electronics
• PMT’s
• 18 GAFE (GLAST ACD Front-End) ASIC
• 1 GARC (GLAST ACD Readout Controller) ASIC
• FREE (Front-End Electronics) board
• High-Voltage Supply board (not shown)
Presented in ACD sub-system CDR
G. Haller
GARC ASIC
4.1.7 Electronics V5
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GLAST LAT Project
DOE/NASA Peer Critical Design Review, March 19-20, 2003
Tower Electronics DAQ Module
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TKR (8 cables)
CAL (4 cables)
CAL
Cable
ASIC
TKR
Cable
ASIC
Control, Event &
HSK Signals
Power
Trigger
Power to
TEM Elex
Trigger
Controller
Common
Controller
G. Haller
Power from TEM
PS Module
Trigger signals
to/from Global
Trigger on GAS Unit
Control & HSK
signals from/to SIU,
Event data to EPU,
all via GAS Unit
Main DAQ module, one on each tower
– Controls and reads out data from
TKR MCM and CAL AFEE front-end
electronics
– Zero-suppresses CAL event data
– Buffers events in cable ASIC FIFO’s
– Assembles CAL and TKR event
fragments to tower event
– Transmits data to GASU
– Contains monitoring and low-rate
science circuits
– LVDS interface to front-end
electronics and GASU
– Hardware with software controlled
configuration and mode registers
• CAL ICD: LAT-SS-00238
• TKR ICD: LAT-SS-00176
• TEM ICD: LAT-SS-00363
4.1.7 Electronics V5
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GLAST LAT Project
DOE/NASA Peer Critical Design Review, March 19-20, 2003
Tower Electronics DAQ Module (Con’t)
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Engineering Model with full functionality and interfaces as flight has been used
extensively in 18 copies in the field, controlled and readout with real-time software
from the FSW group, and I&T software from the I&T group
Not just tested in TEM test-setup at SLAC, but more importantly fully integrated in
set-ups with real sub-system electronics
– at NRL and at SLAC with CAL electronics
– In Italy and at SLAC with TKR electronics
– At SLAC, NRL with DAQ electronics
Flight Model with 8 GTCC and 4 GCCC ASIC, plus 2 ACTEL’s: design finished,
ready for layout/fabrication
LAT-TD-00605
G. Haller
4.1.7 Electronics V5
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GLAST LAT Project
DOE/NASA Peer Critical Design Review, March 19-20, 2003
Tower Electronics Module GCCC ASIC
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GLAST Calorimeter Cable Controller
(GCCC) ASIC
– TEM interface to calorimeter AFEE
• Configuration and readback
data
• Trigger and event data
handling
• Log suppression algorithm
• Event buffers
– Contains
• Two 64x16 FIFO’s
• Three 128x16 FIFO’s
• Core Logic
• LVDS drivers/receivers
– VHDL code compiled into XILINX
FPGA, is used on TEM’s which are
operating with CAL electronics
– ASIC in fabrication, expected April
25
– LAT-TD-01549
G. Haller
LVDS IO
CORE
FIFO
GCCC
4.1.7 Electronics V5
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GLAST LAT Project
DOE/NASA Peer Critical Design Review, March 19-20, 2003
Tower Electronics Module GTCC ASIC
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GLAST Tracker Cable Controller (GTCC)
ASIC
– TEM interface to tracker MCM’s
• Configuration and readback
data
• Trigger and event data
handling
• Data reformatting
• Event buffers
– Contains
• Two 64x16 FIFO’s
• Three 128x16 FIFO’s
• Core Logic
• LVDS drivers/receivers
– VHDL code compiled into XILINX
FPGA, is used on TEM’s which are
operating with CAL electronics
– ASIC in fabrication, expected April
25
– LAT-TD-01550
G. Haller
LVDS IO
CORE
FIFO
GTCC
4.1.7 Electronics V5
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GLAST LAT Project
DOE/NASA Peer Critical Design Review, March 19-20, 2003
Design & Verification for GCCC/GTCC
VHDL
Simulation
Netlist
Manual: Schematic of
IO, LVDS
Automatic: Layout, Place&Route
Automatic: Generate
Schematic
Layout: Add IO and LVDS. Result:
Complete Chip Layout
Compare
Simulation:
Spice
Full Chip
Schematic
Netlist w/o Parasitics
Netlist with Parasitics
Netlist
Full-Chip
Compare/Verific
ation
Flight-Model
Status 3/03
Full-Chip Simulation
with Synopsys
Stress &
Timing
Analysis
Full-Chip Simulation
with Synopsys
Fabrication
Test
G. Haller
4.1.7 Electronics V5
13
GLAST LAT Project
DOE/NASA Peer Critical Design Review, March 19-20, 2003
GAS Unit (Signal Distribution and Trigger)
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Uses GLTC ASIC to receive LVDS
signals and to logically mask and
combine 228 ACD trigger signals
Global Trigger controller
– Combines trigger inputs from
TKR, CAL, ACD and makes
trigger decision
– Distributes trigger message
with target CPU for event, timestamp, event-number, and
trigger type to sub-systems
– Total time from particle in
detector to receipt of trigger
accept signal: 2 msec
Command Response Unit
– Distributes control from SIU to
TEM’s, GLT, ACD EM, EB
– Transmits readback data from
TEM’s, GLT, ACD, EB to EPU’s
Hardware with software controllable
configuration & mode registers
– GLT ICD: LAT-TD-01545
– CMD-Response ICD: LAT-SS00461; LAT-TD-00606
One prime and one redundant DAQ
board
Command-Response
Trigger
EPU
P0
EPU
P1
EPU
R
SIU
P
GAS
Board P
Global
Trigger
P
TEM 0
T
K
R
Control,
Commanding
GAS
Board R
CMDResp.
Unit P
GAS Unit
Event
Builder
P
ACD EM
P
C
A
L
Event
Builder
R
C
A
L
T
K
R
CMDResp.
Unit R
TEM 8
A
C
D
Global
Trigger
R
ACD EM
R
TEM 7
0
G. Haller
SIU
R
A
C
D
A
C
D
1
C
A
L
T
K
R
TEM 15
C
A
L
T
K
R
11
4.1.7 Electronics V5
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GLAST LAT Project
DOE/NASA Peer Critical Design Review, March 19-20, 2003
GAS Unit (ACD EM & Event Data)
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Uses GLTC ASIC to convert LVDS to
CMOS signals and to logically mask
and combine 228 ACD trigger signals
ACD EM
– Controls and reads out data
from ACD front-end electronics
– Buffers events
– Assembles 12 ACD event
fragments to ACD event
– Transmits data to EB
– Contains monitoring circuits
Event Builder
– Receives event fragments from
TEM’s, AEM, and GLT at up to
10 KHz rate
– Builds LAT event and transmits
to EPU’s/SIU’s at up to 10 KHz
rate
– Receives CPU data, forwards to
other CPU’ s or to SC (science
data interface)
Hardware with software controllable
configuration & mode registers
– ACD ICD: LAT-SS-00363
– AEM ICD: LAT-TD-00639
– EB ICD: LAT-TD-01546
One prime and one redundant DAQ
board
To SC P
Science
Data
Filtering Software
EPU
P0
EPU
P1
EPU
R
SIU
P
SIU
R
GAS
Board P
Global
Trigger
P
GAS
Board R
CMDResp.
Unit P
GAS Unit
Event
Builder
P
ACD EM
P
TEM 0
C
A
L
T
K
R
Event
Builder
R
Prime
Redundant
C
A
L
T
K
R
CMDResp.
Unit R
TEM 8
A
C
D
Global
Trigger
R
ACD EM
R
TEM 7
0
G. Haller
To SC R
Science
Data
A
C
D
A
C
D
1
C
A
L
T
K
R
TEM 15
C
A
L
T
K
R
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4.1.7 Electronics V5
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GLAST LAT Project
DOE/NASA Peer Critical Design Review, March 19-20, 2003
GAS Unit (Con’t)
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Engineering Model with partial functionality and interfaces as flight has been
used in several copies in the field, controlled and readout with real-time software
from the FSW group, and I&T software from the I&T group
ACD EM at SLAC and GSFC, with real ACD front-end electronics
Trigger input signal received and trigger accept message generated via SLAC
COM-module (either CAL, TKR, and ACD programmed)
Flight Model with 14 GLTC and 9 ACTEL’s: design finished, in layout/fabrication
GLAST Global Trigger Controller (GLTC) ASIC
– LVDS receivers for ACD veto and CNO trigger
signals
– Maskable logical-OR function of ACD trigger
signal
– Handles 18 input signal channels
– Contains
• Core Logic
• LVDS receivers
– First version ASIC was received in Dec 02
– Fully working, is flight design
– Flight quantity is on shared LAT wafer-run
expected back end of March 03
– LAT-TD-0148
G. Haller
4.1.7 Electronics V5
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GLAST LAT Project
DOE/NASA Peer Critical Design Review, March 19-20, 2003
SIU/EPU Crate
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Spacecraft Interface Board (SIB)
– EEPROM
– MIL1553 Communication with
spacecraft*
– Power Control of PDU/GASU power
switches in PDU*
– Power Control of VCHP switches in
heater box*
LAT Communication Board (LCB)
– Communication with GASU
• Commanding
• Read-back Data
• Housekeeping Data
• Event Data
Power Supply Board (PSB)
– 28V to 3.3V/5V conversion
– Power-On Reset
– LVDS-CMOS conversion of
spacecraft discretes*
– System clock to GASU
CPU Board
– Processor
– IO of level-converted SC discretes
Backplane
– passive
VCHP
Heater Box
BackPlane
SIB
Heater
Control*
Power
Control*
PDU
PCI
Interface
EEPROM
Spacecraft
MIL1553
MIL1553*
LCB
CommandResponse
GASU
PCI
Interface
FIFO
Event Data
GASU
Spacecraft
Discretes
PSB
LVDS Convertion
Spacecraft
Power
28-V DC/
DC
Power-On
Reset
GASU
3.3V/5V
System
Clock
CPU
Discrete I/O
PCI
Interface
Power PC
* Only used in SIU crate
G. Haller
4.1.7 Electronics V5
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GLAST LAT Project
DOE/NASA Peer Critical Design Review, March 19-20, 2003
LAT Communication Board
G. Haller
4.1.7 Electronics V5
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GLAST LAT Project
DOE/NASA Peer Critical Design Review, March 19-20, 2003
LAT Communication Board (Con’t)
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PCI-interface engineering model in
operation since early 03 (has PMC
connector)
Flight Model has cPCI connector: design
finished, scheduled to be in
layout/fabrication 4/03
ICD: LAT-TD-00860
G. Haller
4.1.7 Electronics V5
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GLAST LAT Project
DOE/NASA Peer Critical Design Review, March 19-20, 2003
Spacecraft Interface Board
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Designed/implemented by Silver
Engineering (Dennis Silver, Greg
Clifford) under contract by NRL
– Driver by Dan Wood/NRL
Engineering model is in test since
mid 02
– 6U cPCI PCB Format
– Uses J1 of cPCI
– 12 Layer Polyimide
Construction
– 4 Chassis GND Planes
– 3 Power and Ground Planes
– 5 Routing Layers
– 65 Ohm Controlled Impedance
Signals
Flight Model adds npn transistors
for heater control
– Schematic updated
– Waiting for layout modification
ICD: LAT-SS-01539
G. Haller
FPGA
ACTEL RT54SX32S
(208PIN)
PCI Core
64
Target Only
10
cPCI
•
+
5
V
+
P
5
O
V
R
P
O
R
4MB
EEPROM
4MB
EEPROM
Heater
Register
(12)
TO LEFT HEATER
CONTROL BOX
(12)
TO RIGHT HEATER
CONTROL BOX
(4)
TO PRIMARY
PDU/GASU
(4)
TO REDUNDANT
PDU/GASU
LOCAL BUS
SUMMIT CTRL/STAT/SEL/ARB
cPCI
33MHZ
32bit
3.3V
+3.3V
44
47
SHARED ADDRESS/DATA/CTRL
PDU SPARE
(4)
VR +2.5V
SRAM
32K x 16
EXT_POR_L
SµMMIT
UT69151DXE
1553 A BUS
48MHZ
24MHZ
1553 B BUS
/2
4.1.7 Electronics V5
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GLAST LAT Project
DOE/NASA Peer Critical Design Review, March 19-20, 2003
Processor
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BAe750 compact PCI board
• 750 class Power-PC
• 240 MIPS at 133 Mhz,
• Less Than 12W
• 128 Mbytes main memory
• 256 Kbytes SUROM
• Total Dose > 100 kRad (Si),
Latchup Immune, SEU Rate < 1E5 Upsets/processor-day @ 90%
GEO
• VxWorks real-time operating
system
– LAT ordered prototype, was received
Spring 02
– Since then used for software
development at NRL
• Boot-code
• Bench-mark for LAT filtering
code
• Test with SIB MIL1553 prototype
– Same board selected by GLAST
spacecraft contractor
To be ordered April 03
G. Haller
4.1.7 Electronics V5
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GLAST LAT Project
DOE/NASA Peer Critical Design Review, March 19-20, 2003
LAT Spacecraft Interface
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Power
– 28V regulated and unregulated
MIL1553
– Commanding
Science Interface (LVDS)
– Transport of science data to spacecraft
solid-state recorder
1-PPS timing signal (LVDS)
– Timing pulse
GBM GRB Candidate signal (LVDS)
– Notification of candidate Gamma-Ray Burst
(GRB), from GBM routed through SC
Discretes (LVDS)
– Pulsed and level digital signals from and to
spacecraft
Analog Monitoring
– Temperature and voltage monitoring by SC
without having LAT powered
Two power/signal sets: Prime and redundant
All agreed to: Spectrum Astro SC-LAT Interface
Document
Power
MIL1553
SPACECRAFT
Science Data
LAT
1 PPS
GBM GRB
Candidate
Discretes
Digital
Analogs
LVDS: Low-Voltage-Differential-Swing signaling
G. Haller
4.1.7 Electronics V5
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GLAST LAT Project
DOE/NASA Peer Critical Design Review, March 19-20, 2003
Power Interface to Spacecraft
Spacecraft
•
•
•
All power feeds from
spacecraft can be turned
off/on via ground
Spacecraft turns off
SIU/DAQ feeds when
going to survival mode
LAT start-up ICD: LATTD-01536
– Describes process
of cold and warm
boot (bring-up) of
LAT
LAT
To other thermostats/
heater zones
Unregulated
Voltage
Primary
to
to
to
to
To other thermostats/
heater zones
Unregulated
Voltage
Primary
to
to
to
to
Redundant
To other switches
(12 total)
Regulated
VCHP Voltage
Primary
Prime
To other switches
(12 total)
Turn on control from
SIU P and SIU R
VCHP
survival/
operational
heaters
Regulated
VCHP Voltage
Redundant
All switches are
controlled by
spacecraft
Redundant
Turn on control from
SIU P and SIU Rl
Regulated
SIU-Prime
Voltage
SIU
Prime
Regulated SIURedundant
Voltage
Regulated Main
DAQ Prime
Voltage
Regulated Main
DAQ Redundant
Voltage
G. Haller
GRID or AntiFreeze
Heaters,
several
zones, each
zone has its
own set of
thermostats/
heaters
Prime
SIU
Redun
dant
Crossconnected:
either PDU
can use
either feed
4.1.7 Electronics V5
PDU
Prime
Power to rest
of LAT
PDU
Redun
dant
23
GLAST LAT Project
DOE/NASA Peer Critical Design Review, March 19-20, 2003
Spacecraft 1-PPS and GRB Candidate Signal
Spacecraft
1-PPS P
LAT
Multiplexer
S1 E D
S2 N
CB
Fan-Out
GASU DAQ Board Prime
1-PPS R
Multiplexer
S1 E D
S2 N
CB
Multiplexer
S1 E D
S2 N
CB
E.g SIU P
To other crates
GASU DAQ Board
Redundant
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•
•
•
G. Haller
1-PPS signal from spacecraft prime and redundant are connected to both GASU
DAQ boards (prime and redundant)
GASU DAQ selects which SC signal to use
Result is fanned out to all processor crates (SIU’s as well as EPU’s)
Crate DAQ selects which GASU signal to use
SC-LAT components are fully cross-connected
Same for GBM GRB candidate signal
4.1.7 Electronics V5
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GLAST LAT Project
DOE/NASA Peer Critical Design Review, March 19-20, 2003
Spacecraft Discrete Signal
Spacecraft
LAT
CPU
Discretes P
SIU Crate Prime
Discretes R
SIU Crate Redundant
•
•
G. Haller
Discrete Signals from SC to LAT:
– Discrete LVDS-signals from spacecraft prime and redundant are connected
to both SIU crates (prime and redundant)
– Reset discrete: P and R SC signal is logically Or’ed and used as CPU reset
– Spare discretes: CPU selects whether to use P or R input and result is
routed to CPU discrete inputs (3 prime and 3 redundant)
Discrete Signals from LAT to SC (not shown)
– Discrete LVDS-signals from LAT SIU P and SIU R are driven to both, prime
and redundant, spacecraft C&DH (Control & Data Handling) systems
4.1.7 Electronics V5
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GLAST LAT Project
DOE/NASA Peer Critical Design Review, March 19-20, 2003
LAT-SC Science Interface
Spacecraft
LAT
To other LAT CPU’s
Switch
Receiver P
Receiver R
Multiplexer
D E S1
N S2
BC
Multiplexer
D E S1
N S2
BC
SIU P
GASU DAQ Board Prime
To other LAT CPU’s
2 SIU’s,
3 EPU’s
EPU R
GASU DAQ Board
Redundant
•
•
•
G. Haller
GASU event builder
– Directs data from TEM’s to any of the CPU’s (not shown)
– Directs data from CPU to CPU
– Directs data from CPU to spacecraft
Any CPU can direct data via either GASU DAQ (P or R) to SC
Data is driven to both SC sections (P and R)
– SC needs to select which GASU to listen to
– GASU needs to know from which SC (P or R) the flow-control line is valid
– All configured via ground commanding
4.1.7 Electronics V5
26
GLAST LAT Project
DOE/NASA Peer Critical Design Review, March 19-20, 2003
Harness
•
•
•
•
•
Almost exclusively point-to-point cables (not harness)
Connectors are Micro-D and Sub-D
Cables are shielded-twisted pair, 24 AWG
Installation in layers; assembly drawings close to complete
Designed an fitted on 1:1 LAT model
G. Haller
4.1.7 Electronics V5
27
GLAST LAT Project
DOE/NASA Peer Critical Design Review, March 19-20, 2003
Example: Connections LAT/Spacecraft and to LAT
EMI Shield
16 pr pwr
(2 pr tm + 2 pr vm, pdu Prim & rdnt) + (2 pr tm + 2 pr vm, gasu Prim & rdnt)
SC PRU
Prim
25A
regulated
28 pr tm
ACD Temp
Sensor Bracket
JL-131
+Y Grid Rad Intf (4 tm)
2 +Y Grid Make Up Heater (4 tm)
+Y Radiator (8 tm)
32 pr tm
4 pr tm + 4 pr vm
2 pr pwr (AWG18)
JL-133
2 pr pwr (AWG18)
2 pr pwr + 2 pr vm (+Y VCHP, sum of 6 Prim sw & sum of 6 Rdnt sw)
+Y Heater
Control Box
JL-134
4 pr pwr
2 +Y Grid Make Up Heater Prim
JL-136
JL-137
4 pr pwr
2 +Y Grid Make Up Heater Rdnt
JL-127
JL-128
4 pr pwr
12 pr pwr
2 +Y Rad Antifreeze Heater Prim
6 +Y VCHP Heater Prim
JL-130
4 pr pwr
12 pr pwr
2 +Y Rad Antifreeze Heater Rdnt
6 +Y VCHP Heater Rdnt
JL-204 … 227
+Y Radiator
Bracket
32 pr tm
SC PDU
Prim
unregulated
[ FROM ACD TO SC ]
ACD Tiles (10 tm)
ACD PMT Rail (8 tm)
ACD Shell (10 tm)
JL-152
+Y VCHP-XLHP Intf (4 tm)
6 +Y VCHP Heater (12 tm)
1 pr im
ACD
Electronics
Box
(x 24)
4 pr pwr
2 pr pwr + 2 pr vm (+Y VCHP, sum of 6 Prim sw & sum of 6 Rdnt sw)
JL-129
16 pr tm
[ FROM ACD TO PDU ]
ACD BEA-Grid Intf (4 tm)
ACD PMT Rail (8 tm)
ACD Shell (4 tm)
EPU
Box
(test only)
JL-154
16 pr tm
JL-155
1 pr im
16 pr tm
JL-126
4 pr tm
48 pr tm
4 pr tm
JL-180 … 203
JL-105
JL-69
JL-39
JL-35
+Y VCHP Heaters (24 tm)
+Y VCHP-XLHP Intf (12 tm)
+Y VCHP-DSHP Intf (12 tm)
JL-37
JL-123
11 pr science
11 pr science
8 pr tm
XLAT plate
4 pr pwr +
2 pr tm +
2 pr vm
??
JL-70,71,72
JL-66,67,68
12 c + 6 gnd
EPU
Box
(x 3)
4 pr pwr + 2 pr tm + 2 pr vm
100
JL-49
JL-46,47,48
x 24
100
JL-153
4 pr tm +
4 pr vm
x3
16 pr LATP +
8 pr pwr +
2 pr tm + 2 pr vm
16 pr pwr
JL-42
SIU
Rdnt
2 pr vm
(8 c)*2 + 8 gnd
x 16
22 pr science +
2 pr 1PPS +
2 pr GRBM
4 pr pwr
JL-112
2 pr vm
JL-116
2 pr vm
JL-120
vm
12 c + 6 gnd
51
JL-13 … 28
JL-30
JL-32
JL-34
22 pr science +
2 pr 1PPS +
2 pr GRBM
28 pr tm
12 c + 6 gnd
TEM
Box
(x 16)
JL-89-104
4 pr pwr +
4 pr vm
4 pr tm +
20 pr vm
JL-73-88
vm
JL-114
SC PRU
Rdnt
2.8 A
regulated
4 pr tm +
4 pr vm
JL-50 … 65
JL-43
JL-108
2 pr tm
JL-118
JL-122
12 pr discrete
16 pr pwr
x 16
12 pr discrete
SC Analog
Monitor Rdnt
16 pr LATP +
8 pr pwr +
2 pr tm + 2 pr vm
JL-4
100
JL-8
JL-231
JL-6
JL-230
1 pr mil1553
JL-41
1 pr mil1553
JL-235
PDU
Box
JL-45
JL-234
JL-110
GASU
Box
SC
C&DH
Rdnt
JL-1
JL-229
JL-33
JL-3
JL-228
1 pr mil1553
JL-44
1 pr mil1553
JL-233
JL-109
JL-232
JL-31
JL-2
JL-156 … 179
12 pr discrete
SC
C&DH
Prim
JL-29
JL-5
JL-107
(8 c)*2 + 8 gnd
JL-40
12 pr discrete
JL-117
JL-121
2 pr vm
JL-12
x3
SIU
Prim
2 pr tm
SC Analog
Monitor Prim
JL-9,10,11
100
JL-7
4 pr pwr
vm
4 pr tm +
20 pr vm
Grid (12 tm)
Cal baseplate (16 tm)
28 pr tm
2 pr vm
JL-115
14 pr
tm
12 c + 6 gnd
vm
2 pr vm
JL-119
14 pr
tm
4 pr pwr +
4 pr vm
JL-111
SC PRU
Prim
2.8A
regulated
JL-113
4 pr vm
4 pr pwr + 4 pr tm + 2 pr vm
JL-124
11 pr science
Timing Prim/
Rdnt
2 pr 1PPS +
2 pr GRBM
JL-125
JL-?
JL-106
JL-36
JL-139
2 pr 1PPS +
2 pr GRBM
2 pr pwr + 2 pr vm (-Y VCHP, sum of 6 Prim sw & sum of 6 Rdnt sw)
JL-140
JL-141
12 pr pwr
4 pr pwr
6 -Y VCHP Heater Prim
2 -Y Rad Antifreeze Heater Prim
2 pr pwr + 2 pr vm (-Y VCHP, sum of 6 Prim sw & sum of 6 Rdnt sw)
JL-142
JL-143
12 pr pwr
4 pr pwr
6 -Y VCHP Heater Rdnt
2 -Y Rad Antifreeze Heater Rdnt
2 pr pwr (AWG18)
JL-146
JL-147
4 pr pwr
2 -Y Grid Make Up Heater Prim
2 pr pwr (AWG18)
JL-149
JL-150
4 pr pwr
2 -Y Grid Make Up Heater Rdnt
16 pr tm
SC PDU
Rdnt
unregulated
4 pr pwr
-Y Heater
Control Box
-Y Radiator
Bracket
4 pr tm + 4 pr vm
8 pr tm + 40 pr vm
1 pr im
1 pr im
NOT USED
NOT USED
NOT USED
NOT USED
NOT USED
66-CIRC2?
51-UDP
26-HDP
100-UDP
100-UDP
79-CIRC2?
79-CIRC2?
MIL1553
JL-135
JL-138
JL-145
JL-148
JL-151
32 pr tm
SC PRU
Rdnt
25A
regulated
JL-144
32 pr tm
6 -Y VCHP Heater (12 tm)
-Y VCHP-XLHP Intf (4 tm)
pr
c
gnd
pwr
vm
im
tm
pair
control
ground
power
voltage monitor
current monitor
temp monitor
emi shield
spacecraft
located +X side
located -X side
located +Y side
located -Y side
HDS
high density D socket
HDP
high density D plug
UDS
micro D socket
UDP
micro D plug
CIRC1S circular series I socket
CIRC1P circular series I plug
CIRC2S circular series II socket
CIRC2P circular series II plug
48 pr tm
-Y VCHP Heaters (24 tm)
-Y VCHP-XLHP Intf (12 tm)
-Y VCHP-DSHP Intf (12 tm)
36 pr tm
Grid Rad Intf (8 tm)
Radiator (20 tm)
Radiator Antifreeze Heaters (8 tm)
GLAST LAT WIRING
DIAGRAM
REV 06
FEB 27, 2003
PY
NOTE: ONLY FIXED POSITION CONNECTORS ARE
SHOWN. CABLE CONNECTORS ARE NOT SHOWN.
SC CONNECTORS NOT SHOWN. ACD NOT SHOWN.
-Y Grid Rad Intf (4 tm)
2 -Y Grid Make Up Heater (4 tm)
-Y Radiator (8 tm)
(2 pr tm + 2 pr vm, pdu Prim & rdnt) + (2 pr tm + 2 pr vm, gasu Prim & rdnt)
16 pr pwr
G. Haller
NOT USED
JL-132
JL-38
SPARE
ANALOGS
16 pr tm
26-HDS
26-HDS
100-UDS
100-UDS
26-HDP
13-CIRC1P
13-CIRC1P
66-CIRC1P
66-CIRC1P
13-CIRC1P
13-CIRC1P
66-CIRC1P
66-CIRC1P
22-CIRC1P
66-CIRC1S
66-CIRC1S
NOT USED CONNECTOR
NUMBERS
KEY:
GRBM Prim/
Rdnt
Type
55-CIRC1P
55-CIRC1P
55-CIRC1P
55-CIRC1P
26-HDP
26-HDP
78-HDS
78-HDS
26-HDS
26-HDS
37-UDS
100-UDS
100-UDS
100-UDS
100-UDS
100-UDS
37-CIRC2?
79-CIRC1S
100-CIRC1S
100-CIRC1S
26-HDS
78-HDP
78-HDP
62-HDS
62-HDS
100-UDS
100-UDS
100-UDS
51-UDP
100-UDP
100-UDS
26-HDP
51-UDP
26-HDP
Grid (12 tm)
Cal baseplate (16 tm)
4 pr vm
11 pr science
Reference
JL-1
JL-2
JL-3
JL-4
JL-5
JL-6
JL-7
JL-8
JL-9...12
JL-13… 28
JL-29
JL-30
JL-31
JL-32
JL-33
JL-34
JL-35
JL-36
JL-37
JL-38
JL-39
JL-40
JL-41
JL-42
JL-43
JL-44
JL-45
JL-46… 49
JL-50… 65
JL-66… 68
JL-69
JL-70… 72
JL-73… 88
JL-89… 104
JL-105
JL-106
JL-107
JL-108
JL-109
JL-110
JL-111… 114
JL-115
JL-116
JL-117
JL-118
JL-119
JL-120
JL-121
JL-122
JL-123
JL-124
JL-125
JL-126
JL-127
JL-128
JL-129
JL-130
JL-131
JL-132
JL-133
JL-134
JL-135
JL-136
JL-137
JL-138
JL-139
JL-140
JL-141
JL-142
JL-143
JL-144
JL-145
JL-146
JL-147
JL-148
JL-149
JL-150
JL-151
JL-152
JL-153
JL-154
JL-155
JL-156… 179
JL-180… 203
JL-204… 227
JL-228… 235
4.1.7 Electronics V5
28
JL-130
12 pr pwr
GLAST LAT Project
6 +Y VCHP Heater Rdnt
(test only)
J
JL-129
J
2 pr pwr + 2 pr vm (+Y VCHP, sum of 6 Prim sw & sum of 6 Rdnt sw)
16 pr tm
DOE/NASA Peer Critical Design Review, March 19-20, 2003
JL-126
4 pr tm
Connections LAT/Spacecraft and to LAT EMI
Shield (focus)
4 pr tm
JL-180 … 203
JL-105
JL-123
11 pr science
11 pr science
8 pr tm
JL-69
JL-39
XLAT plate
4 pr pwr
2 pr tm
2 pr vm
12 c + 6 gnd
??
100
JL-156 … 179
JL-228
JL-233
1 pr mil1553
JL-229
JL-49
JL-46,47,48
x 24
100
JL-153
x3
16 pr LATP +
8 pr pwr +
2 pr tm + 2 pr vm
16 pr LATP +
8 pr pwr +
2 pr tm + 2 pr vm
JL-7
1 pr mil1553
JL-44
JL-232
JL-109
12 pr discrete
SC
C&DH
Prim
JL-12
JL-5
(8 c)*2 + 8 gnd
JL-40
12 pr discrete
JL-107
2 pr vm
JL-9,10,11
100
x3
SIU
Prim
JL-117
JL-121
SC Analog
Monitor Prim
4 pr pwr + 2 pr tm + 2 pr vm
12 c + 6 gnd
vm
2 pr tm
EPU
Box
(x 3)
JL-41
4 pr pwr
JL-113
2 pr vm
JL-115
2 pr vm
JL-119
vm
JL-70,71,72
4 pr pwr +
4 pr vm
JL-66,67,68
SC PRU
Prim
2.8A
regulated
JL-111
4 pr vm
JL-230
1 pr mil1553
JL-231
100
x 16
2 pr tm
SIU
Rdnt
2 pr vm
(8 c)*2 + 8 gnd
x 16
22 pr science +
2 pr 1PPS +
2 pr GRBM
JL-112
4 pr pwr
12 c + 6 gnd
JL-114
2 pr vm
JL-116
2 pr vm
JL-120
vm
12 c + 6 gnd
51
JL-13 … 28
22 pr science +
2 pr 1PPS +
2 pr GRBM
4 pr pwr +
4 pr vm
TEM
Box
(x 16)
JL-89-104
vm
JL-73-88
SC PRU
Rdnt
2.8 A
regulated
JL-50 … 65
JL-43
JL-108
SC Analog
Monitor Rdnt
JL-42
JL-118
JL-122
12 pr discrete
12 pr discrete
JL-8
1 pr mil1553
JL-235
JL-6
JL-234
JL-45
SC
C&DH
Rdnt
JL-110
GASU
Box
4 pr pwr + 4 pr tm + 2 pr vm
4 pr vm
JL-124
11 pr science
11 pr science
Timing Prim/
Rdnt
2 pr 1PPS +
2 pr GRBM
JL-125
JL-?
JL-106
SPARE
ANALOGS
KEY:
GRBM Prim/
Rdnt
16 pr tm
2 pr pwr + 2 pr vm (-Y VCHP, sum of 6 Prim sw & sum of 6 Rdnt sw)
JL-140
JL-141
12 pr pwr
4 pr pwr
6 -Y VCHP Heater Prim
2 -Y Rad Antifreeze Heater Prim
2 pr pwr + 2 pr vm (-Y VCHP, sum of 6 Prim sw & sum of 6 Rdnt sw)
JL-142
JL-143
12 pr pwr
4 pr pwr
6 -Y VCHP Heater Rdnt
2 -Y Rad Antifreeze Heater Rdnt
2 pr pwr (AWG18)
JL-146
JL-147
4 pr pwr
2 -Y Grid Make Up Heater Prim
2 pr pwr (AWG18)
JL-149
JL-150
4 pr pwr
2 -Y Grid Make Up Heater Rdnt
16 pr tm
SC PDU
Rdnt
unregulated
pr
c
gnd
pwr
vm
im
tm
JL-139
2 pr 1PPS +
2 pr GRBM
4 pr pwr
-Y Heater
Control Box
HDS
HDP
UDS
UDP
CIRC1S
CIRC1P
CIRC2S
CIRC2P
-Y Radiator
Bracket
4 pr tm + 4 pr vm
8 pr tm + 40 pr vm
1 pr im
1 pr im
SC PRU
Rdnt
25A
regulated
G. Haller
32 pr tm
JL-144
32 pr tm
NOTE: ONLY FIXED POSI
SHOWN. CABLE CONNE
SC CONNECTORS NOT S
6 -Y VCHP Heater (12 tm)
-Y VCHP-XLHP Intf (4 tm)
-Y Grid Rad Intf (4 tm)
2 -Y Grid Make Up Heater (4 tm)
-Y Radiator (8 tm)
(2 pr tm + 2 pr vm, pdu Prim & rdnt) + (2 pr tm + 2 pr vm, gasu Prim & rdnt)
4.1.7 Electronics V5
pair
control
ground
power
voltage monitor
current monitor
temp monitor
emi shield
spacecraft
located +X side
located -X side
located +Y side
located -Y side
high density D socket
high density D plug
micro D socket
micro D plug
circular series I socket
circular series I plug
circular series II socket
circular series II plug
29
GLAST LAT Project
DOE/NASA Peer Critical Design Review, March 19-20, 2003
Verification & Test: Example TEM & FSW
Power-PC
Processor
Flight
Software
28-V Power Supply
•
•
•
•
•
•
•
•
Processor: Motorola Power-PC
Flight Software
PMCIA LAT Communication Board for
– LAT Communication
Transition Board
– Trigger
TEM DAQ Assembly
TEM Power-Supply Assembly
28-V Supply
LAT-TD-00861
G. Haller
LCB: LAT
Communication
Module
Transistion-card:
Trigger Module
TEM DAQ
Assembly
Tower Power
Supply
Assembly
(1.5V/2.5V/3.3V/
0-100V/0-150V)
4.1.7 Electronics V5
30
GLAST LAT Project
DOE/NASA Peer Critical Design Review, March 19-20, 2003
Verification & Test: RAD750/SIB
•
•
•
3u-cPCI BAE RAD750
processor prototype
6u-cPCI Spacecraft
Interface Board (Silver
Engineering)
– MIL1553 interface
SIB
Flight Software
– Boot code development
– SIB board code
driver/interface
CPU
Courtesy of Dan Wood, NRL
G. Haller
4.1.7 Electronics V5
31
GLAST LAT Project
DOE/NASA Peer Critical Design Review, March 19-20, 2003
Verification & Test: Front-End Data Simulator
One of 16
Towers
7
PC (one for 2 TEM’s)
0
T
C
P
I
P
•
•
•
•
•
G. Haller
H
a
r
d
D
i
s
k
PCI Bridge Card
PCI Bridge Card
PCI Bridge Card
TEM
High-Speed
Serial
Connection
P
C
I
CAL FrontEnd Data
Simulator
P
C
I
TKR FrontEnd Data
Simulator
Data into TEM
like CAL and
TKR subsystem
electronics
PCI Bridge Card
System uses 9 PC’s
– 8 PC’s for 16 TEM’s
– 1 PC for ACD
Data transported to towers via high-speed data link; PCI bridge to local bus on
simulator
Data Simulators interface to TEM like CAL and TKR sub-system electronics
– CAL and TKR simulator board identical except code in FPGA’s
– Patch cable connect simulator to CAL and TKR TEM connectors
Can operate TEM or LAT with data generated from simulations
Data simulator board in layout
4.1.7 Electronics V5
32
GLAST LAT Project
DOE/NASA Peer Critical Design Review, March 19-20, 2003
Verification & Test: Testbed
•
•
•
•
•
•
•
•
Full DAQ set with EM2 hardware (each with identical interfaces and
functionality as flight)
Incremental built according to plan (complete testbed Feb04)
All DAQ modules including 16 TEM’s
Harness like flight
TKR and CAL front-end electronics for 1 tower, front-end simulator
boards for other 15 towers
Full set of ACD EM2 electronics
Spectrum Astro SC simulator
Excellent hardware and software testbed
EPU-1
TKR and CAL
Electronics Simulators
TEM DAQ Modules
TEM Power Supplies
EPU-2
Pwr Dist. Box
spare
spare
GASU
spare
spare
ACD
spare
SIU P
SC
simulator
Spectrum Astro
Simulator
G. Haller
SIU R
EPU-3
LAT EGSE
12 ACD Electronics
Cards
4.1.7 Electronics V5
33
GLAST LAT Project
DOE/NASA Peer Critical Design Review, March 19-20, 2003
Verification & Test: Spacecraft Interface
•
•
•
•
•
Use Spectro-Astro provided Spacecraft
Instrument Interface Simulator (SIIS)
Power
– Manual off-on switch
Control & Data Handling (C&DH)
– MIL1553
– Science Interface (LVDS)
– 1-PPS timing signal (LVDS)
– GBM GRB Candidate signal (LVDS)
– Discretes (CMOS)
– Analog Monitoring
Present plan is for SIIS to only provide
– Primary interface
• can’t test prim-redundant interface
response
– Timing accuracy of 1 PPS interface not
sufficient to test timing interface
performance
Work in progress
Power
MIL1553
SIIS
Science Data
LAT
1 PPS
GBM GRB
Candidate
Discretes
Digital
Analogs
LVDS: Low-Voltage-Differential-Swing signaling
G. Haller
4.1.7 Electronics V5
34
GLAST LAT Project
DOE/NASA Peer Critical Design Review, March 19-20, 2003
Summary
•
•
•
•
•
Flight designs for electronics components well advanced
Engineering models in use in EGSE test-stands
Flight-designs of DAQ ASIC’s submitted to fabrication
Component verification and test plans described
To be worked on:
– Worst-case & timing analysis plus test-procedures for
several modules still need to be completed
– EM2 tests (multi-tower with GASU) scheduled to be started
end of April 03
– Documents still need to be completed
• The electronics is ready to purchase flight
components/hardware
G. Haller
4.1.7 Electronics V5
35
GLAST LAT Project
DOE/NASA Peer Critical Design Review, March 19-20, 2003
Backup
G. Haller
4.1.7 Electronics V5
36
GLAST LAT Project
DOE/NASA Peer Critical Design Review, March 19-20, 2003
Trigger Path
•
TKR
CAL
16
Towers
TEM
•
GASU
( includes Global Trigger)
Trigger Inputs
ACD
Trigger Accept
•
•
•
G. Haller
TKR, CAL, and ACD produce fast (< 700 ns) trigger
input signals from their front-end comparators
– CAL, LO and HI discriminator signals
• LO is used as monitor trigger for TKR
• HI is used for very high energy (>10GeV)
events
– TKR, Layer OR
– ACD, LO and HI discriminator signals
• LO is efficient for minimum ionizing
particles
• HI selects CNO events
TEM produces sub-system specific trigger
primitives for CAL & TKR (e.g. 3-in-a-row)
Global Trigger in GASU receives trigger inputs
from ACD and TEM’s and decides whether to
trigger the instrument
If instrument is triggered, Trigger Accept signal is
distributed back to front-ends -> Event data is
generated
Total time from particle in detector to receipt of
trigger accept signal: < 2 usec
4.1.7 Electronics V5
37
GLAST LAT Project
DOE/NASA Peer Critical Design Review, March 19-20, 2003
Event Data Path
•
Towers
TKR
CAL
EPU
/SIU
TEM
•
•
GASU
Data to
Spacecraft
Event Data
ACD
•
•
G. Haller
Event data from CAL & TKR are
acquired by TEM’s, reformatted,
buffered, and transmitted via GASU
to all Processor Units (for ACD the
TEM function is included in the
GASU)
EPU’s assemble LAT events and
filter the data to reduce the event
rate of ~6 KHz down to ~30 Hz
Events arriving at EPU’s have target
EPU ID in header, so each EPU only
processes sub-set of events and
forwards filtered events via GASU to
other processors or spacecraft
solid-state recorder
All pipe-line stages subject to flowcontrol
Dead-time is monitored on an eventby-event basis
4.1.7 Electronics V5
38
GLAST LAT Project
DOE/NASA Peer Critical Design Review, March 19-20, 2003
Datapath & Building Events
Event Processing Unit (EPU)
Tower
Front-End
TEM
Event Builder
Processor
Latch
on
trigger
~50,000 TKR
GTFE MEM Cells
With 2 Events
Digitize
on
trigger
CAL ADC
Data
Trigger
Data
G. Haller
Cable
TKR FIFO
With 1 Event
Assemble
TEM
Event
CAL-TRG FIFO
With 3 Events
Accept/
Reject
From
other
TEM’s
FIFO for each
Tower
SW
Filter
Spacecraft
Assemble
LAT
Event
4.1.7 Electronics V5
39