GLAST LAT Project
DOE/NASA Review of the GLAST/LAT Project, Feb. 13-15, 2001
Electronics, Data Acquisition & Flight
Software
Gunther Haller
Stanford Linear Accelerator Center
Stanford University
Project Electronics Engineer
haller@slac.stanford.edu
Gunther Haller
1
GLAST LAT Project
DOE/NASA Review of the GLAST/LAT Project, Feb. 13-15, 2001
Electronics, Data Acquisition & Flight Software
Outline
 Requirements
 Technical
•
•
•
•
•
•
•
•




Architecture
Front-End Electronics
Tower Electronics Modules
L1 Trigger, Event-Builder, Processor Farm & SIU
Flight Software
Power Budget
Custom Integrated Circuits
Status & Issues
Organization
Schedule & Milestones
Budget
Summary
Gunther Haller
2
GLAST LAT Project
DOE/NASA Review of the GLAST/LAT Project, Feb. 13-15, 2001
High Level Requirements
• Flow-down from Level 2: LAT Instrument Performance
Specifications and LAT Interface Performance Specifications
– Command and messaging
– Readout configuration and control
– Triggering, event data acquisition from sub-systems, event
building
– On-board event reconstruction/event filtering
– On-board science analysis: transients (GRB, AGN flares)
– Live-time monitor
– Stream data to spacecraft
– Instrument health monitoring and exception handling
– LAT power system control
– Support for I&T
– Requirements for electronics: reliability, parts specs,
performance, ….
Gunther Haller
3
GLAST LAT Project
DOE/NASA Review of the GLAST/LAT Project, Feb. 13-15, 2001
Architecture
Tower
Front-End
TEM
CAL
TKR-CAL
#1
TKR
CAL
#15
TKR
CAL
#16
TKR
ACD
•
LAT Power
System
TEM
Control
& Data
Signals
EventBuilder &
Processor
Farm
TKR-CAL
TEM
HSK
System
Spacecraft
Interface
•
to/from
SC
•
•
•
•
•
TKR-CAL
TEM
ACD
Global L1
TEM
Trigger
Signals
16 TKR-CAL TEM’s (Tower
Electronics Modules) with
TKR and CAL electronics
ACD TEM with ACD
electronics
Global L1 Trigger
Event-Builder & Processor
Farm
Spacecraft Interface Unit
Power Supply System
House-Keeping (HSK) System
(T’s, I’s, V’s)
Trigger
Note: the GLB L1 TRG will be packaged together
with the ACD TEM -> ACD-TRG TEM
Gunther Haller
4
GLAST LAT Project
DOE/NASA Review of the GLAST/LAT Project, Feb. 13-15, 2001
Front-End Electronics
Sensor Analog
Processing
• CAL, TKR & ACD are front-end
sub-systems, similar in
Hit bits
from other
architecture
channels
Trigger
• Signals from sensors are
Primitives
Discriamplified & shaped
TRG Logic
minator
Trigger: analog signals are
Global TRG •
Acknowledge
discriminated and combined in
Event
front-end logic
Data
ZeroA/D
Event
• Global Trigger returns trigger
SuppresConverBuffer
sion
sion
acknowledge signal
• Data: analog signals are
digitized, buffered, & zerosuppressed (latter order
depends on sub-system)
• Each sub-system has one
analog and one digital fullcustom ASIC (see later)
Gunther Haller
5
GLAST LAT Project
DOE/NASA Review of the GLAST/LAT Project, Feb. 13-15, 2001
Tower Electronics Module (TEM)
Front-End
Electronics
•
TEM
Electronics
•
TKR/CAL
Control
From
System
Control
Control
TKR
TKR
Buffer
TRG
CAL
TRG
Buffer
CAL
Buffer
Note: on ACD TEM, CAL & TKR
are replaced by ACD
Gunther Haller
Event Data
to Event
Builder
•
Trans
mitter
•
TRG
Primitives
to Global
Trigger
•
•
TEM electronics supports one
tower each
Control:
– directs TEM and Front-End
Electronics
– handles time-stamp and event
number
Trigger: forms local trigger
primitives (e.g. layer-OR’s) and
transmits them to L1 Global Trigger
system
Buffers: buffer event fragments of
sub-systems. All front-end data is
stored zero-suppressed.
Transmitter: transmits complete
TEM events to Event
ACD TEM functions same as TKRCAL TEM
6
GLAST LAT Project
DOE/NASA Review of the GLAST/LAT Project, Feb. 13-15, 2001
Global L1 Trigger System
•
Global L1
Trigger
TEM
Primitives
Dead-Time
Monitor
16 sets of
CAL/TKR
Primitives
TACK and
TRG Type
TRG
Logic
To all
TEM’s
with
1 set of ACD
Primitives
Other TRG
sources
•
•
LUT
TRG
Event
Buffer
To
EventBuilder
•
•
•
•
Gunther Haller
Input:
– 16 sets of TKR and CAL trigger primitives
(one set from each tower)
– 1 set of ACD trigger primitives from ACD
TEM
– Additional trigger sources: control,
random, prescalers
– Trigger throttle signal from each TEM
Decides whether to trigger LAT. Generates L1
Trigger Acknowledge (TACK) signal via Look-Up
Table
Output:
– TACK and trigger type is transmitted to all
TEM’s
– TRG event data is buffered and sent to EB
Consequence of TACK: Front-end data is
transferred into event buffers
Throttles TACK when no memory buffers are
available for event data
Monitors LAT deadtime
L1 Trigger
– Rate: ~10 KHz max (~5.5 KHz avg)
– Dead-time after TACK: 20 msec (CAL)
– Latency: 2 msec
7
GLAST LAT Project
DOE/NASA Review of the GLAST/LAT Project, Feb. 13-15, 2001
Event Builder (EB)
•
•
TKR-CAL
TEM 1
to
Processor 1
TEM 1
Buffer
•
LUT &
Logic
TKR-CAL
TEM 16
TEM
16
Buffer
ACD
TEM
TEM
17
Buffer
to
Processor n
Transmission
of complete
events
Gunther Haller
•
•
Tower event fragments are variablelength
Fragments are asynchronously received
into 17 EB TEM buffers
When an event is complete the entire
event is transmitted to one of the
processors in the farm
The target processor is determined on
an event-by-event basis by the event
header (event number & event type) and
its entry in the EB Look-Up Table (LUT)
Two architectural choices:
– Single-box solution: one EB with n
processors
– Multi-box solution: multiple EB’s
with 1-2 processors each
– Decision depends on # of
processors required
– Also impacts amount of redundant
electronics required
8
GLAST LAT Project
DOE/NASA Review of the GLAST/LAT Project, Feb. 13-15, 2001
Processor Farm & SC Interface Unit
• Processor Farm
– Class of Processors: Power PC 603E or PPC 750
– Choice of
• GLAST custom board
• Commercial board
• Spacecraft Interface Unit
– Processor board
– Command interface to SC (MIL1553)
– High-speed data interface to SC
– Power supply interface to SC
– Environmental monitoring interface to SC
Gunther Haller
9
GLAST LAT Project
DOE/NASA Review of the GLAST/LAT Project, Feb. 13-15, 2001
Flight Software
•
•
•
Spacecraft
(capacities)
LAT Processor
Farm
From
Event
Builder
Level
3
Filter
Level
2
Filter
SSR
32 Mb/s*
Event Rate:
Max. 10 KHz
2 KHz
•
Downlink
•
300 kb/s
Orbit
Average
•
30 Hz
(~10 Kb/event)
•
* Overcapacity for burst conditions
Gunther Haller
Dataflow
Event filtering
Command, Control and
Configuration
Data Monitoring
– Integrity & Quality
Housekeeping
– Temperatures, currents, …
Uplink
– Behaviour scripting
– Software reload,
reconfiguration
Autonomous Behaviour
– Transient detection and alert
– Orbit related configuration
(e.g. SAA transit)
10
GLAST LAT Project
DOE/NASA Review of the GLAST/LAT Project, Feb. 13-15, 2001
Instrument Power
Item
Estimate
(Watts)
ACD
29.0
26.0
89.7%
Tracker
219.0
40.0
18.3%
Calorimeter
116.0
16.0
13.8%
Trigger & Data Flow
98.0
44.0
44.9%
Grid/thermal
31.0
20.0
64.5%
Instrument Total
493.0
146.0
29.6%
Inst. + Reserve
639.0
Requirement
650.0
700
Unallocated Margin
11.0
650
% Margin
1.7%
Current LAT Reserve + Margin:
= 157 W
= 32% of current estimated power
Goal for PDR Margin plus Reserve > 15%
Goal for CDR Margin plus Reserve > 10%
Reserve
(Watts)
%
Proposed changes to power baseline which exceed Trigger
require approval by DOE LAT & NASA GLAST Project Managers
Margin + Reserve
157.0
% Margin + Reserve
31.8%
Goals estimated using guidelines
given in ANSI/AIAA G-020-1992
"Estimating and Budgeting Weight
and Power Contingencies for
Space Craft Systems"
Gunther Haller
Power - Watts
LAT Power
Requirement
600
Trigger
550
500
· Prelim inary Baseline
¨ Current
Estim ate
450
Proposal
SRR
I-PDR
I-CDR
Ship
Launch
400
Jan-99
Jan-00
Jan-01
Jan-02
Jan-03
Jan-04
Jan-05
Jan-06
11
GLAST LAT Project
DOE/NASA Review of the GLAST/LAT Project, Feb. 13-15, 2001
Application-Specific Integrated Circuits
–
–
–
–
Six full-custom ASICs in front-end systems
One or two digital ASICs in DAQ system
Analog: manual layout
Typical Digital: VHDL -> Simulation -> Synthesis -> Auto
Place&Route -> Verification
– Several iterations in schedule for each ASIC
ASIC Type
Prel. Prototype
Full Engineering
Model
Submission
Institution
TKR Analog
exists
March 2001
UCSC (SLAC)
TKR Digital
exists
April 2001
UCSC, SLAC
CAL Analog
exists
March 2001
NRL, SLAC
CAL Digital
Jun 2001
Dec 2001
NRL
ACD Analog
Sep 2001
Jan 2002
GSFC
ACD Digital
Oct 2001
Jan 2002
GSFC
TEM Digital
(tbr)
Oct 2001
Feb 2002
SLAC, HEPL
Gunther Haller
12
GLAST LAT Project
DOE/NASA Review of the GLAST/LAT Project, Feb. 13-15, 2001
Target ASIC Technology
•
•
•
•
0.5 um Agilent Bulk CMOS
0.25 um TSMC Bulk CMOS
0.25 um/0.5 um Peregrine Silicon-on-Sapphire
Total Radiation Dose: all radiation insensitive to well above 10
Krad requirement
• Single-Event Latchup Requirement: LET of 8 MeV-cm2/mg
– SOS: no latchup
– Agilent: prel. measurements good up to LET of 70
– TSMC: no measurements yet but has epitaxial layer
• Single-Event Upset
– Use SEU “hardened” latches for configuration registers
LET: Linear Energy Threshold
Gunther Haller
13
GLAST LAT Project
DOE/NASA Review of the GLAST/LAT Project, Feb. 13-15, 2001
Status
• Requirement & Conceptual Design documents in draft for
– ACD, TKR & CAL Electronics
– Trigger & Dataflow Electronics
– Aux. Systems, Interfaces
• Prototypes for three of the ASICs exist
• Software level 2 filtering demonstrated: 50 msec/event for
PPC603E, 100 MHz
• Software Coding Infrastructure developed
• Basic concepts demonstrated in beam-test early 2000 and for
present balloon-flight electronics:
– Sub-system control & data readout
– Generation of CAL and TKR trigger primitives
– Assembly of CAL & TKR event fragments on TEM
• Electronics for balloon-flight in commissioning stage
Gunther Haller
14
GLAST LAT Project
DOE/NASA Review of the GLAST/LAT Project, Feb. 13-15, 2001
Issues
• Hardware
– SEU/SEL performance of some of the ASIC processes (will
be tested)
• Software: Level 3 filter algorithm and CPU-cycle requirements
– Cascades into
• Number of processors
• Organization of event-builder/processors. Options are
– Single-box solution with EB and all processors
– Multi-box solution with multiple (parallel) EB’s
• Tower <-> Processor and Processor <-> Processor
communication
Gunther Haller
15
GLAST LAT Project
DOE/NASA Review of the GLAST/LAT Project, Feb. 13-15, 2001
Organization
Electronics, DAQ & Flight Software
G. Haller
SU-SLAC
WBS 4.1.7
Electronics Management
G. Haller
SU-SLAC
WBS 4.1.7.1
Reliability & QA
D. Nelson
SU-SLAC
WBS 4.1.7.2
Dataflow Elex
G. Haller
SU-SLAC
WBS 4.1.7.4
Spacecraft Interface
M. Lovellette
NRL
WBS 4.1.7.5
Power Conditioning
D. Nelson
SU-SLAC
WBS 4.1.7.6
Tracker Elex
R. Johnson
UCSC
WBS 4.1.4.3.3.3
NRL
NRL
SU-HEPL
SU-HEPL
SU-SLAC
SU-SLAC
Gunther Haller
NRL
CEADAPNIA
INFN
SU-SLAC
Front-End Elex
G. Haller
SU-SLAC
Calorimeter Elex
N. Johnson
NRL
WBS 4.1.5.7
Enclosures/Harness
M .Freytag
SU-SLAC
WBS 4.1.7.7/4.1.7.8
Flight Software
J. Russell
SU-SLAC
WBS 4.1.7.9
GSE & Operation
S. Williams
SU-HEPL
WBS 4.1.7.A
Instrument I&T
G. Haller
SU-SLAC
WBS 4.1.7.C
NRL
SU-HEPL
SU-SLAC
NRL
SU-HEPL
SU-SLAC
ACD Elex
J. Ormes
GSFC
WBS 4.1.6.4
GSFC
NRL
SU-HEPL
SU-SLAC
16
GLAST LAT Project
DOE/NASA Review of the GLAST/LAT Project, Feb. 13-15, 2001
Schedule
A c tivity
ID
A c tivity
D e scr i ption
Or ig
Re m
E a r ly
D ur
D ur
S tar t
E a r ly
Finish
FY 00
FY 01
FY 02
FY 03
FY 04
FY 05
FY 06
Gamm a Ray Large Area Space Telescope
4.1 .7 E LE C TR O N IC S
S u btota l
1,3 68
04 /03/0 0
09 /30/0 5
1,1 79
04 /03/0 0
01 /03/0 5
97 3
02 /01/0 1
01 /03/0 5
41 5
04 /03/0 0
11 /28/0 1
82 5
04 /03/0 0
07 /28/0 3
77 1
04 /03/0 0
05 /09/0 3
73 9
04 /03/0 0
03 /26/0 3
16 8
06 /01/0 1
02 /06/0 2
26 0
06 /01/0 1
06 /18/0 2
1,1 49
10 /12/0 0
06 /02/0 5
56 1
03 /01/0 1
06 /02/0 3
55 8
06 /14/0 2
09 /10/0 4
26 5
09 /09/0 4
09 /30/0 5
+ 4 .1.7. 1 E LE C TR O N IC S M A N A G E ME N T
+ 4 .1.7. 2 R E LIA B IL ITY & Q U A LI TY A S S U R A N C E
+ 4 .1.7. 3 E LE C TR O N IC S S Y S T E M D E S IG N
+ 4 .1.7. 4 D A TA FLO W E LE C TR O N IC S (T E Ms + P R O C FA R M)
+ 4 .1.7. 5 S P A C E C R A F T IN TE R FA C E U N IT
+ 4 .1.7. 6 P O W E R C O N D ITI O N IN G
+ 4 .1.7. 7 E N C L O S U R E S
+ 4 .1.7. 8 C A B L E H A R N E S S
+ 4 .1.7. 9 FL IG H T S O FTW A R E
+ 4 .1.7. A E G S E & O P E R A TIO N S
+ 4 .1.7. C IN S TR U M E N T IN T E G R A T IO N & TE S T
+ 4 .1.7. D M IS S IO N S Y S TE MS I N TE G R A TIO N & TE S T
DRAFT
Gunther Haller
17
GLAST LAT Project
DOE/NASA Review of the GLAST/LAT Project, Feb. 13-15, 2001
Milestones
•
•
•
Electronics & Data Acquisition (E&DAQ) Requirements Review 03/27/01
Flight Software Requirements Review
04/04/01
E&DAQ PDR
06/20/01
•
•
•
•
•
Flight Software PDR
LAT Instrument PDR
Engineering Model 1 (EM1) System Test Complete
E&DAQ CDR
Flight Software CDR
06/13/01
08/06/01
03/15/02
06/19/02
06/12/02
•
•
08/05/02
•
•
LAT Instrument CDR
Engineering Model 2 (EM2; flight software & DAQ) System
Test Complete
Deliver Electronics Units for Calibration Unit
Assemble/Test Qual Unit
•
Assemble/Test last Flight Unit
12/01/03
Gunther Haller
05/10/03
05/10/03
07/15/03
18
GLAST LAT Project
DOE/NASA Review of the GLAST/LAT Project, Feb. 13-15, 2001
Interim Electronics Cost Estimate*
(Escalated K$)
4.1.7 Electronics
FY00
FY01
FY02
FY03
FY04
FY05
Total
SLAC
(DOE)
221.6
464.8
540.2
505.3
311.2
323.6
2366.6
HEPL
(NASA)
512.3
588.5
2404.1
4004.3
2542.2
516.4 10567.8
NRL
(NASA)
526.0
468.3
1669.4
1675.0
1655.8
438.1
1259.9
1521.6
4613.6
6184.7
4509.2
Total
6432.5
1278.1 19367.0
*DOE/NASA funding.
Gunther Haller
19
GLAST LAT Project
DOE/NASA Review of the GLAST/LAT Project, Feb. 13-15, 2001
Summary
• Requirements and Conceptual Design documents well under
way
• Principles of tower event assembly and trigger demonstrated in
beam-test electronics
• Prototypes of several ASICs exist
• Software coding infrastructure developed
• Schedule: fully entered in PMCS up to lowest level (L7)
• Budget
– All labor and material cost items entered in PMCS
– Revised bottoms-up estimate of components in the next few
months
• Balloon-flight electronics, DAQ & software in commissioning
stage (based on electronics used in beam-test FY2000)
Gunther Haller
20