VLSI Testing
Lecture 12: Alternate Test
Dr. Vishwani D. Agrawal
James J. Danaher Professor of Electrical and
Computer Engineering
Auburn University, Alabama 36849, USA
vagrawal@eng.auburn.edu
http://www.eng.auburn.edu/~vagrawal
IIT Delhi, July 30, 2012, 4:00-5:00PM
Copyright 2012, Agrawal
Lecture 12: Alternate Test
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Contents
 Setting thresholds in model-based test
 Alternate test
 Summary
 References
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Lecture 12: Alternate Test
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Setting Thresholds in
Model-Based Test




In model-based test, component values are
determined.
Preset “thresholds” for component
variation classify the device under test as
good or faulty.
How do we determine the “thresholds”?
For example,
 Circuit is good if R1’ ≤ R1 ≤ R1’’
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Lecture 12: Alternate Test
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An Operational Amplifier
R2
R1
+
Gain = V2/V1 = R2/R1
V1
_
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Lecture 12: Alternate Test
V2
4
Pessimism in ModelBased Test
Yield
loss
R2
Only good
devices
accepted
0
0
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R1
Lecture 12: Alternate Test
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Reducing Yield Loss
Reduced
yield loss
R2
Faulty
devices
accepted
0
0
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R1
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Yield Loss and Defect Level



Yield loss: Amount of yield reduction because
some good devices fail non-functional tests.
Defect level (DL): Fraction of faulty devices
among those that pass non-functional tests.
Example: 1,0000 devices are fabricated. 7,000
are good. True yield, y = 0.7. Test passes 6,900
good and 150 bad devices. Then,
 Yield loss = (7,000 – 6,900)/10,000 = 0.01 or
1%
 DL = 150/(6,900+150) = 0.02128 or 2.128% or
21,280 DPM (defective parts per million)
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Lecture 12: Alternate Test
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Yield Loss and Defect Level
All fabricated devices
Good
devices
Devices
passing
test
Yield
loss
Defect
level
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Lecture 12: Alternate Test
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Component Variation
(Statistical)
Uniform
Gaussian
Mean
Mean
Component (R or C) value
Component (R or C) value
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Lecture 12: Alternate Test
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Monte Carlo Simulation

Consider operational amplifier example.
 R1 and R2 are random variables with given
(uniform or Gaussian) probability density
functions with
 Mean = nominal value
 Standard deviation based on manufacturing data
 Generate large number of samples for R1 and
R2
 Simulate each sample using spice
 Determine gain for each sample
 For each set of tolerance limits, determine
yield loss and defect level.
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Lecture 12: Alternate Test
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Monte Carlo Simulation Data
R2
0
0
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R1
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Setting Test Limits
Minimize yield loss
R2
Minimize defect level
0
0
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R1
Lecture 12: Alternate Test
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Alternate Test





Besides components (e.g., R1 and R2 for
operational amplifier) easily measurable
parameters used for testing.
An example is the supply current IDD of the
operational amplifier.
A simple test is to measure IDD(0) for 0V input.
Monte Carlo simulation is then used to set the
limits on IDD(0).
 Large number of sample circuits with
component variations are simulated to
determine thresholds for IDD(0).
Additional measurements can improve test.
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Lecture 12: Alternate Test
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Alternate Test: Setting
Thresholds
Minimize yield loss
Gain
Within
spec.
gain
Minimize defect level
Fail
Pass
Fail
0
0
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IDD(0)
Lecture 12: Alternate Test
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References


P. N. Variyam, S. Cherubal and A. Chatterjee,
“Prediction of Analog Performance Parameters
Using Fast Transient Testing,” IEEE Trans.
Computer-Aided Design, vol. 21, no. 3, pp. 349361, March 2002.
H.-G. Stratigopoulos and Y. Makris, “Error
Moderation in Low-Cost Machine-LearningBased Analog/RF Testing,” IEEE Trans.
Computer-Aided Design, vol. 27, no. 2, pp. 339351, February 2008.
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Lecture 12: Alternate Test
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