Draft MWA Test schedule
Notes:
MW & IM review of 10 June 2010 added in cyan
This document is a first draft list of tests on MWA masters. It also includes a brief description of jigs
that are envisaged for these tests. I have not named or numbered the tests but the order within each
master is the intended order in which they would be done. The order of the masters in this document is
close to an assembly order but don’t take it as such. Some masters will need interleaved tests and
assembly instructions.
[my comments in orange– mwaterson, 8/06/10]
Test and jig descriptions are italicised and indented after a heading TEST or JIG. Eg
JIG
This is a real jig, not just an example of the font used.
PSI needs to buy an I2C test jig, eg http://www.i2ctools.com/products.html#USBtoI2C
This would allow us to test I2C on Temp Monitor, PSU, ASC & ATIM transition, otherwise we
will end up testing these boards twice for different functions, US$300 will be worthwhile. The
software that comes with this allows sequences of I2C commands to be sent which will allow
PSI to write semi-automatic testing of some I2C peripherals.
MW has cheaper option on order and can add one more to the order – also add bus monitor
Commentary text is interleaved in normal font. Some comments are underlined to draw attention to
some particular need to action. Red comments denote where information needs to be extracted from
MWA. Green comments are notes that I want to flag to myself.
Many of the tests still need requirements filled in and some need sequences of I2C commands to be
worked out. Some need software to be developed. Some requirements will be easiest to fill in by
measuring the result on the first board.
[most of the I2C codes exist for the V1 receiver and will be provided; exception is the I/V monitor
which I need to work out myself]
Once general agreement is reached on the tests I will define the jigs more fully with sketch diagrams.
At this stage the document is intended for discussion on where testing needs to be expanded or
reduced.
MST-0430 MWA Octal Temperature Sensor 90% build.
This board is sufficiently simple that spending significant time testing it will be wasteful. Expected
failure rate is low and any faulty units can be picked out at higher level than board testing; therefore,
no testing on this master.
MST-0431 MWA Dual Octal Temperature Sensor
TEST
Photograph top and bottom of both customised MST-0430 boards before assembly.
Assemble boards into stack.
1
Draft MWA Test schedule
JIG
A cable with a 5V reg and diode protection to connect a bench supply to the D9 connector so
Vin = 5V. Also connect an I2C2PC dongle cable to this connector.
D9 connections:
Pin 5 = output of regulator via two flying ith banana plugs to allow insertion of
multimeter for current monitoring
Pin 9 = GND of PSU + wire 3 of dongle cable
Pin 2 = SCL = wire 4 of dongle cable
Pin 6 = SDA = wire 1 of dongle cable
TEST
Plug the board into the jig, power it up and check 3.3V appears across pins of P1 on top
board. Check current draw less than 1mA using flying leads and a multimeter.
Further testing of this master requires either a large part of a functioning MCC module or a custom jig
(eg based on a COTS USB-I2C adapter and software). Preference is for the jig – yes, we have the I2C
jig.
JIG
Connector #1 connect pins 1,3,5,7 & 10 (0V on chans 1,3,5 &7) and
connect pins 2,4,6,8 & 15 (Vref on chans 2,4,6 & 8).
Connector #2 connect pins 1,2,3,4,5,6,7,8 & 9 (1.625V on all channels)
Purpose of test at this level is to check that there are no shorts between adjacent channels and that
there is connectivity and basic functionality of ADC.
TEST
Connect I2C2PC dongle to jig to interrogate all channels.
Plug Connector #1 into each input connector in turn and check that the channels 1,3,5 & 7
read 0x000 (+/- 2 bits?) and channels 2,4,6 & 8 read 0xFFF (+/- 2 bits?) on that particular
board
Repeat with Connector #2 and look for 0xA66 (+/- 0x20?) on each channel.
[also verify that the boards respond to the correct address]
Do a bus scan
TEST
Photograph the assembly.
MST-0417 MWA 550-ATIM_I&C PCB
This board sits between the SBC and the rest of the hardware. It contains a Lattice Semiconductor
CPLD. No information on the programming of the CPLD has been supplied to PSI.
In order for PSI to manufacture/test these boards we will need to purchase a programming cable:
Lattice Semiconductor part HW-USBN-2A ispDOWNLOAD Cable (US$149) and be supplied with
the MWA design file for the CPLD. [production cpld file to be provided as soon as available; we
should discuss adding test features to this now, since it needs work anyway. Alternatively we can
compile a specific test version that exercises the pins in some obvious way.]
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Draft MWA Test schedule
CPLD can be configured to “test” or “run” state via “spare” inputs on J3. Consider cable jig for
detecting ripple outputs on P2, P3 etc
Need for simulated clock to generate signals – unlocked - MW to send info on existing circuits
Without the CPLD design file the amount of testing that can be performed is very limited. All I/O pins
on the CPLD will be weakly pulled-up to Vcc. If PSI is provided with the design file and can program
the devices then comprehensive testing will require a definition of the CPLD function.
With the existing information available to PSI we can do the following:
Test I2C on-board peripherals via RS232 port
Test the Beam Former clock generator
Test the Beam Former power control
Test the legacy fan controls
Testing beyond these items would be simplest if this board was plugged into a functioning SBC, so see
tests in the next higher level in the tree.
Also testing of I2C bus expansion can be delayed until other peripheral boards (with tested I2C
peripherals on them) can be plugged into the otherwise verified ATIM and used as transponders.
[may be worth using a more specific diagnostic board to verify I2C bridge performance, marginal
conditions may still work in lab]
MW to get one of these from I2C.com
TEST
Photograph top and bottom of board.
TEST
Resistance check.
J1 pin 1 to pin 10 greater than xx
J1 pin 3 to pin 10 greater than xx
TEST
Apply power through J1 (+5V & +12V) using sample always-on PSU and cable jig
Check LED 1 & LED2 light.
Check current draw: on 5V < ??mA on 12V < ??mA
Check 3.3V at pin 3 of U5 (there is a pad near positive end of C13 since there is no designated
test point)
TEST
I2C/U1/U6 verification
Short pin45 of J10 to pin 49 of J10 to enableU9 & U10
Connect RS232 port to J9. Baud rate is 57600.
Verify visually that SL3 is closed, SL4 open
Use terminal program to send ASCII commands to read temperature from U6, warm U6 and
verify change in code.
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Draft MWA Test schedule
Command sequence should simply be to read from temperature register G1S9302wxyzP where
wxyz is the returned hex value. wx is four sign bits and should be 0, xy and high bit of z are
temperature reading, low three bits of z are status bits – ignore.
Send ASCII commands to U1 to initialise clock to 100kHz and to ignore Powerdown and
Enable inputs. Verify 100kHz signal at upper end of R1 (upper in relation to upright reading of
S/N). I need to work out these codes.
Make sure no temperature monitor boards are plugged in – just in case the ADS7828
addresses are not set correctly as happened to me.
Note Cannot test OUT1 clock until CPLD is programmed to pull the CTL1 input low!
Should be able to test OUT0 but it is not connected to anything.
Send: S B0 02 10 00 R 02 rr rr ; Turns on OUT0 with default CTLx signals and sets
prescaler to 1 rr rr should be 10 00 confirming write to MUX register
Observe 40MHz on U1 pin 2 (OUT0)
Send: S B0 01 17 80 R 02 rr rr ; Changes prescaler to 8, rr rr should confirm 17 80
Observe 5MHz on U1 pin 2
First ATIM board passes this!
[MWA will supply codes & sample programming for clock IC, this work has been done]
TEST
CPLD programming and verification
Connect ispDOWNLOAD Cable to J2, load design file into CPLD
PSI needs more info on the function performed by the CPLD to expand any testing here.
MST-0421 MWA 100_ASC PCB
This is the bare board as received from the board stuffer, these tests to be done before it is fully
screwed into its housing. The approach at this stage is to test the board as much as possible either
before putting it into the housing or with it loosely fitted. Once the initial production process has been
demonstrated to be reliable we can move most of these tests up one level and perform them after full
assembly.
This board contains a PIC16LF877A. PSI has been given no information on the program required for
this device. PSI has appropriate programming tools for this family of devices.
[complete source and object code will be provided. This code contains a test mode which exercises the
address,data and attenuator bits.]
MW to look into putting PIC into test mode via RB6/7 and ICSP header
Note that the inclusion of D100 in the reset circuit may cause problems; PSI recommends the reset
configuration of the PIC16 be reviewed and that the circuit be modified if necessary.
[please review this with mfw!]
MW to decide on course of action
R33 on each channel should not be populated so that the digital side of this can be verified without
powering all the RF sections. The R33s can be fitted one at a time as the RF testing proceeds.
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Draft MWA Test schedule
Use resistance to ground test (MW has a list) then just power up with all sections powered – make a
jig with fans.
File of resitance checks supplied see C:\Documents and Settings\ian_m\My Documents\Temp\MWA
22078\ASC Test\ASC test checklist.xls
[I found no problems with testing with all R33s installed, provided the first test is of the output
voltages on the RF regulators, a fan bank was used to cool the boards, only one channel at a time
driven (though that probably does not matter). Testing OUT of the heatsink allows simple probing of
the RF path with a scope (apply a 100-200MHZ tone at suitable level). Test mode of PIC program
cycles all atten bits or values in sequence, we can modify this to be the power-on default for testing]
It is not convenient to do preliminary testing on this board without some form of program in the PIC.
[unless manual control board used]
This goes in via P102 and drive the lines directly while main PIC is held in reset. Existing boards need
connector modified.
MW to provide existing PIC code for PSI to use as a basis.
Before the PIC is programmed, all the select lines to the DAT-31PP step attenuators will be tri-state.
The DAT-31PPs are wired to power up at 31dB attenuation. The expected insertion loss of each
channel in the pass band would therefore be in the range:
Min = 14.5 – 32.5 + 12 – 32.5 + 12 – 3 = -29.5dB
Max = 17.5 – 32.5 + 13.5 – 32.5 + 13.5 – 3 = -23.5dB
With additional 6dB loss from a matching pad, this level of attenuation is inconvenient for verifying
that the RF channels are functional before the board is inserted into its housing. If the PIC is
programmed with the final code then it needs to be sent commands via the I2C to set the attenuator
settings.
There are two choices:
1. PSI writes an alternative test program for the PIC. A test jig that connects an LED between pin
6 and GND of P100 and connects two push buttons between pin 8 & GND and pin 10 and
GND respectively will allow manual input to the PIC. The test program will monitor these
lines and in response to one button will set the digital attenuators on all channels to 0dB, and in
response to the other button will increase alternately the attenuation of each DAT-31PP in 1dB
increments. The LED can be used for visual output from the test program, flashing at N+1
times then off for 1 second where N is the total attenuation set above 0dB.
2. PSI deciphers the method of driving the PIC via I2C and sets up command sequences to set the
attenuators to desired points. This has the advantage of testing the final code in the PIC and
means the PIC only has to be programmed once.
I actually favour option 1 because it means we can move the ASC around testing stations without
having to follow it with the I2C jig which may be required for testing other boards while the ASC is
being tested, particularly when it is in environmental testing.
[MWA has copies of a manual control pcb which can be used to test the ASC attenuators assuming
that the PIC is erased (outputs are tristated). A switch is provided to allow use a monitor (no control
lines active). Issues were observed with the original high-density connectors used, this may need
modification to match the new ASC layout)]
Need to provide MW with PDF of genesis layout for comparison with Altium – done 17/6/10.
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Draft MWA Test schedule
TEST
Photograph RF side of board
TEST
Verify R33 removed from each channel.
Resistance checks:
On P100 pin 1 (or 2) to pin 3 (or 4) > ??
On each channel U8 pin 1 to GND > ?? 
Visually check that 9V & 5V rails are not shorted by optional 0R installation – only one of
R7/R8 & R14/R15 resistors should be installed..
TEST
Apply +12V to P100 using cable jig
Verify that LED lights (powered via R102)
Check 3.3V appears at U100 pin 1
Either program the PIC with PSI’s test program and verify that LED begins to flash or
progam the PIC with MWA code and check its function via I2C
TEST
Preliminary RF gain and frequency response.
Loosely fit the PCB into the housing.
For each channel:
Connect multimeter on current range in place of R33, power up board and check
current is in range 400mA to 600mA.
Power down board, insert 0R link in place of R33 on channel under test
Connect VNA port 1 to input via 50 - 75 impedance matching pad and quick-F
connector. [Can VNA be configured to 75Ohm source/ref?] No
Example quick F connector, look for an easy source
http://www.trianglecables.com/200-104.html
Connect VNA port 2 to output via quick-SMA connector (PSI has some of these
already) and a 10dB pad.
Set VNA power level to -10dBm, start 10MHz stop 600MHz
Power up board, verify 1Hz blinking LED, press ZERO button if required
Measure frequency response of channel
Verify lower 3dB point 80 MHz +/- 5 MHz
Verify upper 3dB point 300 MHz +/- 15 MHz
Verify passband is flat to +/- 1dB
Verify gain in passband is in range 15 dB to 23 dB
Increase attenuation of alternate DAT-31PPs either via buttons or I2C
Verify gain decreases 1dB
Verify frequency response remains flat +/-1dB in pass band
Repeat last step until gain reaches -10dB.
Remove 0R link and go to next channel.
[somewhat faster to drive each data line & confirm 1/2/4/8/16dB change unless automated
delta measurement routine is written for VNA]
Gain calculations for reference
Input
-10 dBm
After matching pad -16 dBm
After 1st gain stage -1.5 to 1.5 dBm (gain 14.5dB to 17.5dB, P1dB 16.5dBm)
After transformer
-2 to +1 dBm
After DAT-31PP #1 -3.5 to -0.5 dBm
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Draft MWA Test schedule
After 2nd gain stage
After DAT-31PP #2
After third gain stage
After filter
After 10dB pad
8.5 to 14 dBm (gain 12dB to 13.5dB, P1dB 26.5dBm)
6 to 12.5 dBm
18 to 26 dBm (gain 12dB to 13.5dB, P1dB 26.5dBm)
15 to 23 dBm
5 to 13 dBm = 15 to 23 dB gain
TEST
Connect I2C jig and interrogate temperature monitor on PCB.
Verify temperature is correct, warm and cool temperature monitor and verify readout changes.
Need to work out codes for DS75S [MWA has, will provide code] [Verify I2C address]
After these tests are completed, install the PCB fully in its housing and install all 8 Ferrite 119-3419
components at R33 locations.
TEST
Photograph digital side of board and enclosure mounting.
MST-0422 MWA Analogue Signal Conditioning Module
This is the tested MST-0421 PCB installed in the Aluminium housing.
TEST
Install 8 x 50 1W terminators on output SMAs.
Connect +12V to P100 connector and verify current draw is equal to sum of currents for all 8
channels as measured in lower level assembly test +/- 50mA.
TEST
For pre-production units or samples only
Put ASC module in environmental chamber, connect 8 sets of extension cables out to where
they can be connected to the mobile VNA.
Set all attenuators to 0dB and verify frequency response and gain of all 8 channels at 25C.
Repeat at 45C and 5C. See previous test for expected results.
Power down and cycle temperature from -5C to 80C, 5C/min ramps and 15min dwell
Repeat measurements of frequency response and gain
If necessary program the PIC with final code at this point.
TEST
Connect I2C jig and send command sequences to PIC and verify it responds either by I2C
responses or if the MWA code doesn’t have responses, by sending a command to set Attenuator
1 and checking that ALatch1 pulses with an oscilloscope.
Need definition of how PIC responds to I2C commands
[normal command response returns temperature reading from on-board sensor or error code]
If the board was put through temperature cycles then re-test the on-board temperature monitor.
Need to measure noise floor of early units with terminated input (remember 75) & Channel isolation,
VSWR, P1dB, Spurs v power level.
MST-0491 MWA 820_PwrDis PCB
7
Draft MWA Test schedule
This is the PCB that distributes power from the Cosel PSU to the front panel of the power supply rack
unit.
All we want to test at this level is that there are no shorts on the board that will cause smoke when the
Cosel PSU is connected.
TEST
Verify resistances:
P5 pin 1 to pin 2 > 10k
P5 pin 3 to pin 4 > 10k
P5 pin 5 to pin 6 > 10k
P5 pin 7 to pin 8 > 10k
P5 pin 9 to pin 10 > 10k
J1 pin 12 to pin 13 > 1k
MST-0429 MWA Power Supply Module
This is the complete module including metalwork. For safety it is probably sensible to assemble the
Cosel PSU, the tested MST-0491 into the metalwork with cables before attempting to test any thing.
JIG
A D25 connector to mate with J1 and connected to a breadboard and to flying leads for
connection to a bench PSU for 5V (series diode protected).
On the breadboard a set of DIP switches to allow pins 15, 16, 17, 18 & 19 to be selectively
shorted to ground (to turn power supply units on) and,
A set of LEDs between pins 2, 3, 4, 5, 6 & 7 and ground to show state of “alarm” signals.
LEDs will go out if ALARM condition exists, good supply = LED lit.
Make sure there is enough cable between the D25 and breadboard so that if required the PSU
can be put in the environmental chamber with the breadboard outside.
Also put a connector on this JIG to allow I2C tester to be plugged into J1.
TEST
Switch all DIP switches off
Connect +5V via jig to J1
Verify all LEDS are off
Verify 3.3V at U1 pin 1
Turn on 240VAC switch to power Cosel unit.
Verify ALARMPRIbar LED (pin 2) comes on)
Switch pin 15 DIP switch on (pin goes low)
Verify ALARM5bar LED (pin 3) comes on
Verify 5V on pin A1 (A2 = 0V) of P2, P3, P6 & P9
Switch pin 15 DIP off
Switch pin 16 DIP on
Verify ALARM12bar LED (pin 4) comes on
Verify 12V on pin A3 (A2 = 0V) of P2, P3, P6 & P9
Switch pin 16 DIP off
Switch pin 17 DIP on
Verify ALARM48Abar LED (pin 5) comes on
Verify 48V on between pins A1 and A2 of P12 and P15 (A1 = 0V)
Switch pin 17 DIP off
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Draft MWA Test schedule
Switch pin 18 DIP on
Verify ALARM48Bbar LED (pin 6) comes on
Verify 48V on between pins A1 and A2 of P12 and P15 (A1 = 0V)
Switch pin 18 DIP off
Switch pin 19 DIP on
Verify ALARM48Cbar LED (pin 7) comes on
Verify 48V on between pins A1 and A2 of P12 and P15 (A1 = 0V)
Switch all DIP switches on
Verify all LEDs light up.
JIG
High power load resistors on heatsinks. Cables to mating plugs for P2 & P12
Banana sockets for test points to measure voltages across load resistors.
5V load = 4 x RS 158-301 1 50W switched in parallel.
200W capacity, nom. 20A = 100W
12V load = 3 x RS 136-200 3.3 100W switched in parallel.
300W capacity, nom. 10.9A = 131W
48V load = 16 x RS 107-4131 5.6 50W 4 switched parallel ranks of 4 resistors in series.
800W capacity, nom. 8.6A = 413W
Total max power = 100 + 131 + 413 = 644W
Power resistors are +/-5% and 1.05 x 644 = 676W is above Cosel capacity.
Add facility for trim resistors.
Allow for hardwiring in options such as:
On 5V load:
10m in series with 5V load -5% is 0.2475, 20.2A, 101W
10 m will dissipate 4.1W RS 160-269 is 25W
5 in parallel with 5V load +5% is 0.2494, 20.05A, 100.2W
5 will dissipate 5W RS 159-758 is 15W
On 12V load:
50m in series with 12V load -5% is 1.095, 10.96A, 131.5W
50m will dissipate 6W RS 107-3481 is 10W
22 in parallel with 12V load +5% is 1.097, 10.94A, 131.3W
22 will dissipate 6.5W RS 159-916 is 10W
On 48V load:
270m in series with 48V load -5% is 5.59, 8.59A, 412W
270m will dissipate 20W RS 615-0381 is 25W
120 in parallel with 48V load +5% is 5.605, 8.56A, 411W
120 will dissipate 19.2W RS 161-004 is 50W
Use 2 x RS 264-670 heatsinks, 1 for 48V load and one for both 5V & 12V load
These are 0.3C/W in free air, use fan forced cooling on at least the 48V heatsink
TEST
At room temperature.
Plug the load jig into the completed module – use P9 for 5V/12V, P15 for 48V.
Plug the 5V supply and switch jig into J1.
Turn on 240VAC, switch on all supplies and run at nominal loads as in jig spec.
Verify 5V, 12V and 48V lines are all within 5% at connectors P6 & P12.
As a one-off design test, leave running for 1hour verify the maximum rise in surface
temperature of the PCB is < 40C
9
Draft MWA Test schedule
TEST
To be performed while load is connected.
Connect I2C test jig to P1 test jig.
Interrogate 5 x ADCs to measure current and voltages – switch load resistors and verify
correct currents are measured.
TEST
Photograph both sides of the board and mounted Cosel unit
MW to review codes for using I2C chips on PSU board
Possible get Python library for SBC to allow customisation of tests
MST-0418 MWA 540_ATIM_Transition PCB
Testing of this board will cover: resistance check, continuity between connectors and no-shorts on
connectors, function of 48V switching and correct ADC function.
JIG
Connectors to mate with J1, J2, J3, J4, P1, & P2 and a breadboard with testpoints TPn.
The following connections to be hardwired:
TP1 – P1:8
TP3 – P1:20
TP5 – P1:26
TP7 – P1:13
J1:2 – J1:5
J1:3 – J1:6
J4:5 – J4:8
J2:4 – J3:3
P1:18 – P1:14
P1:3 – P1:12
P1:30 – P1:34
P1:21 – P1:32
J1:8 – J2:2
J2:3 – J2:7
J4:2 – J3:7
J4:3 – J4:7
P1:1 – P1:5
P1:7 – P1:33
P1:25 – P1:31
TP8 – P1:28
J2:5 – J2:8
J3:2 – J3:5
J2:6 – J3:4
P1:9 – P1:29
P1:23 – P1:27
P1:11 – P1:16
J3:6 – J4:4
J3:8 – J4:6
J1:4 – J1:7
TP2 – P1:22
TP4 – P1:24
TP6 – P1:10
Need to do one more check that these columns connect non-neighbouring pins and are
continuous between TPs at the ends.
Also connect TP9 – P2:4, TP10 – P2:A1, TP11 – P2:A2, TP12 – P2:1, TP13 – P1:2
DIP switches between P1:1 – P1:6, P1:8 – P1:6, P1:33 – P1:6 P1:34 – P1:6
Needs an adaptor to allow I2C jig to be connected through this to P1.
TEST
To check for basic continuity and no-shorts under SMT connectors.
Connect JIG to P1, J1, J2, J3, J4.
Turn 4 DIP switches to OFF
“Beep” verify continuity between TP1-TP2, TP3-TP4, TP5-TP6, TP7-TP8.
Verify >1M between TP1-TP3, TP1-TP5, TP1-TP7, TP3-TP5, TP3-TP7, TP5-TP7
That checks continuity of signal traces between P1 and J1 thru 4 and no shorts between any
neighbouring signal pins.
Verify >1M between TP9 and all of TP1, TP3, TP5, TP7, TP12
Verify >1M between TP10-TP11
Unplug J1, J2, J3 & J4 from jig but leave P1.
Connect P2 to completed PSU.
10
Draft MWA Test schedule
Turn DIP switches on and verify LEDs light one at a time.
Verify 3.3V at TP13
Connect I2C jig to P1 via jig. Leave DIP switches closed.
Interrogate LTC4151s and confirm they return correct value on their “Vin” pins.
TEST
Photograph both sides of the board
MST-0420 MWA Air Conditioner Control Box
Schematic for control box to MW – PSI probably needs to generate this.
PSI can write code for AC testing once library supplied for accessing ATIM
Before this is wired to the AC unit.
TEST
Visually check and photograph wiring.
Verify earth continuity to case
Earth leakage “megger” test on mains level wiring.
MST-0424 MWA Air Conditioner Unit
Tests to be carried out after the unit cabling is modified and unit is connected to MST-0420.
Test unit in wooden crate as delivered. Unit will be sent on to MWA in that crate and integration will
be on-site.
JIG
(Already exists)
Breadboard with pushbutton control to switch AC SSR using 12V bench PSU.
TEST
Connect the JIG and a bench PSU.
Turn the evaporator fans on and verify they spin.
Turn the condenser fan on and verify it spins.
Turn the compressor on and verify it starts.
Verify that the evaporator begins to cool.
Turn off in reverse order.
See also the additional testing near the end of this document.
MST-0423 MWA Digital Rack
TEST
Photograph both sides of the boards.
Assemble the rack.
TEST
Verify no short across the power supply inputs of the assembled rack.
11
Draft MWA Test schedule
PSI has no information on which to base further testing.
MST-0425 MWA Clock Unit
TEST
Photograph both sides of the board.
Assemble the PCB into the rack unit.
TEST
Verify no shorts across power inputs.
PSI has no information on which to base further testing.
MST-0426 MWA SBC Module
Testing interleaved with assembly.
Install always-on PSU components and complete 240VAC wiring.
TEST
Megger test AC wiring and earth-to-case continuity.
Apply 240VAC and verify PSU delivers +5V and +12V.
Complete assembly by installing fan on lid, front panel connectors, 2 x MST-0431, SBC, MST-0417,
IMC. Do not connect cables between sub units.
TEST
Power down. Connect fan to PSU, turn on power, Verify fan spins.
Power down. Connect IMC to PSU, turn on power and verify IMC LEDs light up.
Power down. Connect SBC to PSU, turn on power and verify SBC LEDs light up.
Power down. Connect SBC to ATIM. Turn on power and verify ATIM LEDs light up.
Power down. Connect MST-0431s to ATIM. Connect IMC to SBC. Turn on power and re-verify
all previous LEDs light up.
Need some information here on how to test the SBC via the IMC so that we can verify it works and
then software to interrogate I2C peripherals from SBC etc.
Can check via Ethernet link port on SBC front panel. Verify IMC separately. May need 4 port hub
plugged in for MWA testing not PSI related.
[Yup.]
TEST
Close up SBC module, place in temperature chamber, connect optical-fibre to communicate
with SBC and 240VAC power.
Power up and verify function of SBC.
Monitor module internal temperature via ATIM temperature monitor and by thermocouple.
Raise temperature until internal temp reaches 60C, hold for 1 hour.
Verify SBC, IMC, ATIM and Temp Monitors boards continue to function.
Decrease temperature to -10C, hold for 1 hour and re-verify.
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Draft MWA Test schedule
MWA to decide if testing to the limits eg 85C is required.
MST-0448 MWA Internal Rack
Install tested rack units: 1 x PSU (MST-0429) and 1 x SBC Module (MST-0426).
Connect J1 on PSU to SBC module, turn on 240VAC power switches for both modules.
TEST
Issue commands to read manual power switch state and verify it functions.
Issue commands via SBC to turn on 5V, 12V and 48V rails and verify that rails turn on and off
under SBC control.
Turn on all rails, reach in to PSU and one-at-a-time:
Unplug J3, verify SBC reports general PSU alarm, re-plug J3
Unplug P4, verify SBC reports 5V alarm, re-plug P4
Unplug P7, verify SBC reports 12V alarm, re-plug P7
Unplug P10, verify SBC reports 48VA alarm, re-plug P10
Unplug P13, verify SBC reports 48VA alarm, re-plug P13
Unplug P16, verify SBC reports 48VA alarm, re-plug P16
Install tested rack units: 2 x ASC Modules (MST-0422).
Connect cables from PSU to each ASC and from SBC to each ASC.
TEST
Run software on SBC to turn on power to ASC and interrogate PIC and Temp monitor on each
ASC unit.
Install tested rack unit: 1 x Digital Crate (MST-0423+MST-0425)
TEST
Run software on SBC to turn on power to Digital crate and clock unit and interrogate them for
function. PSI has insufficient information to allow it to write this software. [MWA should be
able to provide this functionality with receiver control software.]
Mount 2 x tested MST-0418 on connector panel (not inserted into main enclosure). Connect these to
SBC module.
TEST
Run software on SBC to turn on 48V to each antenna interface, verify LEDs light accordingly.
Run software to interrogate I2C monitors on MST-0418 boards.
MST-0432 MWA Receiver Node enclosure
TEST
I’m assuming that MWA will be able to provide information so that we can put noise, or a
known chirp, or something, into each channel and verify that it comes out the back end of the
receiver node correctly. Seems to be the really important test.
Or there might be a noise floor test?
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Draft MWA Test schedule
[In principle broadband noise to illuminate the passband shape is sufficient test, the issue is
collecting and analysing the output data without using the correlator (total data rate is
3x2.7Gbs, would require special HW to decode. Some loop-back testing functionality is
available in the AGFO code, alternatively the “VSIB” interface may be available to capture
decimated output data. TBD…]
PSI not to test at this level for proto.
Loop-back test might be used for final acceptance test.
MWA would have to deliver test jig and code for this. PSI would perform the test in dumb
mode.
Additional one-off testing.
TEST
Install the modified test AC unit into PSI test enclosure
Connect PSI test jig and 12V PSU
Confirm all three motors can be switched on and off.
Put a 400W heat source (lamp) into the enclosure
Use a thermocouple to monitor the enclosure air temperature (location of thermocouple to be
determined)
Turn on the evaporator fans
Turn compressor and condenser fan off
Allow enclosure temperature to rise to 45C (may have to think about letting this go to 60C
in view of MWA request; but need to check that this is possible for AC unit, it was never
designed or selected for this)
Connect current probe to AC supply and oscilloscope
Turn on condenser fan and compressor – check compressor starts and observe startup current
– surge current not to exceed ?5? A/C cycles at ?20A? peak.
Leave running for ?? minutes – temperature of enclosure to drop below ?? C
Turn off compressor and condenser fan.
Allow enclosure temperature to rise to 20C and start a timer – measure the time it takes to
rise to 30C – not to be less than ?? minutes.
Check on breaker cut-out in AC box in case compresser stalls.
TEST
Install AC unit, rack unit containing only SBC module and module metalwork (no PCBs), AC
control box and power conditioning into insulated main enclosure. Put 500W of heat load
(lamps) (simulates additional heat load through insulation) into the enclosure. Connect SBC to
external world via optical fibre. Install software on SBC to control AC as per previously
supplied control algorithm and log AC temperatures and enclosure temperatures. Run unit for
1 day at room temp and monitor and review results.
TEST
Repeat the previous test, but this time arrange ducting to mix exhaust air from AC unit back to
the condenser inlet and adjust mix until air entering condenser is at 45C while compressor is
running. Alternatively arrange for heating of inlet air, for example using hot-air guns.
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Draft MWA Test schedule
PSI does not have facilities for testing at lowered inlet temperatures. If MWA requires testing
at lower than room temperature then this will need to be negotiated. We might need to find a
friendly cool-room owner.
Ignore this for now. Air temperature not expected to drop below 0.
15