USB
Overview
Vincent Yu
2004.03.21
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Agend
a
Describe basics of USB:
•
•
•
•
•
•
Design Goals of USB
Hardware Architecture
Bus Topology
Client Model and Transaction Formats
Transfer Types
Physical Layer
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Design Goals of
USB
• Address the shortcomings of original PC
I/O
– Limited system resources
• Interrupts(IRQ)
• I/O address
• Non-shareable interface
– End User concerns
• Cable crazed
• Installation and configuration of expansion cards
• No hot attachment of peripherals
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USB 2.0 Promoter
Group
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Just Compaq, Intel, Microsoft, NEC for USB 1.1
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USB 2.0 and
FireWire
• Which will win in the future
– Different topology、speed、cost
issues
– So different market focus
– FireWire
• 100Mb/s~400Mb/s  800Mb/s~3.2Gb/s
• Expensive, for AV application
• VIA support
– USB
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• 12Mb/s  480Mb/s
• For PC peripherals
• Intel support
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Hardware
Architecture
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Hardware
Architecture

Topology
–
Tiered Star (Distributes Connectivity
Points)
–
–
127 devices (including a root hub)
7 tiers (up to 5 meters per segment; 5m
with shielding for full-speed and 3m no
shielding for low-speed)
Host
Controller
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Hub 1
Hub 2
Hub 3
Cable Delay + Hub Delay = 30ns + 36 bits
(each)
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Hub 4
Hub 5
Function
Propagation Delay =26nS
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Hardware
Architecture
• High speed：480Mb/s
• Full speed：12Mb/s
• Low speed：1.5Mb/s
Client Driver
Client Driver
System SW
USB 2.0 Host
Controller
High Speed Only
USB 1.1 Hub
HS Hub
USB 1.1
Device
USB 1.1 Hub
HS Device
Full/Low Speed
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USB 1.1
Device
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Hardware
Architecture
different application
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Hardware
Architecture
• Configuration
– Dynamic attach/detach
– Auto-configuration as port change
• Physical Layer
– 2-wire differential signaling
– NRZI coded with bit stuffing
– Supply Sourcing +5V
– Signaling at CMOS 3.3V
– 4 pin connector, 4 wire cable
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Bus Topology
• Host
– One PC host per system
– USB On-The-Go (USB OTG)
Host
5m
5m
5m
5m
• Hub
Hub
– Provides connecting ports,
power, terminations
– Self-Powered or Bus
Powered
5m
• Device, Interfaces and
Endpoints
Device
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– Device is a collection of
interface(s)
– Interface is a collection of11
endpoints
USB On-The-Go Connection
Example
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Low-Speed
Mode
• Allows very low-cost devices to be built
without compromising data rate for faster
devices
– Mice, keyboards, most user interface
peripherals don’t need fast data rate
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• Eliminates need for shielded twisted pair
cable
• Allows use of less-expensive IC process
technology
• Reduced functionality
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Agenda
Describe basics of USB:
• Design Goals of USB
• Hardware Architecture
• Bus Topology
• Client Model and Transaction Formats
• Transfer Types
• Physical Layer
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Basic USB
Model
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Device
Abstractions
• End Point
– Ultimate data source or sink at the device
end
– Unique address, unidirectional, transfer
characteristics
• Pipe
– Association of endpoint with host SW owner
• Interface
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– Collection of pipes
– Map to a capability
– Owned by exactly
1 software client
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Detailed Host/Device
View
Host
Device
Function
Client SW
Interface x
manages an interface
Endpoint 0
- Required, shared
- Configuration access
- Capability control
Pipe Bundle
to an interface
No USB
Format
Buffers
Interface
Specific
a collection
of Interfaces
No USB
Format
USB Device
USB System
Endpoint
Zero
manages devices
a collection
of endpoints
Default Pipe
to Endpoint Zero
Unspecified
Data
Host
Controller
Data Per
Endpoint
USB Bus
Interface
USB
Framed
Data
USB Bus
Interface
USB Framed
Data
Transactions
SIE
SIE
USB Wire
Pipe, represents connection
abstraction between two horizontal layers
Data transport mechanism
SIE：Serial Interface Engine
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USB-relevant format of transported data
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Focus on Client 
Function
Host
Interconnect
Device
Client SW
Function
USB Sys SW
USB Logical
Device
USB Bus
Interface
USB Bus
Interface
Actual communications flow
Logical communications flow
Implementation Focus Area
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Client Software 
Function
Host
Client
Software
Buffers
Data Flows
Pipes
Endpoints
USB Device
Interface
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Communications
Layers
• Packet Formats
• Transactions – collection of packets
– 3 phases (token, data, handshake)
– Token phase has token packet sent by
host
• Always present
• Packet ID (PID) identifies transaction type
• Transfers – collection of transactions
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Communications Layers
Packet Formats
Transaction 8 bits
PID
7 bits
ADDR
8 bits
4 bits
5 bits
ENDP
CRC5
Token (IN/OUT) phase
0-1023 bytes
16 bits
DATA
CRC16
PID
Data (Toggle) phase
8 bits
PID
8 bits
PID
Handshake phase
11 bits
Frame Number
5 bits
Start of Frame
CRC5
All packets are prefaced with SYNC field and terminated with End of Packet(EOP)
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Communications Layers
Packet Formats – PID (Packet ID)
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Communications Layers
Packet Formats
Full / Low Speed Frame Size (1ms)
1ms
1ms
Classic USB Frame Ticks
Full Speed Isochronous Data Payload
High Speed Micro-Frames (125us)
USB 2.0 Micro-Frame Ticks
(1/8th Classic Frame)

125us HS Micro-frame
–
Less buffering required for HS devices than for 1ms frame
–
SOF on HS occurs 8x more frequently
–
Devices can derive micro-frame number if required
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High Speed Isochronous Data Payload
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Communications
Layers
Transaction Protocol
• Host based token polling
– Data from host-to-function or function-to-host
– Host handles most of the protocol complexity
– Peripheral design is simple and low-cost
Token
Data Transfer
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Handshake
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• Robustness
–
–
–
–
Communications
Layers
Transaction Protocol
Handshake to acknowledge data transfer and
flow control
Very low raw physical bit error rate
CRC (Cyclic Redundancy Check) protection plus
hardware retry option
Data Toggle Sequence bits, PID check bits
• Bounded transfer characteristics
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– Data transfer bandwidth and latency prenegotiated
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– Flow control for peripheral
buffer
management
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Agen
da
Describe basics of USB:
• Design Goals of USB
• Hardware Architecture
• Bus Topology
• Client Model and Transaction Formats
• Transfer Types
• Physical Layer
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•
USB Transfer
Isochronous (e.g.: Types
Audio, Telephony.....)
– Periodic, bounded latencies and bandwidth
• Interrupt (e.g.: Mouse, Joystick....)
– Asynchronous, small bursty, non-periodic,
low bandwidth, response time sensitive
• Bulk (e.g.: printer, scanner, still camera.....)
– Asynchronous, non-periodic, bursty, high
bandwidth utilization
• Control (e.g.: Configuration, Messages)
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– Bi-directional, higher level protocol
– Used for bus management, configuration,
device control 27
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USB Transfer
Types
• Transactions
Isochronous
Type
– Token, Data (NO
Handshake)
– Timeouts may be used
• Guaranteed access to
bus
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– Late data discarded, no
retry
– Endpoint buffering
tolerates 2 ms of jitter
– No more than 90% BW
(bandwidth) for full 28
speed
USB Transfer
Types
• Transactions
Interrupt Type
– All 3 phases
– Guaranteed max. service period for the pipe
– IN direction only (host require data from device)
• Supports retries
– NULL data is treated as data
– Toggles reset by configuration / reset event
• Guaranteed Access to bus
– No more than 90% BW for full/low speed
– At most 80% BW for high speed
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USB Transfer
Types
Interrupt Type
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USB Transfer
Types
• Transactions
Bulk Type
– All 3 phases
– In either directions
– Only full/high speed used
• Supports Retries
– Toggles reset by configuration / reset
event
• No guaranteed access
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– Scheduled as bandwidth available
– High bandwidth on idle bus
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– Starved on
busy bus
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USB Transfer
Types
Bulk Type
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USB Transfer
Types
• Transactions Control Type
– Contains 3 stages: Setup, Data, Status
– Each stage has 0 or more transactions
– Setup required and device must accept
– Bi-directional, data phase looks like Bulk
• Retries supported
• Minimal access guaranteed
– Less than10% BW for low/full speed
– Less than 20% BW for high speed
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USB Transfer
Types
Control Type
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USB Transfer Data
Low speed transaction on full
speed branch
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USB Transfer Data
Control Type Example -Configuration
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Transfers to
Transactions
Interface
Interface
Pipe
Pipe
Interface
Pipe
Pipe
Pipe
Pipe
Device
Driver
User
Params
Device
Driver
Device
Driver
Client SW
Device
Description
Service
Description
Transfer
Manager
Transaction
List
Requirements,
Limitations
USB System SW
and
Host Controller
Transaction
Schedule
Executor
Token
Token
Token
Universal Serial Bus
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Transfers to
Frames
Pipe
Pipe
IRP：I/O Request Packet
Transfer 2 ( IRP 2 )
Transfer 1 ( IRP 1 )
Transaction
1-0
Transaction
1-1
Frame i
Token Data,
Handshake
(1-0)
Transaction
2-0
Transaction
2-1
Transaction
2-2
Frame i+1
Token, Data,
Handshake
(2-0)
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Transaction
1-2
Token, Data,
Handshake
(2-1)
Token, Data,
Handshake
(1-1)
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Endpoint
s
One endpoint for each pipe
•
• Endpoint zero
– Required of every device
– Used by USB for configuration, general bus
management
– for control type pipe used, or default pipe
used
• Other endpoints
– Optional, up to 15 IN, 15 OUT at full speed
– Optional, up to 2 additional at low speed
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• 1 Control or 2 Interrupt
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– Determined by
39 implementation requirements
Pipes
• Connect host memory buffer to endpoint
FIFO
• Stream Type
– No USB imposed data format
– Unidirectional
• Message Type
– USB imposed data format
– Bi-directional
• Supports a given transfer type
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Interface
s
• Mode of 0 or more pipes
• Has a client owner
– Accesses individual pipes
– Shares default pipe
• More dynamically configured than devices
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Agend
a
Describe basics of USB:
• Design Goals of USB
• Hardware Architecture
• Bus Topology
• Client Model and Transaction
Formats
• Transfer Types
• Physical Layer
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USB
Hub
Downstream
Connectivity
Hub
Repeater
Enabled
Ports
Upstream
Connectivity
– Port Enable/ Disable
– Reset/ Resume
Signaling
Hub
Repeater
• Data Switch
– Signal Regeneration
– Robustness / Recovery
Disabled
Port
• Power Distribution
– Bus-power(500mA)
– Self-power(100mA)
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• Port Control
• Connection detect
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Hub
Architecture
Port 0
Upstream Port
HS/Classic
Hub Repeater
TT：Transaction Translator
HS/Classic
Hub
State Machine
Hub
Controller
TT
Downstream Port
State Machine(s)
...
Port 1
Port 2
Downstream Ports
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Port N
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HS Hub
HighArchitecture
Speed Only
Port
Full/Low
Speed
HS/Classic
Hub
Repeater
Transaction
Translator
HS/Classic
Hub State
Machine
HS/Classic
Hub
Controller
Routing Logic
Port


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.....
Port
Same as classic hub:
–
high/full/low-speed repeater
–
Hub controller
–
No different then classic USB besides high-speed signaling
Minor changes from classic hub:
–

Port
Hub state machine (HS detect, HS termination transitions, test mode)
New in hub:
–
Transaction Translator, Routing logic
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Hub
Architecture
• Repeater
– High speed signaling
• Also, classic signaling for 1.1 compatibility
– Reclocking
• State Machine
– HS termination sequencing
• HS Detect, Reset, Suspend, Resume
• Hub Controller
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– Respond to hub device class
requests/events
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• Connectors
Connectors and
Cables
– 4-Position with shielded housing
– Positive Retention
– Blind Mating Capabilities
Power pair
Differential Signal pair
• Cables
– 28 AWG twisted pair for signaling
– 20-28 AWG pair for power
– Shielding for fully rated segments
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Standard
Connectors
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Mini Connectors for USB
OTG
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• J-state
Signaling
States
– Idle State
– Differentiates full or low speed
• K-state (Inverse of J-state)
– Start of Packet identifier (SOP)
– Signaling auto resume from power
suspend
• Single ended zero (SE0) state
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– End of Packet identifier (EOP)
– Signaling reset
– Disconnected
line
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USB LS/FS
Transceiver
• Differential Driver
– Slew rate controlled
– SE0 drive capability
Differential
Driver
D+
Xmt Data
Force SE0
OE
D-
• Differential Receiver
– Sensitivity <200mV
Differential
Receiver
+
Rcv Data
-
• Single-Ended
Receivers
SE0
Detect
Single-Ended
Receivers
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USB LS/FS
Transceiver
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Rpu_Enable
USB HS
Transceiver
+3.3V
HS_Current_Source_Enable
HS_Drive_Enable
HS_Data_Driver_Input
Note: The Rpu pull-up
resistor, and the circuitry
required to enable and
disable it, are only
required in upstream
facing transceivers
High Speed Current Driver
Legacy Driver
LS/FS_Data_Driver_Input
Assert_Single_Ended_Zero
Rs
Rpu
Data Input
Assert SE0
FS_Edge_Mode_Sel
LS/FS_Driver_Output_Enable
Rs
Data+
HS_Differential_Receiver_Output
HS Differential Data Receiver
Data-
Differential_Receiver_Enabled
Transmission Envelope Detector
Legacy_Differential_Receiver_Output
Legacy Differential Data Receiver
HS_Disconnect_Detected
Disconnection Envelope Detector
Note: The Rpd resistors to
ground are only required
in downstream facing
transceivers
SE_Data+_Receiver_Output
SE_Data-_Receiver_Output
Single Ended Receivers
Rpd
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Rpd
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USB Connections and
Terminations
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• Suspend
Suspend &
Resume
– All devices support suspend
– Enter suspend state after seeing idle
bus for 3 ms
– Suspend current 500 A for low power
port, 2.5mA for high power port
• Resume
– Devices resume on seeing non-J state
– USB devices can cause remote wakeup by signaling with a K-state
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Enumeratio
n
• Hubs detect attachments
– Report via status change endpoint
• Host RESETs port
– If new device is a hub, disables new
hub’s ports
• Host read configuration information
and configures device
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Summary
USB uses a host-directed protocol which:
• Supports dynamic attachment of large
number and variety of devices
• Provides power distribution and power
management facilities
• Reference
–
–
–
–
–
–
–
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http://www.usb.org/
http://www.catc.com/
http://www.allusb.com/
http://www.eedesign.com.tw/a09_usb20.asp
http://www.eedesign.com.tw/Forum/Forum_contain.asp?id=437
http://www.eedesign.com.tw/Forum/Forum_contain.asp?id=386
http://www.eedesign.com.tw/eenew/contentshowd.asp?fid=767&m
57
csn=3&scsn=9&did=723
– “Universal57Serial Bus System Architecture”, Second Edition,