Status of GbE Peripheral Crate Controller
Section 1: Hardware
Section 2: Firmware Development
US
Ben Bylsma
EMU meeting Fermilab, October 21, 2005
Hardware Status
10 Pre-Production Boards
 5 at CERN (2 returning)
 1 at Rice
 3 at OSU
Pre-Production Version
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1 in DMB/DDU/DCC test setup
1 for Firmware Development
1 Problem Board (unsolved)
 1 at UCD Radiation Test
“Real World” Experience
 OSU
 Rice
 B904
No Issues Reported
75 Production Boards in
Hand
Scheduled to be Stuffed
B. Bylsma
EMU Meeting, Fermilab
Oct. 21, 2005
2
Radiation Testing
63.3 MeV Proton Beam at Crocker Nuclear
Laboratory (UCD)
 Irradiated all active components not previously tested.
 Main goal was TID for survivability (not SEUs).
 Exposed components to ~6 kRads. (exp. Max. ~.13 kRads)
Results:
 Boring. Mostly uneventful.
 Most failures recovered with reset (some need power cycle).
 All components survived.
SEU mitigation:
 Reset circuit uses discrete logic and majority voting.
 Data stored in FIFOs and FLASH uses ECC and majority voting.
B. Bylsma
EMU Meeting, Fermilab
Oct. 21, 2005
3
Production Status
75 PCBs produced
Stuffing:
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All components and PCBs at Dynalab for one month.
Dynalab given OK to go, but are overloaded with jobs.
Stencil is due Monday.
Surface mounting run to start next week.
Expect delivery of stuffed boards within two weeks.
Testing and Delivery:
 ASAP after delivery of stuffed boards.
Production Schedule
Jan Feb M ar Apr M ay
DMB
350 450 550
TMB-RAT
10*
CCB
10 20 40
MPC
10
LVRB
10 20 40
Backplane
4*
Controller
10 20 40
B. Bylsma
EMU Meeting, Fermilab
Oct. 21, 2005
2005
Jun Jul Aug Sep Oct Nov Dec
60
20
60
60
30
70
40
70
10
70
150 270 390 510
60
70
20
40
60
540
70
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Firmware: What’s New
Firmware Revision 3.06
 Programmable MAC address.
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B. Bylsma
Device MAC address.
3 Group MAC addresses.
Default Server MAC address.
Access to configuration registers.
Storage for up to 21 different configurations in FLASH memory.
Settable default configuration (for power up).
New format of returned packet data headers.
EMU Meeting, Fermilab
Oct. 21, 2005
5
New Data Header Format
Returned Packet Data Header:
 Prior to Rev. 3:
 As of Rev. 3
B. Bylsma
EMU Meeting, Fermilab
Oct. 21, 2005
6
Firmware: What’s Next
Need for Feedback
 One at a time reads (built in feedback/data is expected)
 One at a time writes (when does command finish?)
 Stacked reads/writes in FIFO (when is FIFO almost full?)
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Particularly a problem for programming PROMS with several MB of
write commands.
Developing two methods for feedback.
1) Warning packets (Error and Info packets as well):
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Spontaneously generated packets when certain events occur (like
when the “almost full” flag of the external FIFO is set).
Spontaneous packet sending can be enabled or disabled.
2) Acknowledgement Requests.
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B. Bylsma
Bit in header of every packet sent.
Return packet with disposition of corresponding command.
Under programmers control on packet by packet basis.
EMU Meeting, Fermilab
Oct. 21, 2005
7
Firmware: What’s Next
Need for Easy Firmware Updates
 Currently must use IMPACT to program PROM through JTAG.
 Need to program PROM via Ethernet packets to JTAG interface.
 Handshaking scheme needs to be in place.
Next Revision Release
 Handshake mechanism (acknowledgements and warnings)
 PROM programming
B. Bylsma
EMU Meeting, Fermilab
Oct. 21, 2005
8
Documentation and Updates
Web site for Documentation and Firmware Updates
 http://www.physics.ohio-state.edu/~cms/GbE_Ctrl/
B. Bylsma
EMU Meeting, Fermilab
Oct. 21, 2005
9