Eng. Muhammad Humran Khan

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Majmaah University
College of Engineering
Department of
Course Syllabus
Instructor Name
Course Title:
Prerequisite:
Academic Year:
Lecture Times:
Office Hours
Eng. Muhammad Humran Khan
Logic design Laboratory
---------
Co-requisite:
2013/2014
Semester:
-------------Sunday 09:00-10:00
EE
207,CEN
206
-------Tutorial Time:
Second
Lab Time:
Course code:
EE 208
Sunday 01:00-02:00
Tue 10:00-11:00
Cr.Hrs:
1
10:00-11:50
08:00-09:50
1D 028
Office number
Course Objectives
This laboratory aims to achieve the following objectives
1 To learn the fundamental concepts of a digital logic design.
2 Understanding fundamentals and basic theory of the Logic gates and Boolean algebra through simple laboratory exercises
3 Understanding flip flops, Mastering clocked synchronous sequential circuits, recognize the various ICs (Chips) and their
functions
Student Learning Outcomes
Course Learning Outcomes
By the end of this course the students will be able to
1 Experiments on logic gates (OR, AND, NOR, NAND, XOR, XNOR & Inverters) and Boolean Algebra(
Basic theorems & postulates of Boolean Algebra & Boolean function etc)
2 Experiments on analysis and design of combinational logic circuits (Multiplexers, Magnitude Comparator,
Decoders, Encoder, Adders & Subtractors and code converters).
3 Experiments on Latches & Flip Flops
4 Experiments on analysis and design of clocked synchronous sequential circuit (Registers, Shift Registers,
Synchronous & Asynchronous Counters)
ABET Student
Outcomes
a ,b ,c
a ,c ,e
b ,c ,k
e ,k
Assessment
Methods of Assessment
1
2
3
4
5
6
N
1
2
3
4
5
6
First exam
Second exam
Exercise questions and participation
Quiz and homework assignments
Report, Project or Assignment
Final Exam
Total
Assessed Learning Outcomes
1,2
1,2,3,4,5
-------1,2,3,5
1,2,3,5
1,2,3,4,5
Maximum Score
Course Contents
Short Description
Introduction to Lab
Experiments on logic gates (OR, AND, NOR, NAND, XOR, XNOR & Inverters) and Boolean Algebra( Basic
theorems & postulates of Boolean Algebra & Boolean function etc)
Experiments on analysis and design of combinational logic circuits (Multiplexers,
Magnitude Comparator, Decoders, Encoder, Adders & Subtractors and code converters).
Experiments on Latches & Flip Flops
Experiments on analysis and design of clocked synchronous sequential circuit (Registers, Shift Registers,
Synchronous & Asynchronous Counters)
20
20
-----10
10
40
100
Week
1
3
2
2
1
2
Books
Textbook:
Lab Manual provided in the Lab
References:
Morris M. Mano and Michael D. Ciletti, "Digital Design", Prentice Hall, 4th edition
John Passafiume and Michael Douglas, "Digital Logic Design: Tutorial and Laboratory Exercises", Wiley,
2008.
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