Computer Systems Organization: Lecture 2
Ankur Srivastava
University of Maryland, College Park
Adapted from Computer Organization and Design, Patterson & Hennessy, © 2005.”
Acknowledgement: Based on Slides By Mary Jane Irwin PSU
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ENEE350
Spring07
Basic Datapath Organization
Registers
ALU
Memory
Registers are a bank of flip flops. Are expensive to
have in large numbers, therefore need to be
augmented by memory (DRAMS, SRAMS, DISKS)
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ENEE350
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The MIPS Register File
$zero: stores 0
$v0 $v1: values of expression evaluation
$a0-$a3: needed for procedure parameters
$t0-$t9: temporary registers
$s0-s7: saved registers
$gp: global pointer
$sp: stack pointer
$fp: frame pointer
$ra: procedure return address
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$at, $k0-$k1: reserved for assembler and OS
ENEE350
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The MIPS Register File
Name Register number
$zero
0
$v0-$v1
2-3
$a0-$a3
4-7
$t0-$t7
8-15
$s0-$s7
16-23
$t8-$t9
24-25
$gp
28
$sp
29
$fp
30
$ra
31
Usage
the constant value 0
values for results and expression evaluation
arguments
temporaries
saved
more temporaries
global pointer
stack pointer
frame pointer
return address
$at, $k0-$k1: reserved for assembler and OS
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The MIPS Memory Organization
Viewed as a large, single-dimension array, with an
address.
A memory address is an index into the array
"Byte addressing" means that the index points to a
byte of memory.
0
1
2
3
4
5
6
5
8 bits of data
8 bits of data
8 bits of data
8 bits of data
8 bits of data
8 bits of data
8 bits of data
...
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The MIPS Memory Organization
But most meaningful data is around 32 bits long
(length of a MIPS word)
0
4
8
12
32 bits of data
32 bits of data
32 bits of data
32 bits of data
232 bytes with byte addresses from 0 to 232-1
230 words with byte addresses 0, 4, 8, ...
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MIPS Arithmetic Instruction
Add $t0, $s1, $s2
Sub $t0, $s1, $s2
destination  source1 op
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C Instruction: f = g+h – (i + j)
Assuming s1, s2, s3,s4 contain g,h,i,j
Add $t0 $s1 $s2
Add $t1 $s3 $s4
Sub $s0 $t0 $t1
source2
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MIPS Arithmetic Instruction
What if we want to process data in memory and not
in registers
Example: g = h + A[8]
Now A is an array whose base address in say
register s3
We want to access 8th WORD in A;
Lw $t0 32($s3) # Load the word at byte location 32
after the address in register s3 into
register t0. 32=8*4 (8th word in A)
Add $t1 $s1 $t0 # Assuming s1 has h
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MIPS Arithmetic Instruction
What if we want to process data in memory and not
in registers
Example: A[12] = h + A[8]
Now A is an array whose base address in say
register s3
We want to access 8th WORD in A;
Lw $t0 32($s3)
Add $t1 $s1 $t0
Sw $t1 48(s3) #stores the word in t1
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There is another instruction called MOVE
Move $reg1 $reg2 #copy data from reg2 to reg1
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Constants
Y=x+4
One approach is to store constants in memory and
load them using lw instruction
Another Approach
Addi $t0 $s1 4 # assuming x is in register s1.
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Logical Operations
MIPS allows several logical operations on the data
stored in registers
Shift Left
Sll $t2 $s0 4 # shift the data in register s0 left by 4
bits and store result in t2
Shift Right
Similar ……………….
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Logical Operations
AND operation
And $t0 $t1 $t2 #performs a bit by bit and
OR operation: similar
NOR operation: similar
AND Immediate
Andi $s1 $s2 100
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OR Immediate: Similar
ENEE350
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Representing Instructions in Machine Code
• Artihmetic and Logical
–
–
–
–
–
–
–
–
–
–
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Add
Sub
Add Immediate
And
Or
Nor
And Immediate
Or Immediate
Shift Logical Left
Shift Logical Right
• Data Transfer
– Load Word
– Store Word
ENEE350
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Representing Instructions in Machine Code
• All these instructions are represented in 32 bits
• Two Formats
• R Type (register type)
op
6bits
rs
rt
5 bits 5bits
rd
5bits
shamt funct
5bits 6bits
• I Type (immediate type)
Op
6 bits
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rs
5 bits
rt
constant or address
5 bits
16 bits
ENEE350
Spring07
Representing Instructions in Machine Code
• All these instructions are represented in 32 bits
op
6bits
rs
rt
5 bits 5bits
rd
5bits
shamt funct
5bits 6bits
Op: Basic Operation
Rs: first source register id
Rt: second source register id
Rd: destination register id
Shamt: shift amount
funct: selects the specific variant of the instruction
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Representing Instructions in Machine Code
• I Type (immediate type)
Op
6 bits
rs
5 bits
rt
constant or address
5 bits
16 bits
Op, rs and rt are same as before
16 bits are devoted for immediate data or address
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Representing Instructions in Machine Code
0
18
19
17
0
32
• Add $s1 $s2 $s3: note there is a number corresponding to
each of the 32 registers
0
18
19
17
0
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• Sub $s1 $s2 $s3
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Representing Instructions in Machine Code
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18
17
100
17
100
Lw $s1 100($s2)
8
18
Addi $s1 $s2 100
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Stored Program Concept
• Programs are compiled into a sequence of instructions and
stored in memory
• Instructions are fetched, decoded and executed
• Sometimes we need branches too (if statements etc.)
• Branches change the execution course of the program.
• Each instruction has an address, branches can change the
next executed instruction (which may not be the next
instruction in execution sequence)
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MIPS Instructions for Decision
In C, decisions are supported using if statements etc. MIPS
has corresponding decision making instructions as well
Beq register1 reister2, L1 #If data in register 1 and register 2
are the same then goto instruciton
L1
Bne register1 register2 L1 #If data in registers is not the same
……
J L1
#Unconditional Jump to L1
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MIPS Instructions for Decision
Example: if (I == J)
f = g +h
else f = g-h
Lets assume that s3=I, s4=J, s1=g and s2=h
Bne $s3 $s4 ELSE
Add $s0 $s1 $s2
j EXIT
ELSE: sub $s0 $s1 $s2
EXIT:
EXIT, ELSE etc. are labels of instructions, the assembler will
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put the appropriate instruction address there
Spring07
MIPS Instructions for Decision
if a < b then
x=1
else
x=0
slt $t0, $s1, $s2
# if s1 is less than s2 then t0 = 1 else t0 =0
It can be seen that the above if statement can be easily
implemented using slt
slti $t0, $s1 CONSTANT
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J Type: Another Instruction Format
Remember the instruction jump; there is a J Type instruction
format also
J L1
op
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26 bit address
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So Far…
MIPS operands
Name
32 registers
Example
Comments
$s0-$s7, $t0-$t9, $zero, Fast locations for data. In MIPS, data must be in registers to perform
$a0-$a3, $v0-$v1, $gp,
arithmetic. MIPS register $zero always equals 0. Register $at is
$fp, $sp, $ra, $at
reserved for the assembler to handle large constants.
Memory[0],
2
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Accessed only by data transfer instructions. MIPS uses byte addresses, so
memory Memory[4], ...,
words
and spilled registers, such as those saved on procedure calls.
add
MIPS assembly language
Example
Meaning
add $s1, $s2, $s3
$s1 = $s2 + $s3
Three operands; data in registers
subtract
sub $s1, $s2, $s3
$s1 = $s2 - $s3
Three operands; data in registers
$s1 = $s2 + 100
$s1 = Memory[$s2 + 100]
Memory[$s2 + 100] = $s1
$s1 = Memory[$s2 + 100]
Memory[$s2 + 100] = $s1
Used to add constants
Category
Arithmetic
sequential words differ by 4. Memory holds data structures, such as arrays,
Memory[4294967292]
Instruction
addi $s1, $s2, 100
lw $s1, 100($s2)
sw $s1, 100($s2)
store word
lb $s1, 100($s2)
load byte
sb $s1, 100($s2)
store byte
load upper immediate lui $s1, 100
add immediate
load word
Data transfer
Conditional
branch
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Unconditional jump
$s1 = 100 * 2
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Comments
Word from memory to register
Word from register to memory
Byte from memory to register
Byte from register to memory
Loads constant in upper 16 bits
branch on equal
beq
$s1, $s2, 25
if ($s1 == $s2) go to
PC + 4 + 100
Equal test; PC-relative branch
branch on not equal
bne
$s1, $s2, 25
if ($s1 != $s2) go to
PC + 4 + 100
Not equal test; PC-relative
set on less than
slt
$s1, $s2, $s3
if ($s2 < $s3) $s1 = 1;
else $s1 = 0
Compare less than; for beq, bne
set less than
immediate
slti
jump
j
jr
jal
jump register
jump and link
$s1, $s2, 100 if ($s2 < 100) $s1 = 1;
Compare less than constant
else $s1 = 0
2500
$ra
2500
Jump to target address
go to 10000
For switch, procedure return
go to $ra
$ra = PC + 4; go to 10000 For procedure call
ENEE350
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Different Instruction Formats
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R
op
rs
rt
rd
I
op
rs
rt
16 bit address
J
op
shamt
funct
26 bit address
ENEE350
Spring07
MIPS Instructions for 32 bit Immediate
Many times we need more bits representing the constants in immediate
instructions and addresses in branch instructions. That is where we
need the following instructions
If we want a register to have the constant
0000 0000 0011 1101 0000 1001 0000 0000
Lui $s0 0000 0000 0011 1101
This is load upper immediate. It loads the most significant 16 bits of s0 as
the 16 bit constant, the rest of the bist are 0
Ori $s0 $s0 0000 1001 0000 0000
This will enable s0 to have the desired data
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MIPS Instructions for 32 bit Immediates
Instructions like J L1 (jump L1) have 26 bits for the new address
information.
Instructions like bne have only 16 bits for the new instruction
In order to increase the range of the jump or branch, the address of the
new instruction to jump to is typically calculated using the following
formula
Address = PC + Branch Address (provided in the instruction)
PC is the register that contains the address of the current instruction being
executed
This is called as PC relative addressing
Other addressing modes have also been devised
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Byte Level Operations
Load Half
Lh $s1 100($s2) # s1 = Memory[s2+100th byte], loads 2
bytes from this location and places them at
rightmost 2 bytes of s1
Write Half
Wh $s1 100($s2)
Load Byte
Lb….
Store Byte
Sb……
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Supporting Procedures
Just Like C, procedure handling has the following steps
•
•
•
•
•
•
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Place parameters where the procedure can access them
Transfer control to the procedure
Acquire storage resources needed for the procedure
Perform the desired task
Place the result where calling procedure can read it
Return the point of control back to the calling procedure
ENEE350
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Supporting Procedures
Registers $a0-$a3 : Four argument registers into which the
parameters are transferred
$v0-$v1: Two registers in which the procedure puts the data
$ra: return address register, remembers the instruction that we
need to return to after the procedure
Jump and Link Instruction
Jal Procedure Address
This instruction jumps to the address of the procedure and
also saves the instruction address to be executed next in
register $ra.
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Supporting Procedures
Jump Register Instruction
Jr $Ra
This instruction jumps to the address of the instruction in
register ra. This is needed for giving the control back to the
calling procedure after the called procedure has executed.
Thus the calling procedure puts the parameters in $a0-$a3 and
executes JAL to goto the procedure. Then jr is used to
bring the control back
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Supporting Procedures
Several times the procedure needs more registers
In which case the procedure is allowed to use other registers
but needs to restore them to original values
It takes the registers it needs and stores their original content
in memory using a stack data structure
A special register called $SP is used to store the current head
of the stack.
Question: What is a stack?
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Supporting Procedures
By convention the stack grows from a higher address to a
lower address.
By convention on the $s0-s7 registers are saved and not $t0t9
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Supporting Procedures
Overall
–
–
–
–
–
–
–
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Communicate the parameters to a0-a3
JAL to procedure (this will move the reutrn address to ra)
Backup any registers that need backing up
Execute the Procedure
Restore the registers from memory
Move the result to v0-v1 registers
Return the control back using Jr instruction
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Supporting Procedures
Example
int example(int g, int h, int i, int j)
{
int f;
f = (g+h)-(i+j);
return f;
}
The calling procedure will put the values of g,h,i,j in $a0,$a1…$a3.
Now we need to store the value of f in say $s0
But what about the data in s0 already, that needs to be backed up
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Supporting Procedures
Example
int example(int g, int h, int i, int j)
{
int f;
f = (g+h)-(i+j);
return f;
}
Addi $sp $sp -4 #Make space for one word on the stack
Sw $s0 0($sp) # store the current data in s0
Add $t0 $a0 $a1
Add $t1 $a2 $a3
Sub $s0 $t0 $t1
Add $v0 $s0 $zero # put the result in register v0
Lw $s0 0($sp) # restore s0
Addi $sp $sp 4 #Free up the stack
Jr $ra # control back to the calling procedure
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Nested Procedures
Int fact (int n)
{ if (n < 1) return 1
else return (n* fact(n-1)); }
FACT: Addi $sp $sp -8
Sw $ra 4($sp)
Sw $a0 0($sp)
Slti $t0 $a0 1
Beq $t0 $zero L1
Addi $v0 $zero 1
Addi $sp $sp 8
Jr $ra
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L1: Addi $a0 $a0 -1
Jal FACT
#After this instruction completes
the result of FACT(N-1) is in
register v0
Lw $a0 0($sp) #restore input n
Lw $ra 4($sp) #restore return
address
Addi $sp $sp 8
Mul $v0 $a0 $v0
Jr $ra
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Nested Procedures
FACT: Addi $sp $sp -8
Sw $ra 4($sp)
Sw $a0 0($sp)
Slti $t0 $a0 1
Beq $t0 $zero L1
Addi $v0 $zero 1
Addi $sp $sp 8
Jr $ra
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L1: Addi $a0 $a0 -1
Jal FACT
#After this instruction completes
the result of FACT(N-1) is in
register v0
Lw $a0 0($sp) #restore input n
Lw $ra 4($sp) #restore return
address
Addi $sp $sp 8
Mul $v0 $a0 $v0
Jr $ra
ENEE350
Spring07