Matakuliah
Tahun
Versi
: H0042/Teori Rangkaian Listrik
: 2005
: <<versi/01
Pertemuan 9
Sinusoidal Steady-State
Analysis
1
Learning Outcomes
Pada akhir pertemuan ini, diharapkan mahasiswa
akan mampu :
• Menghubungkan komponen RLC dengan
konsep phasor.
2
Outline Materi
• Materi 1 : karakterisasi rangkaian RLC
• Materi 2 : teknik analisa rangkaian dengan
menggunakan konsep phasor.
3
Chapter 10 Sinusoidal Steady-State
Analysis
Fig. 10.1 The sinusoidal function v(t) = Vm sin wt is ...
Fig. 10.2 The sine wave Vm sin (wt + q) leads …
Fig. 10.3 A graphical representation of two sinusoids v1 and v2.
Fig. 10.8 (and 10.9) Real and imaginary forcing functions.
Fig. 10.10 The complex forcing function Vm e j(wt + q) produces ...
Fig. 10.12 (10.13 & 10.14) Resistors, inductors, and capacitors …
Fig. 10.19 Circuit from Example 10.6.
Fig. 10.21 Circuit from Example 10.7.
Fig. 10.37 Phasor diagrams.
Engineering Circuit Analysis Sixth Edition
W.H. Hayt, Jr., J.E. Kemmerly, S.M. Durbin
Copyright © 2002 McGraw-Hill, Inc. All Rights Reserved.
4
The sinusoidal function v(t) = Vm sin wt is plotted (a) versus
wt and (b) versus t.
W.H. Hayt, Jr., J.E. Kemmerly, S.M. Durbin, Engineering Circuit Analysis, Sixth Edition.
Copyright ©2002 McGraw-Hill. All rights reserved.
5
The sine wave
Vm sin (wt + q) leads Vm sin wt by q rad.
W.H. Hayt, Jr., J.E. Kemmerly, S.M. Durbin, Engineering Circuit Analysis, Sixth Edition.
Copyright ©2002 McGraw-Hill. All rights reserved.
6
A graphical representation of
the two sinusoids v1 and v2.
The magnitude of each sine
function is represented by the
length of the corresponding
arrow, and the phase angle by
the orientation with respect to
the positive x axis. In this
diagram, v1 leads v2 by 100o +
30o = 130o, although it could
also be argued that v2 leads v1
by 230o.
It is customary, however, to
express the phase difference
by an angle less than or equal
to 180o in magnitude.
W.H. Hayt, Jr., J.E. Kemmerly, S.M. Durbin, Engineering Circuit Analysis, Sixth Edition.
Copyright ©2002 McGraw-Hill. All rights reserved.
7
The sinusoidal forcing function Vm cos (wt + q) produces the
steady-state response Im cos (wt + q).
The imaginary sinusoidal forcing function j Vm sin (wt + q)
produces the imaginary sinusoidal response j Im sin (wt + q).
W.H. Hayt, Jr., J.E. Kemmerly, S.M. Durbin, Engineering Circuit Analysis, Sixth Edition.
Copyright ©2002 McGraw-Hill. All rights reserved.
8
The complex forcing function Vm e j(wt + q) produces the
complex response Im e j(wt + q).
W.H. Hayt, Jr., J.E. Kemmerly, S.M. Durbin, Engineering Circuit Analysis, Sixth Edition.
Copyright ©2002 McGraw-Hill. All rights reserved.
9
(a)
(b)
In the phasor domain, (a) a
resistor R is represented by an
impedance of the same value;
(b) a capacitor C is represented
by an impedance 1/jwC; (c) an
inductor L is represented by an
impedance jwL.
(c)
W.H. Hayt, Jr., J.E. Kemmerly, S.M. Durbin, Engineering Circuit Analysis, Sixth Edition.
Copyright ©2002 McGraw-Hill. All rights reserved.
10
Find the current i(t) in the circuit shown in (a).
W.H. Hayt, Jr., J.E. Kemmerly, S.M. Durbin, Engineering Circuit Analysis, Sixth Edition.
Copyright ©2002 McGraw-Hill. All rights reserved.
11
Find the time-domain node voltages v1(t)
and v2(t) in the circuit shown below.
W.H. Hayt, Jr., J.E. Kemmerly, S.M. Durbin, Engineering Circuit Analysis, Sixth Edition.
Copyright ©2002 McGraw-Hill. All rights reserved.
12
(a) A phasor diagram
showing the sum of V1
= 6 + j8 V and V2 = 3 –
j4 V, V1 + V2 = 9 + j4 V
= 9.8524.0o V. (b) The
phasor diagram shows
V1 and I1, where I1 =
YV1 and Y = 1 + j S =
1.445o S. The current
and voltage amplitude
scales are different.
W.H. Hayt, Jr., J.E. Kemmerly, S.M. Durbin, Engineering Circuit Analysis, Sixth Edition.
Copyright ©2002 McGraw-Hill. All rights reserved.
13
RESUME
• Analisa karakteristik arus terhadap
tegangan akibat beban RLC dapat
disederhanakan dengan menggunakan
konsep phasor.
14