Gate-Level Minimization
by
Dr. Fenghui Yao
Tennessee State University
Department of Computer Science
Nashville, TN
1

What is minimization?



Simplifying boolean expressions
Algebraic manipulations is hard since there is not a uniform way of doing it
Karnaugh map or K-map techniques is very commonly used
Gate-Level Minimization 2

Two-Variable K-Map
Gate-Level Minimization 3

Example
F

AB

A ' B

B
Gate-Level Minimization 4

F

AB

A ' B

A ' B '

A '

B
Gate-Level Minimization 5

Three-Variable K-Map
Gate-Level Minimization 6

Three-Variable K-Map
Gate-Level Minimization 7

Example
F

ABC '

A ' B ' C '

AB ' C

ABC

AB

AC

A ' B ' C '
Gate-Level Minimization 8

Note


In K-maps, you can have groups of 2,
4, 8, or 16
You cannot have groups of other combinations such as a group of 6
Gate-Level Minimization 9

Exercises
F
1

F
F
2
3
A ' BC

AB ' C '

AB ' C '

AB


A ' C

A ' C '

AB ' C '

A ' B

A ' BC '

C '
ABC '
Gate-Level Minimization 10

Example
 Represent F in the minimal format and draw the network diagram
Gate-Level Minimization 11

Example
 Represent F in the minimal format and draw the network diagram
Gate-Level Minimization 12

Example
F
  
0 , 2 , 3 , 4 , 5 , 7

 Represent F in the minimal format and draw the network diagram
Gate-Level Minimization 13

Four-Variable K-Map
Gate-Level Minimization 14

Four-Variable K-Map
Gate-Level Minimization 15

Example
F ( A , B , C , D )
  
0 , 1 , 2 , 4 , 5 , 6 , 8 , 12 , 13

 Represent
F in the minimal format and draw the network diagram
F ( A , B , C , D )

A ' C '

A ' D '

C ' D '

ABC '
Gate-Level Minimization 16

Example
F ( A , B , C , D )
  
3 , 5 , 6 , 8 , 10 , 11 , 12 , 13 , 15

 Represent F in the minimal format and draw the network diagram
Gate-Level Minimization 17

Example
 Represent F in the minimal format and draw the network diagram
Gate-Level Minimization 18

Prime Implicants





You must cover all of the minterms
You must avoid redundancy
You must follow some rules
Prime Implicant
 A product term that is generated by combining the maximum number of adjacent squares in the map
Essential Prime Implicant
 A minterm that is covered by only one prime implicant
Gate-Level Minimization 19

Maxterm Simplification
 Remember
F

( F ' )'
Gate-Level Minimization 20

Example
 Simplify F in product of sums
F ( A , B , C , D )
  
1 , 2 , 3 , 5 , 6 , 8 , 10 , 11 , 12

Gate-Level Minimization 21

Example (cont)
 Step – 1
 Fill the K-map for F
Gate-Level Minimization 22

Example (cont)
 Step – 1
 Fill the K-map for F
Gate-Level Minimization 23

Example (cont)
 Step – 2
 Fill zeros in the rest of the squares
Gate-Level Minimization 24

Example (cont)
 Step – 3
Cover zeros. This is your F’

F ( A , B , C , D )'


A ' C ' D '

AC ' D

BCD

ABC
F ( A , B , C , D )

( A

C

D )( A '

C

D ' )( B '

C '

D ' )( A '

B '

C ' )
Gate-Level Minimization 25

Important
( A

B )'

A ' B '
( AB )'

A '

B '
Gate-Level Minimization 26

Don’t Care Conditions



A network is usually composed of subnetworks
Net-1 may not produce all combinations of A,B, and C
In this case, F don’t care about those combinations
A
Net-1
B
C
Net-2
F
Gate-Level Minimization 27

Don’t Care Conditions
X can be considered as 0 or 1, whichever is more convenient
A B C F
0 0 0 1
0 0 1 x
0 1 0 0
0 1 1 1
1 0 0 0
1 0 1 0
1 1 0 x
1 1 1 1
F

A
'
B
'
C
' 
A
'
BC

ABC
F

A
'
B
'
C
' 
A
'
BC

A
'
B
'
C

ABC

A
'
B
' 
BC
F

A
'
B
'
C
' 
A
'
BC

A
'
B
'
C

ABC

ABC
' 
A
'
B
' 
BC

AB
Gate-Level Minimization 28

NAND/NOR
Implementations



AND, OR, and NOT gates can be used to construct the digital systems
However, it is easier to fabricate NAND and NOR gates
So try to replace AND, OR, and NOT gates with NAND or NOR gates
Gate-Level Minimization 29

NAND Implementation




First implement with AND-OR
Put bubble at the output of each AND gate
Put bubbles at the inputs of each OR gate
Place necessary inverters
Gate-Level Minimization 30

Example
F ( A , B )

AB

CD

E
Gate-Level Minimization 31

Example
F ( A , B )

A ' ( BC

D )

AB
Gate-Level Minimization 32

Example
F ( A , B )

A ' ( BC

D )

AB
Gate-Level Minimization 33

NOR Implementation




First implement with AND-OR
Put bubble at the inputs of each AND gate
Put bubbles at the output of each OR gate
Place necessary inverters
Gate-Level Minimization 34

Example
F ( A , B )

( A

B ) C ( D

E )
Gate-Level Minimization 35

Study Problems
 Course Book Chapter – 3 Problems
 3 – 1






3 – 3
3 – 5
3 – 7
3 – 12
3 – 15
3 – 18
Gate-Level Minimization 36

Questions
Gate-Level Minimization 37