Night Vision Team Bender James Stacy Brian Herre

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Team Bender
Night Vision
James Stacy
Brian Herre
Maurio Grando
Eric Faller
Chris Bawiec
James
Hardware High Level Design
CCD Image
Sensor
Data
ADC
Monitor
Data
Clock
Strobe
VGA
Output
FPGA
Data
Serial
Transfer
Image
Logic
2 Port
RAM
Data /
Clock
Captured
Image
Captured
Image
RS-232
MC68HC11
James
Completed Goals
HC11 wired up and executing
commands via EPROM
SRAM written to and verified
Latch and Bus drivers wired up
Schematics drawn to present stage in
design
Most parts have been acquired
James
uProcessor, Bus Driver, and
Latch
Maurio
Control Logic, EPROM, and
SRAM
Maurio
Optics
•Cell Phone Camera Lens
•Size and Shape same for our CCD
•Focal length and lens are perfect
•Probably has filter to eliminate IR
•Can be used for testing CCD output
•Alternate lens idea:
•Used lens
•Definitely passes IR radiation
•Need to figure out focal length for CCD size
Maurio
CCD
Maurio
Suggested Wiring/Drivers
Maurio
Input Waveforms
Brian
Output Waveforms
Max Freq. 12.5 MHz
Conforms to RS-170
black and white TV
(30frames/sec)
Brian
VGA logic
Interface to RAM
FPGA
Video logic
Current Row
& Column
Xilinx VGA
module
8-bit pixel
data
VGA data
Brian
Software Processes
Three main software programs:



Boot monitor
Camera operating system
Computer interface program
Eric
Boot Monitor
Stored in ROM
First thing that runs when HC11 is reset
Provides simple interface via RS-232:


Upload new OS software into RAM
Run basic tests
Inputs: OS software, test commands
Outputs: Running software, test results
Eric
Camera OS
Stored in RAM during development

Can be burned into ROM when finished
Multiple interfaces:


Camera logic
Computer
Shuffles data around
Does not compute anything
Eric
OS–Logic interface
Interfaces with the FPGA to take a
picture and get the image data
Inputs:

Image Data
Outputs:

Control signals to disable frame updates
Eric
OS-Computer interface
Interfaces with PC workstation via custom
serial protocol
Protocol is very simple


Commands processed serially
No need for multiple threads or interrupts
Inputs:

“Take picture” command
Outputs:

Image data in predefined RAW format
Eric
Computer software
Provides the UI for the camera
Allows user to interact with boot
monitor and OS
Displays captured images
Saves images as JPEG files
Eric
Computer Software Mock-up
Chris
Division of Labor
FPGA-VGA and Control
logic
Eric, James
Schematics
Chris
CCD – Lens
Brian, Maurio
Interfacing FPGA and CCD
Eric, Maurio
RS-232 communication
James, Chris
RAM
Maurio, Brian
Software Programming
Eric, Chris
Chris
Parts list
uProcessor (MC68HC11E)
Latch (74HC373)
Bus Driver (74HC245A)
EPROM (AT29C256)
SRAM (HM62256)
512k SRAM (K6T4008C1B)
CCD (TC237B)
FPGA (XCS10)
VGA Port
Serial Port
Clock (8 MHz)
ADC (AD976A)
FPGA EPROM
Chris
Schedule
Chris
Questions
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