Lecture 26 OUTLINE The BJT (cont’d) • Ideal transistor analysis • Narrow base and narrow emitter • Ebers-Moll model • Base-width modulation Reading: Pierret 11.1-11.2; Hu 8.2-8.6 Notation (PNP BJT) NE NAE NB NDB NC NAC DE DN DB DP DC DN tE tn tB tp tC tn LE LN LB L P LC LN nE0 np0 = ni2/NE pB0 pn0 ni2/NB nC0 np0 ni2/NC EE130/230A Fall 2013 Lecture 26, Slide 2 R. F. Pierret, Semiconductor Device Fundamentals, Fig. 11.1 “Game Plan” for I-V Derivation • Solve the minority-carrier diffusion equation in each quasineutral region to obtain excess minority-carrier profiles – different set of boundary conditions for each region • Find minority-carrier diffusion currents at depletion region edges dnE E dx" x"0 I En qAD dnC C dx ' x ' 0 I Cn qAD dp B B dx x 0 I Ep qAD dp B B dx x W I Cp qAD • Add hole & electron components together terminal currents EE130/230A Fall 2013 Lecture 26, Slide 3 Emitter Region Analysis d 2 nE tnEE • Diffusion equation: 0 DE • General solution: nE ( x" ) A1e x"/ LE A2e x"/ LE • Boundary conditions: dx"2 nE ( x" ) 0 nE ( x" 0) nE 0 (e qVEB / kT 1) • Solution: nE ( x" ) nE 0 (e qVEB / kT 1)e x"/ LE nE I En qADE ddx " EE130/230A Fall 2013 x"0 qA DLEE nE 0 (e qVEB / kT 1) Lecture 26, Slide 4 Collector Region Analysis 0 DC • Diffusion equation: • General solution: d 2 nC dx'2 tnCC nC ( x' ) A1e x '/ LC A2 e x '/ LC • Boundary conditions: nC ( x' ) 0 nC ( x' 0) nC 0 (e qVCB / kT 1) • Solution: nC ( x' ) nC 0 (e qVCB / kT 1)e x '/ LC I Cn qADC ddxn'C EE130/230A Fall 2013 x ' 0 qA DLCC nC 0 (e qVCB / kT 1) Lecture 26, Slide 5 Base Region Analysis • Diffusion equation: 0 DB • General solution: d 2 pB dx2 tpBB pB ( x) A1e x / LB A2e x / LB • Boundary conditions: pB (0) pB 0 (e qVEB / kT 1) pB (W ) pB 0 (e qVCB / kT 1) • Solution: pB ( x ) pB 0 (e pB 0 ( e EE130/230A Fall 2013 qVCB / kT qVEB / kT 1) Lecture 26, Slide 6 1) e ( W x ) / LB e ( W x ) / LB eW / LB e W / LB e x / LB e x / LB eW / LB e W / LB Since sinh e e 2 we can write pB ( x) pB 0 (e p B 0 (e as qVCB / kT qVEB / kT 1) p B 0 (e EE130/230A Fall 2013 e x / LB e x / LB eW / LB e W / LB pB ( x) pB 0 (e qVEB / kT qVCB / kT 1) e (W x ) / LB e (W x ) / LB eW / LB e W / LB sinh W x LB 1) sinh W LB sinh x LB 1) sinh W LB Lecture 26, Slide 7 d d e e sinh d d 2 pB ( x) pB 0 (e qVEB / kT e e cosh 2 sinh W x LB sinh x LB qVCB / kT 1) p B 0 (e 1) W sinh LB sinh W LB dp B B dx x 0 I Ep qAD qA DB LB p cosh(W / LB ) B 0 sinh(W / LB ) I Cp qADB ddxpB qA DB LB p qVEB / kT 1) 1 sinh(W / LB ) e 1) cosh(W / LB ) sinh(W / LB ) e x W 1 B 0 sinh(W / LB ) EE130/230A Fall 2013 (e qVEB / kT (e Lecture 26, Slide 8 qVCB / kT qVCB / kT 1 1 BJT Terminal Currents • We know: I En qA DE LE I Ep qA DB LB I Cp qA DB LB I Cn qA nE 0 (e qVEB / kT 1) pB0 p DC LC 1 B 0 sinh(W / LB ) nC 0 (e qVCB / kT • Therefore: qA I E qA IC DE LE nE 0 DB LB EE130/230A Fall 2013 DB LB qVCB / kT qVEB / kT 1 ( e 1 ) e 1 sinh(W / LB ) sinh(W / LB ) cosh(W / LB ) (e qVEB / kT 1) e qVCB / kT 1 1) pB 0 sinh(W / LBB )) (eqVEB / kT 1) cosh(W / L cosh(W / LB ) sinh(W / LB ) pB0 sinh(W1 / LB ) (eqVEB / kT 1) DC LC Lecture 26, Slide 9 DB LB pB 0 sinh(W1 / LB ) eqVCB / kT 1 nC 0 DLBB pB 0 cosh(W / LB ) sinh(W / LB ) e qVCB / kT 1 BJT with Narrow Base • In practice, we make W << LB to achieve high current gain. Then, since sinh for 1 cosh 1 2 for 1 2 we have: pB ( x) pB 0 (e qVEB / kT 1)1 Wx pB 0 (e qVCB / kT 1)Wx EE130/230A Fall 2013 Lecture 26, Slide 10 R. F. Pierret, Semiconductor Device Fundamentals, Fig. 11.2 BJT Performance Parameters 1 1 T dc dc ni E 2 D N W E B ni B 2 DB N E LE 1 1 1 2 W 2 LB 1 1 ni E 2 D N W E B ni B 2 DB N E LE 1 ni E 2 D N W E B ni B 2 DB N E LE EE130/230A Fall 2013 Assumptions: • emitter junction forward biased, collector junction reverse biased • W << LB Replace LE with WE’ if WE’ << LE 12 1 2 W 2 LB W 2 LB Lecture 26, Slide 11 Ebers-Moll Model increasing (npn) or VEC (pnp) C. C. Hu, Modern Semiconductor Devices for Integrated Circuits, Figure 8-2 The Ebers-Moll model is a large-signal equivalent circuit which describes both the active and saturation regions of BJT operation. • Use this model to calculate IB and IC given VBE and VBC EE130/230A Fall 2013 Lecture 26, Slide 12 qA I E qA DE LE IC DB LB nE 0 DB LB 1 B 0 sinh(W / LB ) p pB 0 sinh(W / LB ) (eqVEB / kT 1) cosh(W / LB ) (e qVEB / kT 1) DC LC nC 0 If only VEB is applied (VCB = 0): DB LB DB LB e 1 pB 0 sinh(W1 / LB ) eqVCB / kT 1 cosh(W / LB ) pB 0 sinh(W / LB ) qVCB / kT V EB V CB I E I F 0 ( e qVEB / kT 1) IB I C F I F 0 ( e qVEB / kT 1) I B 1 F I F 0 ( e qVEB / kT 1) If only VCB is applied (VEB = 0): : I C I R 0 (e qVCB / kT 1) I E R I R 0 (e qVCB / kT 1) I B I R 0 (1 R )(e EE130/230A Fall 2013 qVCB / kT 1) E B C IC aR : reverse common base gain aF : forward common base gain Reciprocity relationship: DB pB 0 F I F 0 R I R 0 qA LB sinh( W / LB ) Lecture 26, Slide 13 In the general case, both VEB and VCB are non-zero: I C F I F 0 (e qVEB / kT 1) I R 0 (e qVCB / kT 1) IC: C-B diode current + fraction of E-B diode current that makes it to the C-B junction I E I F 0 (e qVEB / kT 1) R I R 0 (e qVCB / kT 1) IE: E-B diode current + fraction of C-B diode current that makes it to the E-B junction Large-signal equivalent circuit for a pnp BJT R. F. Pierret, Semiconductor Device Fundamentals, Fig. 11.3 EE130/230A Fall 2013 Lecture 26, Slide 14 Base-Width Modulation Common Emitter Configuration, Active Mode Operation W IE P + N P IC IC dc IB 1 niE 2 DE N B W n 2 DB N E LE iB 2 + VEB niB DB N E LE 2 niE DE N BW pB(x) pB 0 e qVEB / kT 1 IC (VCB=0) x 0 EE130/230A Fall 2013 VEC W(VBC) Lecture 26, Slide 15 12 W 2 LB Ways to Reduce Base-Width Modulation 1. Increase the base width, W 2. Increase the base dopant concentration NB 3. Decrease the collector dopant concentration NC Which of the above is the most acceptable action? EE130/230A Fall 2013 Lecture 26, Slide 16 Early Voltage, VA 1 Output resistance: I C VA r0 IC VEC A large VA (i.e. a large ro ) is desirable IC IB3 IB2 IB1 VA EE130/230A Fall 2013 0 Lecture 26, Slide 17 VEC Derivation of Formula for VA Output conductance: g 0 VEC VEB VBC dI C I C dVEC VA dI C dI C so g o dVEC dVBC dI C dW dI C dxnC go dW dVBC dW dVBC EE130/230A Fall 2013 N VA IC g0 for fixed VEB where xnC is the width of the collector-junction depletion region on the base side xnC P+ P Lecture 26, Slide 18 IC qA pB 0 sinh(W1 / LB ) (eqVEB / kT 1) DB LB DC LC nC 0 DB LB cosh(W / L qAni2 DB qVEB / kT IC e 1 WN B dI C qAni2 DB qVEB / kT IC 2 e 1 dW W NB W C JC dQdepC dVBC d (qN B xnC ) dxnC qN B dVBC dVBC dxnC C JC dVBC qN B VA IC g 0 dI C dW EE130/230A Fall 2013 IC dxnC I C dVBC W Lecture 26, Slide 19 pB 0 sinh(W / LBB )) eqVCB / kT 1 IC qN BW C JC C JC qN B Summary: BJT Performance Requirements • High gain (dc >> 1) One-sided emitter junction, so emitter efficiency 1 • Emitter doped much more heavily than base (NE >> NB) Narrow base, so base transport factor T 1 • Quasi-neutral base width << minority-carrier diffusion length (W << LB) • IC determined only by IB (IC function of VCE,VCB) One-sided collector junction, so quasi-neutral base width W does not change drastically with changes in VCE (VCB) • Based doped more heavily than collector (NB > NC) (W = WB – xnEB – xnCB for PNP BJT) EE130/230A Fall 2013 Lecture 26, Slide 20