Analytical Modeling of Impact Ionization and Polysilicon Gate Depletion Effects
for Application in Circuit Simulation
Hedley Morris
Department of Mathematics, San Jose State University, San Jose, CA 95192, USA.
Ellis Cumberbatch
Claremont Graduate University, School of Mathematical Sciences
710 N College Ave, Claremont, CA 91711, USA
Henok Abebe and Vance Tyree
MOSIS service, USC Information Sciences Institute
4676 Admiralty Way, Marina del Rey, CA 90292, USA
ABSTRACT
We present an analytical model for the impact ionization and
polysilicon (poly) gate depletion effects on the I-V characteristics
of the n-channel MOSFET device operating in both linear and
saturation regimes. The model is applicable for both source and
substrate reference models. I-V characteristics of the MOS device
at thin gate oxides (below 4.5nm) and shorter channel length
(below 250nm) is significantly affected by these two effects. The
poly depletion effect affects the device operation in both linear and
saturation regimes [1, 2]. However, the impact ionization effect is
only noticeable at saturation due to an increase in the device
substrate current [15, 16]. In this paper the channel current
reduction model due to poly depletion is expressed in terms of the
doping concentration on both sides of the gate oxide and its
thickness. This is achieved by directly solving the Poisson equation
on the poly and silicon sides using asymptotic methods. We
combine the substrate current model of [16] together with the poly
depletion model.
Keywords: Compact modeling, EKV, MOSFETs, polysilicon
depletion effect, impact ionization, substrate current.
.
1. INTRODUCTION
Asymptotic methods to solve the semiconductor equations
have been shown successful, e.g. see [1-6]. Here we extend
the asymptotic method to solve the semiconductor equations
for both the silicon and poly sides of the NMOS device. The
model is applicable for deep submicron MOSFETs with thin
gate oxide, < 40 A , and high level of channel doping. In
NMOS device modeling, for N d
N d potential changes
in the poly are relatively small, and the ideal assumption is
to neglect them. For very small devices this assumption is
no longer valid. Poly depletion effects can no longer be
ignored, and their neglect may cause non-physical model
parameter extraction results, [7]. Current CMOS technology
requires ultra-thin gate dielectrics and higher levels of
channel doping in order to maximize the drive current of the
transistor. For a given poly doping, an increase in channel
doping and a decrease in the oxide thickness have a direct
effect on poly depletion, [8]. Consequent MOSFET
performance degradation of reduced channel current and
gate capacitance, [8], is of major concern. A heavily doped
poly gate mimics a metal gate. However, for a very smaller
device the electric potential changes in the poly are large
enough to cause device performance degradation when the
device is operating at strong inversion. This performance
degradation is due to the voltage drop across the poly gate as
a result of the formation of a depletion layer near the
Poly / Oxide interface. Moreover, the derivative of the
electric potential at the Poly / Oxide and Si / Oxide
interfaces are equal.
The effect of poly depletion on the channel surface potential
and I-V characteristics is well established [8, 10]. As the CV plots indicate, this effect is significant far from the
threshold voltage. Adjusting the threshold voltage does not
capture the whole effect, and detailed examination of the
poly depletion effect at a fundamental level is required.
Different modeling approaches towards the sub-100nm
MOSFET model are discussed in [11] and the surface
potential description model is reported to be promising,
[9,11]. Here we present a surface-potential-based compact
model for the poly depletion effect suitable for SPICE
application for both source and substrate reference models.
The model is derived from device physics applying
asymptotic analysis on the Poisson and drift-diffusion
equations.
2. POLYDEPLETION MODEL
We apply the one-dimensional Poisson equation for the
potential ψ ( x ) , where x is the perpendicular distance from
the gate to silicon substrate. In this model, both the poly and
the silicon doping are considered to be uniform and
separated by a thin oxide layer of width tox .
The Poisson equation for the two regions becomes
ψ "=
q ⎧n − p − N d
⎨
ε s ⎩n − p + Na
n = ni e
(ψ −ϕn )/Vth
for
x ≤ −tox
for
x≥0
, p = ni e
− (ψ −ϕ p )/Vth
(1)
The boundary conditions consist of the continuity of electric
∂ψ
, at the
potential, ψ , and the electric displacement, ε
∂x
oxide interfaces x = 0, − tox .
Na
The assumption here is that the doping density N d
N d in the silicon, where N d and N a
in the poly and N a
are the donor and accepter doping densities respectively.
The parameter q represents electron charge, ε s
semiconductor permittivity, ε i oxide permittivity, n
electron density, p hole density, ni intrinsic density, V fb
flat band voltage, Vgs applied gate voltage, Vd drain voltage,
The applied gate voltage generates a difference between the
levels of the quasi-Fermi potentials at the extremities of the
device. The scaled quasi-Fermi potential is taken to be unity
in the silicon substrate ( ϕ = 1 , so that w → 0 at large x ),
and it is 1 + v gs at the poly gate. The Fermi-potential varies
vs
vd
locally in the silicon channel. The
ln(λ )
ln(λ )
boundary condition on the scaled electrostatic potential at
x = − xn − tox is then the applied gate voltage minus the
from
to
flat band voltage, where the flat band voltage represents the
built-in potential or work functions across the oxide
interfaces, [12].
Vs source voltage, K b Boltzmann constant, T temperature,
K T
and thermal voltage Vth = b .
q
The poly is considered to be in depletion at strong inversion
of the channel and the solution for the poly side is
1
*
2
(5)
w = v gs −
( x + xn + tox )
2β
We use the following parameter scaling for the gate voltage,
electric potential, quasi-Fermi potential, drain/source
voltage, gate oxide capacitance respectively, and we nonln(λ )
dimensionalise lengths using the length scale Ld
λ
for ( − xn − tox ) ≤ x ≤ −tox .
[V
] [
dw
]
*
gs , (V gs − V fb ),ψ , φ = v g , v g , w, ϕ Vth ln λ ;
Vds = (Vd − Vs ) = v dsVth ; C ox =
dx x =−t
ox
cox ε s ε i
= ;
Ld
t ox
L2d = ε s Vth /qni
(3)
λ=
Na
−3
Typically β is order 10 , and it is sometimes useful to
make approximations assuming β 1 .
scaled
variables
equation
⎧ 1 ( w−v*g ) ln λ
− ( w + 2 − v *g ) ln λ
− βe
⎪ e
''
w = ⎨β
⎪⎩ e ( w−1−ϕ ) ln λ - e −( w+1−ϕ ) ln λ + 1
where at thermal equilibrium,
(1)
becomes
− 1 / β x ≤ −t ox
ϕn = ϕ p = ϕ .
=
dw
dx x =0
= cox
ln(λ )
λ
( ws − wt )
(6)
where ws = w(0) and wt = w( −tox ) .
6
9
ranges from 10 to 10 and it is the
ni
size of this parameter (or more accurately its logarithm) that
allows asymptotic approximations to be effective. We use
N
the parameter β = a to indicate a doping reference.
Nd
The parameter
In
Using the continuity of electric displacement, the boundary
conditions at x = −tox and x = 0 become
x≥0
(4)
The poly depletion width has two possible solutions that can
be obtained from the boundary condition (6) and equation
(5) at x = −tox , and we choose the physically valid one.
The scaled poly depletion depth is
x n = − λ / ln λ / cox +
( )
1 2
cox
λ
+ 2 β (v *g − ws )
ln λ
(7)
The poly depletion width versus the gate voltage for
different poly doping is shown in Fig. 1 below. The result is
consistent with the physics.
The boundary condition at x = 0 in (6) gives equation (8)
below. It replaces equation (23) of [4] to account for the
poly depletion effect .
dw
dx
x =0
⎧ λ / ln λ / cox −
⎫
⎪
⎪⎪
1⎪
= ⎨ ⎛ 1 ⎞2 λ
⎬
*
β ⎪− ⎜ ⎟
+
2
β
(
v
−
w
)
g
s ⎪
⎜
⎟
⎪⎩ ⎝ c ox ⎠ ln λ
⎪⎭
(8)
Fig. 1. Polysilicon depletion depth versus gate voltage for
17
−3
35 A oxide thickness, and N a = 10 cm .
Methods to solve the silicon side of the equation are well
developed, and a detailed asymptotic analysis of the
equation is done in [3, 4 and 6.] Using the iterative
technique described in [4], the first order approximation of
the surface potential derived from (8) for 0 < β < 1 and
c
c = ox is
λ
βc ⎛
The second term of Z 0 in (9) is due to the contribution of
the poly depletion effect and it reduces the surface potential
as shown in Fig. 2 and 3. Because of this surface potential
reduction, the channel current is also reduced. The channel
current is derived as in [6], but here we consider a substrate
reference description
It = Is − Id
ln Z 0
ln(ln λ )
ws = 1 + ϕ + 2
+2
ln λ
ln λ
ln(ln λ )
c
Z0 =
)−
(v *g − 1 − ϕ − 2
ln λ
2
−
Surface potential versus gate voltage for
17
−3
tox = 35 A , ϕ = 0 , and N a = 10 cm .
ϕ pch
ψ s = wsVth ln λ
ln(ln λ ) ⎞
*
⎟ ln λ
⎜ vg − 1 − ϕ − 2
ln λ ⎠
2 2⎝
3
Fig. 3.
with I s = I 0
∫Z
0
dϕ
vs / ln λ
ϕ pch
Id = I0
∫ Zλ
0
dϕ
vd / ln
2
where I 0 = K bTni µ eff Ld 2λ (ln λ ) 2 (
(9)
Weff
Leff
)
(10)
The pinch-off voltage is as given in [3] and [4]
V p = ϕ pchVth ln λ
ϕ pch = v *g − 1 + 1 / c 2 ln λ −
−
1
1
1 + 2(ln λ )c 2 (1 + v *g −
)
ln λ
c ln λ
2
(11)
In [4], the first order approximation of the pinch-off voltage
is shown to be
V p ∼ Vgs − VT 0
(12)
Fig. 2.
Surface potential versus oxide thickness for
17 −3
Vgs = 1V , ϕ = 0 , and N a = 10 cm .
where VT 0 ∼ V fb + Vth ln(λ ) + 2Vth ln(ln(λ )) is the
threshold voltage. The forward, reverse, and total currents
from (9) and (10) then become
⎧ Weff ⎡ (V p − Vs ) 2
⎤
βC ox2
−
(V p − Vs ) 3 ⎥
⎪K p
⎢
2
6ni ε s qλ
Leff ⎢⎣
⎪
⎥⎦
⎪
I s = ⎨for V < V
s
p
⎪
⎪
⎪⎩
0
for Vs ≥ V p
(13)
⎧ Weff ⎡ (V p − Vd ) 2
⎤
βC ox2
−
(V p − Vd ) 3 ⎥
⎪K p
⎢
2
6ni ε s qλ
Leff ⎣⎢
⎪
⎦⎥
⎪
I d = ⎨for V < V
d
p
⎪
⎪
⎪⎩
0
for Vd ≥ V p
Fig. 4. Normalized channel current versus source/drain
voltage for gate voltage 1.3,1.1, 0.9 and 0.7V (top to
bottom.) The oxide thickness is 35A , and
β = 0.01 .
(14)
⎧
(Vs + Vd )
⎡
⎤
](Vd − Vs ) −
⎪ W ⎢[V p −
⎥
2
⎪ K p eff ⎢
⎥
βC ox2
⎪
Leff ⎢
3
3 ⎥
⎪
⎢− 6n ε qλ [(V p − Vs ) − (V p − Vd ) ]⎥
i s
⎣
⎦
⎪
⎪ for Vs ≤ V p and Vd ≤ V p
⎪
⎤
⎡ (V p − Vs ) 2
⎪
−
⎥
⎢
⎪
Weff
2
⎥
⎢
⎪ Kp
2
⎥
⎢
L
β
C
⎪⎪
eff
3
ox
V
V
(
)
−
−
⎥
⎢
p
s
It = ⎨
⎦
⎣ 6 n i ε s qλ
⎪
⎪ for Vs ≤ V p and Vd > V p
⎪
⎤
⎡ (V p − Vd ) 2
⎪
+
⎥
⎢
⎪
Weff
2
⎥
⎢
⎪ − Kp
⎥
Leff ⎢
βC ox2
⎪
(V p − Vd ) 3 ⎥
⎢+
⎪
⎦
⎣ 6 n i ε s qλ
⎪
⎪ for Vd ≤ V p and Vs > V p
⎪
for Vd > V p and Vs > V p
⎪⎩ 0
(15)
where K p = µeff Cox
Fig. 5. Normalized channel current versus source/drain
voltage for gate voltage 1.3,1.1, 0.9 and 0.7V top to
bottom.) The oxide thickness is 80 A , and β = 0.01 .
Note that the normalized current in Fig. 4 and 5 is
I t Leff
and the source
defined as I ds (Normalized) =
K pWeff
voltage is set to be zero ( Vs = 0 ). The poly depletion effect
significantly reduces when the oxide thickness increases
from 35 A to 80 A as shown in Fig. 5.
3. IMPACT IONIZATION
In version 2.6 of the EKV model [13], the substrate current
I
sub due to impact ionization is modeled by
where Vdss is half the saturation voltage. The parameters
IBA, IBB , IBN are the EKV impact ionization parameters
characteristics at strong inversion and impact ionization
effects. The final I-V model is similar to the well tested
MOSFET model in [13] but includes additional terms for the
poly depletion effect and an improved impact ionization
formula. Our model reduces to the I-V model of EKV [13]
2
N and the oxide thickness
when, β Cox ≈ 0 , N d
a
becomes large.
Our final model comparison with the I-V model in [13]
confirms that the main sources for poly depletion effect and
MOSFET performance degradation are: a significant
ε si
⋅ XJ , where COX and XJ are the intrinsic
COX
reduction of the oxide thickness (< 40 A ) and increase in
the channel to poly doping ratio, β .
⎧
IBA
IBB
Vib exp( −
L )
⎪ I ds
IBB
Vib c
I sub = ⎨
⎪
0
⎩
for Vib ≥0
(16)
for Vib <0
with
Vib = Vd − Vs − 2 ⋅ IBN ⋅ Vdss
and LC =
(17)
EKV parameters representing gate oxide capacitance per
unit area and junction depth respectively.
REFERENCES
[1]
The total drain current is given by
[2]
I DS = I ds + I sub
(18)
Equation (16) is based on the phenomenological formula of
Chynoweth. [14]. In references [15, 16] a new, physics
based, expression was proposed to replace the Chynoweth
formula. In the context of the EKV model, this results in the
following modification of (16)
IBB ⋅ Lc
) for Vib ≥0
Vib
⎪
0
for Vib <0
⎩
(19)
The function F (u ) is given by a simple series
⎧
IBA
V
Vib F ( ib
⎪ I ds
I sub = ⎨
IBB
IBB ⋅ Lc
∞
F (u ) = u − ∑ wk
k =1
)exp( −
1
xk + u
−1
(20)
The constants {xk } and {wk } are all known and five or less
terms are needed to produce accurate results. This formula
together with the current expressions determined in section
two allow us to incorporate both poly-depletion and impact
ionization in our model or simply improve the treatment of
impact ionization in the standard EKV model.
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10]
[11]
[12]
[13]
4. CONCLUSION
The main purpose of this work is to develop a new
compact model for the MOSFET device that incorporates
both poly depletion and impact ionization effects. The
model is derived from the Poisson and drift-diffusion
equations using asymptotic methods, and it is intended for
application in SPICE circuit simulator.
We are able to achieve analytic models for the poly
depletion for the channel surface potential and I-V
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