VLSI System Design Overview of VLSI Design Issues

advertisement
VLSI System Design
Overview of VLSI Design Issues
Professor: Dr. Marcel Jacomet (based on transparencies designed by
Chris Terman at MIT, completely updated and adapted at MicroLab-I3S)
Overview
? Microelectronic history
? the complexity of microelectronics
? design steps
Goal: You are familiar with the microelectronics history,
have an idea about the microelectronics complexity and
you have an overview of the VLSI design steps.
MicroLab, VLSI-1 (1/28)
JMM v1.4
What’s expected of you
Class/Homework
50% in class
50% homework
Mini Project
20% of final grade
Test
80% of final grade
Readings from a Starter Guide to
VHDL and some articles. Some
problems to be worked at home. Selfstudy of the VHDL language with help
of the CBT CD from Doulouse.
Some design exercises have to be
done in the lab. Specify, design and
simulate some small VHDL design
projects. Place & route them on a
FPGA target technology (due date: no
later than Friday July 16th, 2003,
12h00)
One 60 minute in-class test. Meant
to be duck soup if you’ve been
coming to lectures and doing the lab
and homework (date: Friday July 2th,
2003).
MicroLab, VLSI-1 (2/28)
JMM v1.4
Timetable 4th Semester:
Introduction to VLSI System Design
Date
12.3.
19.3.
26.3.
2.4.
23.4.
30.5.
7.5.
14.5.
21.5.
28.5.
4.6.
11.6.
18.6.
25.6
2.7.
9.6.
16. 6
Topic
Self-Study
vlsi1: history & complexity
A VLSI tutorial
vlsi1: history & complexity
How a silicon int.
vlsi8: micro technologies
vlsi21: top-down design, VHDL article Hoff
vlsi21: top-down design, VHDL VHDL/CBT
Ex400, 401 (entity)
VHDL/CBT
vlsi21 & Ex402 (scirocco)
VHDL/CBT
vlsi21 & Ex403,404,405 (macro) chapter 4
vlsi21
chapter 4
Ex406,Ex407,Ex409 (behav) CAD exercise
vlsi21 & synthesis,test bench chapter 5, 6
Ex410 (struct),Ex411,Ex412
CAD exercise
Ex440_1: de-bounce circuit
project 1
Ex440_2: traffic light circuit project 2, lab
Test
test discussion, projects
projects, lab
Ex440_3: stop watch circuit project 3, lab
MicroLab, VLSI-1 (3/28)
JMM v1.4
So, what’s VLSI Systems Design
all about?
You’ll get a bottom-up tour of how integrated
circuits are engineered. We’ll talk about
?field-effect transistors: how they work, how they’re
built, effects of new technologies
?various design and layout techniques, from the
ordinary to the bizarre, for creating combinational
and sequential circuits, datapaths, memories,
buffers, regular logic structures, …
?how you tackle the problem of designing circuits
with 1,000,000 gates -- you’re not in Digital
Technique anymore!
MicroLab, VLSI-1 (4/28)
JMM v1.4
Key Technology Microelectronics
?microelectronics is a key technology of the world
economy
? technology development is extremely aggressive
? post-grade engineering education is important
? influence of other technologies like software
engineering
? key technologies may be used as weapons. 1991
Japan hold 80% share of the world production of
4MB DRAMs. Artificial raw material shortage are
disastrous.
? very few Swiss chip fabs. Our raw material is the
high education standard, that means YOU
MicroLab, VLSI-1 (5/28)
JMM v1.4
What is a VLSI Circuit?
VERY LARGE SCALE INTEGRATED CIRCUIT
Technique where many circuit components and
the wiring that connects them are manufactured
simultaneously into a compact, reliable and
inexpensive chip.
Early (circa 1977) characterization of circuit
“size” before people realized that the number of
components per chip was doubling every 18 months
(Moore’s Law)! This growth rate has slowed in
recent years… can you guess why?
MicroLab, VLSI-1 (6/28)
JMM v1.4
Course Outline/Brief history
Bell Labs lays the groundwork:
1940: Ohl develops PN junction
1945: Shockley’s lab established
1947: Bardeen and Brattain create
point-contact transistor with
two PN junctions. Gain = 18.
1951: Shockley develops junction
transistor which can be
manufactured in quantity.
1952: Dummer forecasts “solid
block [with] layers of
insulating, conducting and
amplifying materials”
1954: The first transistor radio!
Also, TI makes first silicon
transistor (price $2.50)
MicroLab, VLSI-1 (7/28)
JMM v1.4
Early integration
Jack Kilby, working at Texas Instruments, first dreamed up the idea
of a monolithic “integrated circuit” in July 1959. By the end of the
year, he had constructed several examples, including the flip-flop
shown in the patent drawing above. Components are connected by
hand-soldered wires and isolated by “shaping” and pn diodes used as
resistors.
Robert Noyce experimented in the late 40’s with
transistors while a physics major at college. He went to MIT where
“much to his surprise, few people had even heard about the
transistor.” After getting his PhD in 1953, he worked in industry,
finally arriving at Mountain View, CA and Shockley Semiconductor
Labs in 1955.
MicroLab, VLSI-1 (8/28)
JMM v1.4
“
“
In 1957, Noyce left Shockley’s
lab to form Fairchild Semiconductor with Jean Hoerni.
Gordon Moore is another
founder.
In early 1958, Hoerni invents
technique for diffusing impurities into
the silicon to build planar transistors
and then using a SiO2 insulator.
In mid 1959, Noyce develops
first true IC using planar transistors,
back-to-back pn junctions for
isolation, diode-isolated silicon
resistors and SiO2 insulation with
evaporated metal wiring on top.
MicroLab, VLSI-1 (9/28)
JMM v1.4
Practice makes perfect...
1.5 mm
1961: TI and Fairchild introduced
the first logic IC’s (cost ~$50 in
quantity!). This is a dual flip-flop with 4
transistors.
1963: Densities and yields are improving.
This circuit has four flip flops.
0.97 mm
1967: Fairchild markets the semi-custom
chip shown below. Transistors (organized in
columns) could be easily rewired using a
two-layer interconnect to create different
circuits. This circuit contains ~150 logic
gates.
3.81 mm
1968: Noyce and Moore leave
Fairchild and found Intel. No
business plan, just a promise
to specialize in memory chips.
They raise $3M in two days
and move to Santa Clara. By
1971 Intel had 500 employees;
by 1983 it had 21,500
employees and $1100M in sales.
MicroLab, VLSI-1 (10/28)
JMM v1.4
The Big Bang
2.87 mm
In 1970, making good on
its promise to its investors Intel
starts selling a 1K bit RAM, the
1103. It was a bear to interface to,
but its density and cost make it the
only game it town.
In 1971 Intel introduces the first
microprocessor, designed by Ted Hoff.
The 4004 had 4-bit buses and a
clock rate of 108KHz. It had 2300
transistors and was built in a 10um
process. It never captured much
interest in the market and was soon
eclipsed by its more capable brothers.
MicroLab, VLSI-1 (11/28)
JMM v1.4
Exponential Growth
Introduced in 1972, the 8008 had 3,500
transistors supporting a byte-wide data path.
Despite its limitations, the 8008 was the first
microprocessor capable of playing the role of
computer CPU as demonstrated on the cover of
the July ‘74 issue of Radio-Electronics.
Last, but not least, on our tour is the
8080. Introduced in 1974, the 8080
had 6,000 transistors fab’ed in a 6um
process. The clock rate was 2Mhz, more
than enough to ignite the personal
computer industry. At least Paul Allen
and his partner thought so when they
wrote a BASIC interpreter for the 8080
in 1975. They would later collaborate in
another, more profitable, venture...
MicroLab, VLSI-1 (12/28)
JMM v1.4
Today
AVP-III Video Codec from Lucent Technologies
Many disciplines have contributed to the current state of the art
in VLSI design:
?solid-state physics
?materials science
?lithography and fab
?device modeling
?circuit design & layout
?architecture
?algorithms
?CAD tools
We’ll be concentrating on the right-hand column
MicroLab, VLSI-1 (13/28)
JMM v1.4
“ComputerAided
Design”
CAD Tools
?organize
Standard-cell place
and route for “random”
logic.
#1
?generate
?verify
Symbolic layout tools to
ease the task of physical
design; mask verification
to ensure manufacturability.
Circuit analysis programs predict circuit behavior at
all the process corners. Gate-level and behavioral
simulators help you get it right the first time!
Tools to do the tedious, repetitive work such as
routing,“tiling” a mosaic of building-block cells, or
verifying that the layout and schematic match.
MicroLab, VLSI-1 (14/28)
JMM v1.4
CAD Tools #2
Problem:
? designing highly complex VLSI circuits
(100K to xM fets)
? classical, iterative procedures are unsuitable
? precise transistor models are necessary for
reliable predictions ? data inflation
Solution:
? new design methodologies
? powerful design tools
? high level design languages
? silicon compiler would be useful
MicroLab, VLSI-1 (15/28)
JMM v1.4
VLSI Design Challenge
Goal:
designing circuits with increasing complexity in
always shorter times
? computer has to take over routine work
? deliberate the designer from unnecessary low
qualification work
? shift of design activities to higher level abstract
work
? computer has to support new design methods
MicroLab, VLSI-1 (16/28)
JMM v1.4
Chip Complexity #1
Chip classification according to number of active
elements and minimal feature size:
classification
SSI
MSI
LSI
VLSI
ULSI
#transistors
1 - 100
100 - 1k
1k - 100k
100K ?
example
gates
registers
uP
RAM, sig. proc.
year
1970
1980
1985
1992
2003
2010
minimal channel length
10? m
5? m
2? m
0.5? m
0.13? m (90nm announced)
?
MicroLab, VLSI-1 (17/28)
JMM v1.4
Chip Complexity #2
can you really imagine the chip complexity of
today's VLSI chips and not just express it as a mere
number
street map image
year
feature block
1970 10x10? m200m
1980 10x5? m 200m
1992 10x0.7? 200m
chip
2mm
5mm
10mm
town
Biel
Paris
Switzerland
MicroLab, VLSI-1 (18/28)
JMM v1.4
Architecture
(Multiple choice)
This is a picture of
(A) a programmable general purpose ASIC with 1/4 million
transistors on a 40mm2 designed in a 0.7? m CMOS
full custom technology.
(B) a processor able to execute 64 knowledge based rules
in parallel due to a 3 stage pipelined architecture with
hard-coded adder, multiplier, divider architecture.
(C) the fastest fuzzy processor in the world, designed
by MicroLab-I3S and presented at the international
FUZZ‘98 conference in New Orleans
ANSWER: _________
MicroLab, VLSI-1 (19/28)
JMM v1.4
Circuit Design & Layout
Standard cell
Full custom
RAM Generator
Q: Which engineer drew the most fets? ______
MicroLab, VLSI-1 (20/28)
JMM v1.4
VLSI: The Ideal Implementation
Medium?
VLSI
?gives the designer control over almost everything:
architecture, logic design, speed, area, power, …
?densities are increasing, costs decreasing with each
passing year
?is used by almost everyone: “No one gets fired for
building an ASIC”
?was the enabling technology for much of the
economic growth of the 80’s and 90’s. It will no
doubt continue in its starring role for some time
come.
Is life really a bowl of cherries?
MicroLab, VLSI-1 (21/28)
JMM v1.4
VLSI Fact-of-Life #1:
“So much to do, so little time”
You need a design methodology :
?budget ($, speed, area, power, schedule, risk)
?low-level building blocks,
high-level architecture
?behavioral design, verification
?logic design, verification
?layout, verification
MicroLab, VLSI-1 (22/28)
JMM v1.4
VLSI Fact-of-Life #2:
“You can’t reach in and fix it”
Notice that the word “verification” kept appearing in
the previous slide.
Mistakes can be costly:
find bug(s)
?
?
reverify
1 week Ecu 10k
new masks
3 days Ecu 25k
fab run
12 weeks Ecu 1k/wafer
slip ship date
Ecu Ecu Ecu
There’s a lot that needs checking:
?circuit must operate at all “corners”
verified at building block level
?logic must be correct, operate reliably
verified at RTL/gate level
?chip has to interoperate with system
verified at behavioral level
?chip has to be manufacturable
verified at mask level, at tester
MicroLab, VLSI-1 (23/28)
JMM v1.4
VLSI Fact-of-Life #3:
“Verification is a tedious task”
MicroLab, VLSI-1 (24/28)
JMM v1.4
VLSI Fact-of-Life #4:
“You can’t find all the bugs”
The key word here is “find”:
?one can’t explore the behavior of the circuit under all
possible conditions
?some of the bugs arise from unanticipated interactions
which, by definition, one never thinks of testing
?it’s not clear when one is “done” looking for bugs!
Time pressures mean that most searches stop too soon.
The trick is to choose some implementation rules that
result in a circuit that is correct by construction*. For
example:
?choose a simple clocking scheme
?module inputs must go only to fet gates
?disallow un-clocked feedback
?make register t(clk-to-Q) > t(hold)+skew
?use poly only for local interconnect
?no diffusion wires
?etc., etc., etc.
* or at least avoid as many problems as possible!
MicroLab, VLSI-1 (25/28)
JMM v1.4
VLSI Fact-of-Life #5:
“Nobody’s perfect”
Plan for what happens after you turn it on and
nothing happens.
?provide lot’s of observability and controlability.
You’ll need to localize and then find the bug.
?have a way to run the chip slowly and/or stop it
without it burning up or loosing bits.
?figure out how to track down performance
problems without relying on fast I/O (tester pins
are slow!)
?leave room in the budget
(time, Ecu) for debugging.
?write and run your
manufacturing tests
before tape out.
MicroLab, VLSI-1 (26/28)
JMM v1.4
Microelectronics in 4th Semester
history &
complexity
exercises with
CAD tools
microelectronic
technologies
EXPERIENCE
(small project)
VHDL
synthesis
design flow
JMM v1.4
Course material
? Textbook from Weste & Eshraghian for
4th and 5th semester (voluntary)
? Copy of transparencies (placeholder for private notes)
? VHDL Starter (recommended)
? CAD Exercises on the MicroLab web pages
? CBT CD on VHDL for your PC (lending
from MicroLab in 4th semester)
MicroLab, VLSI-1 (27/28)
? different small articles
Coming Up...
We’ll be traveling top-down in 4th semester and
bottom-up in 5 & 6 semester:
Next topic…
Microelectronic technologies like standard cell,
gate array, sea-of-gates, macro cell, FPGA, tiny
micro-controllers.
Readings for next time…
web CBT tutorials see on
http://www.microlab.ch/academics/courses
? How a silicon integrated circuit is made (web CBT)
? A VLSI Tutorial up to chapter with NAND/NOR
(web CBT from Uni Manchester)
? T. Hoff: Article about the ? P History (German)
? To learn more about Intel’s early days and to ogle
some die photos of oldie-but-goodie chips browse
at the Intel link of the MicroLab VLSI course web
page.
MicroLab, VLSI-1 (28/28)
JMM v1.4
Download