6.002
CIRCUITS AND
ELECTRONICS
State and Memory
Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT
OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].
6.002 Fall 2000
Lecture 14
Review
Recall
vI +
–
v I = VI
for
R
C
+
vC
–
vC (0)
t ≥0
−t
vC = VI + (vC (0)− VI ) e RC
1
Reading: Sections 10.3, 10.5, and 10.7
Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT
OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].
6.002 Fall 2000
Lecture 14
This lecture will dwell on the
memory property of capacitors.
For the RC circuit in the previous slide
vI
vI
VI
t ≥0
t
0
vC
VI
−t
vC = VI + (vC (0)− VI ) e RC
vC (0 )
0
t
Notice that the capacitor voltage for t ≥ 0 is
independent of the form of the input voltage
before t = 0 . Instead, it depends only on the
capacitor voltage at t = 0 , and the input voltage
for t ≥ 0 .
Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT
OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].
6.002 Fall 2000
Lecture 14
State
State : summary of past inputs relevant
to predicting the future
q=CV
for linear capacitors,
capacitor voltage V
is also state variable
state variable, actually
Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT
OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].
6.002 Fall 2000
Lecture 14
State
Back to our simple RC circuit 1
vC = f (vC (0 ), vI (t ))
vC = VI + (vC (0 ) − VI ) e
−t
RC
Summarizes the past input relevant
to predicting future behavior
Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT
OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].
6.002 Fall 2000
Lecture 14
State
We are often interested in circuit
response for
zero state
vC (0) = 0
zero input
vI (t) = 0
Correspondingly,
zero state response or ZSR
vC = VI − VI e
−t
RC
2
zero input response or ZIR
vC = vC (0 ) e
−t
RC
3
Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT
OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].
6.002 Fall 2000
Lecture 14
One application of STATE
DIGITAL MEMORY
Why memory?
Or, why is combinational logic insufficient?
Examples
Consider adding 6 numbers on your
calculator
2+9+6+5+3+8
M+
“Remembering” transient inputs
Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT
OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].
6.002 Fall 2000
Lecture 14
Memory Abstraction
A 1-bit memory element
d IN
store M
d OUT
The
6.004
view
The
NEC
View
$
¥
☺
Remembers input when store goes high.
Like a camera that records input (dIN) when the
user presses the shutter release button.
The recorded value is visible at dOUT .
d IN
store
remembers the 1
d OUT
Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT
OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].
6.002 Fall 2000
Lecture 14
Building a memory element …
A First attempt
dIN
*
dOUT
C
storage
node
store
Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT
OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].
6.002 Fall 2000
Lecture 14
Building a memory element …
A
vC d
OUT
dIN
*
store = 1
C
vC d
OUT
dIN
*
store = 0
C
vC
Stored value leaks away
vC = 5 ⋅ e
5V
VOH
t
−t
RL C
T = − RL C ln
RL
VOH
5
from 2
T
store pulse width >> RON C
Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT
OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].
6.002 Fall 2000
Lecture 14
Building a memory element …
B Second attempt
dIN
buffer
dOUT
*
C
RIN
buffer
store
Input resistance RIN
VOH
T = − RIN C ln
5
RIN >> RL
Better, but still not perfect.
Demo
Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT
OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].
6.002 Fall 2000
Lecture 14
Building a memory element …
C Third attempt
buffer + refresh
store
dIN
dOUT
*
store
C
Does this work?
No. External value can
influence storage node.
Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT
OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].
6.002 Fall 2000
Lecture 14
Building a memory element …
D Fourth attempt
buffer + decoupled
refresh
store
dIN
dOUT
*
C
store
Works!
Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT
OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].
6.002 Fall 2000
Lecture 14
A Memory Array
4-bit memory
IN
store
Address
OUT
Decoder
00
01
A
d IN
S M
d OUT
B
d IN
S M
d OUT
A
C
d IN
S M
d OUT
B
D
d IN
S M
d OUT
C
a0 a1
2
Address
10
11
IN store
D
OUT
Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT
OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].
6.002 Fall 2000
Lecture 14
Truth table for decoder
a0
0
0
1
1
a1
0
1
0
1
A
1
0
0
0
B
0
1
0
0
C
0
0
1
0
D
0
0
0
1
Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT
OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].
6.002 Fall 2000
Lecture 14
Agarwal’s top 10 list on memory
10
9
8
7
6
5
I have no recollection, Senator.
I forgot the homework was due today.
Adlibbing ≡ ZSR
I think, therefore I am.
I think that was right.
I forgot the rest …
Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT
OpenCourseWare (http://ocw.mit.edu/), Massachusetts Institute of Technology. Downloaded on [DD Month YYYY].
6.002 Fall 2000
Lecture 14