6.S096: Assembly
Daniel Kang
Massachusetts Institute of Technology
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A typical computer
Fig. 01-06 from Englander, Irv. The Architecture of Computer Hardware and System
Software: An Information Technology pproach. 2nd edition. John Wiley & Sons, Inc.
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Von Neumann Architecture: CPU
Image of Von Neumann architecture removed due to copyright restrictions.
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What is assembly?
“An assembly language is a low-level programming language for a
computer, or other programmable device, in which there is a very
strong (generally one-to-one) correspondence between the
language and the architecture’s machine code instructions.”
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What is assembly?
“An assembly language is a low-level programming language for a
computer, or other programmable device, in which there is a very
strong (generally one-to-one) correspondence between the
language and the architecture’s machine code instructions.”
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Why high-level languages?
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Stronger abstractions
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Increased portability
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e.g. object oriented programming
e.g. C, C++, Java, Python
e.g. interpreted languages
e.g. Java, Python
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Faster development cycles
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Why assembly?
y?
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Debugging often requires reading assembly
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Understand how things work at the machine level
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Helps you write faster code (even in high-level languages)
Assembly languages (architectures)
rchitectures)
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x86, x64 (desktops, laptop, servers)
servers)
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ARM (phones)
(phones)
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SPARC
SP
ARC (Sun)
(Sun)
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MIPS
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Registers
Registers
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Storage close to the CPU
Most instructions manipulate registers
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Manipulation of register content
Load and store from registers
Register are fast, memory access is slow
x86 syntax (AT&T / GAS)
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Registers
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8 registers in x86 (32-bit)
16 registers in x64 (64-bit)
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16-bit: ax, bx, ...
32-bit: eax, ebx, ...
64-bit: rax, rbx, ..., r8, r9, ...
Referenced by %REGISTER
Constants: $0, $1, $0x20 (32), ...
x86 syntax (AT&T / GAS)
GAS)
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Arithmetic instructions
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Assignment instructions
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OP a, b
e.g. test %eax, %eax
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Control flo
flow
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OP a, b → b = a
e.g. mov %edx, %eax → %eax = %edx
Condition testing
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OP a, b → b = b OP a
e.g. add %edx, %eax → %eax = %eax + %edx
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OP address
e.g. jmp 0x420e80 → jump unconditionally to 0x420e80
Live demos!
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Hailstone sequences: code
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Hailstone sequences: unoptimized disassembly
disassembly
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Compiled with gcc version 4.8.1
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CPU: Intel(R) Core(TM) i7-3612QM CPU @ 2.10GHz
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gcc -O0 hailstone.c -o hailstone
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gdb ./hailstone
Hailstone sequences: unoptimized disassembly
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Hailstone sequences: optimzed disassembly
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gcc -O3 hailstone.c -o hailstone
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gdb ./hailstone
Intrinsics: code
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Intrinsics: vadd optimized disassembly
disassembly
NOTE: THIS CODE IS UNSAFE
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gcc -O3 intrin.c -o intrin
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gdb ./intrin
(why?)
Intrinsics: sadd disassembly
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Try it yourself !
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fit on the screen! (why?)
Too large to fit
Further questions
questions
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How
Ho
w are parameters passed to functions?
functions?
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How are values returned from functions?
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Do all instructions take the same amount of time?
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How
w does caching work?
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What are the differences
differences between ARM and x86?
Further material
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Intel syntax
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External assembly: yasm, masm, etc.
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Intel manuals: http:
//www.intel.com/content/www/us/en/processors/
architectures-software-developer-manuals.html
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Classes: 6.004, 6.033, 6.172
MIT OpenCourseWare
http://ocw.mit.edu
6.S096 Effective Programming in C and C++
IAP 2014
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