6.976 High Speed Communication Circuits and Systems Lecture 6
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6.976 High Speed Communication Circuits and Systems Lecture 6 Enhancement Techniques for Broadband Amplifiers, Narrowband Amplifiers Michael Perrott Massachusetts Institute of Technology Copyright © 2003 by Michael H. Perrott Resistor Loaded Amplifier (Unsilicided Poly) vout vin Vdd RL Id vin Vbias M1 vout Cfixed M2 gm1RL 1 Ctot = Cdb1+CRL/2 + Cgs2+KCov2 + Cfixed (+Cov1) slope = -20 dB/dec f gm1 2πCtot 1 2πRLCtot Miller multiplication factor We decided this was the fastest non-enhanced amplifier We will look at the following - Can we go faster? (i.e., can we enhance its bandwidth?) - Reduction of Miller effect on C - Shunt, series, and zero peaking - Distributed amplification gd M.H. Perrott MIT OCW Miller Effect on Cgd Is Significant RL Zin C gd vin M1 Rs vout CL Cgs Vbias Id Cgd is quite significant compared to Cgs - In 0.18µ CMOS, C gd is about 45% the value of Cgs Input capacitance calculation - For 0.18µ CMOS, gain of 3, input cap is almost tripled over Cgs! M.H. Perrott MIT OCW Reduction of Cgd Impact Using a Cascode Device RL Vbias2 Zin C gd vin Vbias M2 vout CL M1 Rs Cgs The cascode device lowers the gain seen by Cgd of M1 - For 0.18m CMOS and gain of 3, impact of C by 30%: gd is reduced Issue: cascoding lowers achievable voltage swing M.H. Perrott MIT OCW Source-Coupled Amplifier RL vout Zin C gd vin Vbias M1 M2 2Ibias Remove impact of Miller effect by sending signal through source node rather than drain node -C Rs Cgd gd not Miller multiplied AND impact of Cgs cut in half! The bad news - Signal has to go through source node (C Power consumption doubled M.H. Perrott sb significant) MIT OCW Neutralization RL CN -1 Zin M1 CL Consider canceling the effect of Cgd - Choose C = C - Charging of C N vout Cgs Vbias Cgd Rs vin Id gd gd now provided by CN Benefit: Impact of Cgd removed Issues: - How do we create the inverting amplifier? - What happens if C is not precisely matched to C N M.H. Perrott gd? MIT OCW Practical Implementation of Neutralization CN RL RL Cgd vin Vbias Rs CN Cgd M2 M1 Rs -vin 2Ibias Leverage differential signaling to create an inverted signal Only issue left is matching CN to Cgd - Often use lateral metal caps for C (or CMOS transistor) - If C too low, residual influence of C - If C too high, input impedance has inductive component N N gd N Causes peaking in frequency response Often evaluate acceptable level of peaking using eye diagrams M.H. Perrott MIT OCW Shunt-peaked Amplifier Vdd Ld RL Id vin Vbias M1 vout Cfixed M2 Use inductor in load to extend bandwidth We can view impact of inductor in both time and frequency - Often implemented as a spiral inductor - In frequency: peaking of frequency response - In time: delay of changing current in R L Issue – can we extend bandwidth without significant peaking? M.H. Perrott MIT OCW Shunt-peaked Amplifier - Analysis Vdd Small Signal Model Ld Zout vout RL Id vin Vbias M1 Ld vout Cfixed Expression for gain Parameterize with iin=gmvin M2 Ctot RL - Corresponds to ratio of RC to LR time constants M.H. Perrott MIT OCW The Impact of Choosing Different Values of m – Part 1 Small Signal Model Parameterized gain expression Zout vout Comparison of new and old 3 dB frequencies Ld iin=gmvin Ctot RL Want to solve for w2/w1 M.H. Perrott MIT OCW The Impact of Choosing Different Values of m – Part 2 From previous slide, we have After much algebra We see that m directly sets the amount of bandwidth extension! - Once m is chosen, inductor value is M.H. Perrott MIT OCW Plot of Bandwidth Extension Versus m Bandwidth Extension (w /w ) Versus m 2 1 1.9 1.8 1.7 w1/w2 1.6 1.5 1.4 1.3 1.2 1.1 0 1 2 3 4 5 6 7 8 9 10 m Highest extension: w2/w1 = 1.85 at m ≈ 1.41 - However, peaking occurs! M.H. Perrott MIT OCW Plot of Transfer Function Versus m Maximum bandwidth: m = 1.41 (extension = 1.85) Maximally flat response: m = 2.41 (extension = 1.72) Best phase response: m = 3.1 (extension = 1.6) No peaking: m = infinity Eye diagrams often used to evaluate best m M.H. Perrott Normalized Gain (dB) Normalized Gain for Shunt Peaked Amplifier For Different m Values 5 m=1.41 m=2.41 0 m=3.1 m=infinity -5 -10 -15 -20 -25 -30 -35 -40 -45 1/100 1/10 1 10 100 Normalized Frequency (Hz) MIT OCW To Do Add eye diagrams M.H. Perrott MIT OCW Zero-peaked Common Source Amplifier vout vin Vdd RL Id M1 vout Cfixed M2 g mR L 1+gmRs zero 1 2πCsRs overall response vin Vbias Rs Cs f 1 2πCtotRL Inductors are expensive with respect to die area We can instead achieve bandwidth extension with capacitor - Idea: degenerate gain at low frequencies, remove degeneration at higher frequencies (i.e., create a zero) Issues: - Must increase R to keep same gain (lowers pole) - Lowers achievable gate voltage bias (lowers device f ) L t M.H. Perrott MIT OCW Back to Inductors – Shunt and Series Peaking Vdd vout vin RL -20 dB/dec L1 Id L2 vin Vbias M1 -40 dB/dec g mR L vout Cfixed M2 1 2πCtotRL f Combine shunt peaking with a series inductor - Bandwidth extension by converting to a second order filter response Can be designed for proper peaking Increases delay of amplifier M.H. Perrott MIT OCW T-Coil Bandwidth Enhancement Vdd RL Vdd RL L2 CB L1 L3 vin Vbias M1 Id L2 k vout Cfixed L1 vout vin M2 Vbias M1 Cfixed M2 Uses coupled inductors to realize T inductor network - Works best if capacitance at drain of M is much less than the capacitance being driven at the output load 1 See Chap. 8 of Tom Lee’s book (pp 187-191) for analysis See S. Galal, B. Ravazi, “10 Gb/s Limiting Amplifier and Laser/Modulator Driver in 0.18u CMOS”, ISSCC 2003, pp 188-189 and “Broadband ESD Protection …”, pp. 182-183 M.H. Perrott MIT OCW Bandwidth Enhancement With ft Doublers I1 I2 M1 vin Vbias 2Ibias A MOS transistor has ft calculated as ft doubler amplifiers attempt to increase the ratio of transconductance to capacitance M2 We can make the argument that differential amplifiers are ft doublers - Capacitance seen by V - Difference in current: in M.H. Perrott for single-ended input: Transconductance to Cap ratio is doubled: MIT OCW Creating a Single-Ended Output Io I1 I2 M1 vin M2 M1 vin Vbias 2Ibias M2 Vbias Ibias Ibias Input voltage is again dropped across two transistors - Ratio given by voltage divider in capacitance Ideally is ½ of input voltage on Cgs of each device Input voltage source sees the series combination of the capacitances of each device - Ideally sees ½ of the C gs of M1 Currents of each device add to ideally yield ratio: M.H. Perrott MIT OCW Creating the Bias for M2 M1 vin M2 M1 vin Vbias M2 Vbias 2Ibias Io Io I1 I2 Ibias Ibias vin Vbias M1 M2 Use current mirror for bias Need to set Vbias such that current through M1 has the desired current of Ibias Ibias M3 - Inspired by bipolar circuits (see Tom Lee’s book, page 198) - The current through M 2 will ideally match that of M1 Problem: achievable bias voltage across M1 (and M2) is severely reduced (thereby reducing effective ft of device) - Do f doublers have an advantage in CMOS? t M.H. Perrott MIT OCW Increasing Gain-Bandwidth Product Through Cascading vin Amp Amp Cfixed vin A 1 + s/wo Amp vout Cfixed A 1 + s/wo vout A 1 + s/wo We can significantly increase the gain of an amplifier by cascading n stages - Issue – bandwidth degrades, but by how much? M.H. Perrott MIT OCW Analytical Derivation of Overall Bandwidth The overall 3-db bandwidth of the amplifier is where - w is the overall bandwidth - A and w are the gain and bandwidth of each section 1 o - Bandwidth decreases much slower than gain increases! Overall gain bandwidth product of amp can be increased! M.H. Perrott MIT OCW Transfer Function for Cascaded Sections 0 -3 Normalized Transfer Function for Cascaded Sections -10 n=1 Normalized Gain (dB) -20 -30 n=2 -40 -50 n=3 -60 -70 -80 1/100 M.H. Perrott n=4 1/10 1 Normalized Frequency (Hz) 10 100 MIT OCW Choosing the Optimal Number of Stages To first order, there is a constant gain-bandwidth product for each stage - Increasing the bandwidth of each stage requires that we lower its gain - Can make up for lost gain by cascading more stages We found that the overall bandwidth is calculated as Assume that we want to achieve gain G with n stages From this, Tom Lee finds optimum gain ≈ 1.65 - See Tom Lee’s book, pp 207-211 M.H. Perrott MIT OCW Achievable Bandwidth Versus G and n Achievable Bandwidth (Normalized to f t ) Versus Gain (G) and Number of Stages (n) 0.3 - Note than gain per stage derived from plot as 0.25 G=10 0.2 w1/wt G=100 0.15 - Maximum is fairly G=1000 A=1.65 0.1 A=3 0.05 0 Optimum gain per stage is about 1.65 0 M.H. Perrott 5 10 15 n 20 25 soft, though Can dramatically lower power (and improve noise) by using larger gain per stage 30 MIT OCW Motivation for Distributed Amplifiers RL=Z0 vout M1 Rs=Z0 Cin M2 Cin Cout Cout Cout M3 Cin vin We achieve higher gain for a given load resistance by increasing the device size (i.e., increase gm) - Increased capacitance lowers bandwidth We therefore get a relatively constant gain-bandwidth product We know that transmission lines have (ideally) infinite bandwidth, but can be modeled as LC networks - Can we lump device capacitances into transmission line? M.H. Perrott MIT OCW Distributing the Input Capacitance RL=Z0 vout delay Rs=Z0 Zo Cout Cout Cout M1 M2 M3 Zo Zo Zo vin RL=Z0 Lump input capacitance into LC network corresponding to a transmission line - Signal ideally sees a real impedance rather than an RC lowpass - Often implemented as lumped networks such as T-coils - We can now trade delay (rather than bandwidth) for gain Issue: outputs are delayed from each other M.H. Perrott MIT OCW Distributing the Output Capacitance delay RL=Z0 RL=Z0 Zo delay Rs=Z0 vin Zo Zo Zo Zo M1 M2 M3 Zo Zo Zo vout RL=Z0 Delay the outputs same amount as the inputs Benefit – high bandwidth Negatives – high power, poorer noise performance, expensive in terms of chip area - Now the signals match up - We have also distributed the output capacitance! - Each transistor gain is adding rather than multiplying! M.H. Perrott MIT OCW Narrowband Amplifiers package die Connector Controlled Impedance PCB trace Matching Network Driving Source Z1 Vin On-Chip Delay = x Characteristic Impedance = Zo Transmission Line L1 Matching Network Amp C1 C2 RL Vout VL For wireless systems, we are interested in conditioning and amplifying the signal over a narrow frequency range centered at a high frequency - Allows us to apply narrowband transformers to create matching networks Can we take advantage of this fact when designing the amplifier? M.H. Perrott MIT OCW Tuned Amplifiers Vdd LT RL vout CL vin Rs M1 Vbias Put inductor in parallel across RL to create bandpass filter - It will turn out that the gain-bandwidth product is roughly conserved regardless of the center frequency! Assumes that center frequency (in Hz) << ft To see this and other design issues, we must look closer at the parallel resonant circuit M.H. Perrott MIT OCW Tuned Amp Transfer Function About Resonance Cp iin=gmvin Lp Rp Ztank Amplifier transfer function Note that conductances add in parallel vout Evaluate at s = jw Look at frequencies about resonance: M.H. Perrott MIT OCW Tuned Amp Transfer Function About Resonance (Cont.) From previous slide =0 Simplifies to RC circuit for bandwidth calculation! vout vin Cp Lp Rp vout g mR p 1 R pC p slope = -20 dB/dec wo iin=gmvin M.H. Perrott Ztank 1 Rp2Cp w 1 Rp2Cp MIT OCW Gain-Bandwidth Product for Tuned Amplifiers vout vin Cp Lp Rp vout g mR p 1 R pC p slope = -20 dB/dec wo iin=gmvin Ztank 1 Rp2Cp w 1 Rp2Cp The gain-bandwidth product: The above expression is independent of center frequency! - In practice, we need to operate at a frequency less than the ft of the device M.H. Perrott MIT OCW The Issue of Q vout vin Cp Lp Rp vout g mR p 1 R pC p slope = -20 dB/dec wo iin=gmvin Ztank 1 Rp2Cp w 1 Rp2Cp By definition For parallel tank (see Tom Lee’s book, pp 88-89) Comparing to above: M.H. Perrott MIT OCW Design of Tuned Amplifiers vout vin Cp Lp Rp g mR p vout 1 R pC p slope = -20 dB/dec wo iin=gmvin Ztank 1 Rp2Cp w 1 Rp2Cp Three key parameters - Gain = g R - Center frequency = w - Q = w /BW Impact of high Q - Benefit: allows achievement of high gain with low power - Problem: makes circuit sensitive to process/temp m p o o variations M.H. Perrott MIT OCW Issue: Cgd Can Cause Undesired Oscillation Vdd LT RL vout CL Zin C gd vin Vbias M1 Rs Cgs At frequencies below resonance, tank looks inductive M.H. Perrott Negative Resistance! MIT OCW Use Cascode Device to Remove Impact of Cgd Vdd LT RL vout Vbias2 Zin C gd vin CL M1 Rs Vbias M2 Cgs At frequencies above and below resonance Purely Capacitive! M.H. Perrott MIT OCW Active Real Impedance Generator Zin Vin Cf Av(s) Vout Av(s) = -Aoe-jΦ Input impedance: Resistive component! M.H. Perrott MIT OCW This Principle Can Be Applied To Impedance Matching Zin vin Iout M1 Rs Ls Vbias We will see that it’s advantageous to make Zin real without using resistors - For the above circuit (ignoring C gd) Itest Vtest C gs vgs gmvgs Ls M.H. Perrott Looks like series resonant circuit! MIT OCW Use A Series Inductor to Tune Resonant Frequency Zin vin Zin Iout Lg M1 Rs vin Ls Vbias Iout Rs M1 Vbias Ls Calculate input impedance with added inductor Often want purely resistive component at frequency wo - Choose L g M.H. Perrott such that resonant frequency = wo MIT OCW
