THS4130, THS4131
HIGH-SPEED, LOW NOISE, FULLY-DIFFERENTIAL I/O AMPLIFIERS
SLOS318D – MAY 2000 – REVISED MARCH 2001
features
D
D
D
D
D
key applications
High Performance
D Single-Ended To Differential Conversion
– 150 MHz –3 dB Bandwidth (VCC = ± 15 V)
D Differential ADC Driver
– 51 V/µs Slew Rate
D Differential Antialiasing
– – 100 dB Third Harmonic Distortion at
D Differential Transmitter And Receiver
250 kHz
D Output Level Shifter
Low Noise
– 1.3 nV/√Hz Input-Referred Noise
Differential-Input/Differential-Output
THS4130
THS4131
– Balanced Outputs Reject Common-Mode
D OR DGN PACKAGE
D OR DGN PACKAGE
Noise
(TOP VIEW)
(TOP VIEW)
– Reduced Second Harmonic Distortion
VIN–
VIN+
VIN–
VIN+
1
8
1
8
Due to Differential Output
VOCM
PD
VOCM
NC
2
7
2
7
Wide Power Supply Range
VCC–
VCC+
VCC–
VCC+
3
6
3
6
– VCC = 5 V Single Supply to ± 15 V Dual
VOUT+
VOUT– VOUT+
VOUT–
4
5
4
5
Supply
ICC(SD) = 860 µA in Shutdown Mode
(THS4130)
HIGH-SPEED DIFFERENTIAL I/O FAMILY
description
The THS413x is one in a family of fully-differential
input/differential output devices fabricated using
Texas Instruments’ state-of-the-art BiComI
complementary bipolar process.
The THS413x is made of a true fully-differential
signal path from input to output. This design leads
to an excellent common-mode noise rejection and
improved total harmonic distortion.
THD – Total Harmonic Distortion – dB
DESCRIPTION
THS412x
100 MHz, 43 V/µs, 3.7 nV/√Hz
THS414x
160 MHz, 450 V/µs, 6.5 nV/√Hz
THS415x
180 MHz, 850 V/µs, 9 nV/√Hz
VDD
5V
VOCM
+
–
THS4130
1
X
THS4131
1
–
SHUTDOWN
–20
typical A/D application circuit
VIN
NUMBER OF
CHANNELS
TOTAL HARMONIC DISTORTION
vs
FREQUENCY
RELATED DEVICES
DEVICE
DEVICE
–
AVDD DVDD
AIN
+
AIN
AVSS
Vref
DIGITAL
OUTPUT
–5 V
–30
VOUT = 2 VPP
–40
–50
–60
–70
VCC = 5 V to ± 5 V
–80
–90
–100
100k
VCC = ± 15 V
1M
f – Frequency – Hz
10M
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright  2001, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
THS4130, THS4131
HIGH-SPEED, LOW NOISE, FULLY-DIFFERENTIAL I/O AMPLIFIERS
SLOS318D – MAY 2000 – REVISED MARCH 2001
AVAILABLE OPTIONS
PACKAGED DEVICES
TA
MSOP
CODES
EVALUATION
MODULES
THS4130CDGN
THS4131CDGN
AOB
AOD
THS4130EVM
THS4131EVM
THS4130IDGN
THS4131IDGN
AOC
AOE
–
–
SMALL OUTLINE
(D)
MSOP PowerPAD
(DGN)
0°C to 70°C
THS4130CD
THS4131CD
–40°C to 85°C
THS4130ID
THS4131ID
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VCC– to VCC+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 33 V
Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± VCC
Output current, IO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150 mA
Differential input voltage, VID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 6 V
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating free-air temperature, TA:C suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
I suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 85°C
Storage temperature, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
Lead temperature 1,6 mm (1/16 Inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The THS413x may incorporate a PowerPad on the underside of the chip. This acts as a heatsink and must be connected to a thermally
dissipative plane for proper power dissipation. Failure to do so may result in exceeding the maximum junction temperature which could
permanently damage the device. See TI technical brief SLMA002 and SLMA004 for more information about utilizing the PowerPad
thermally enhanced package.
DISSIPATION RATING TABLE
PACKAGE
θJA
(°C/W)
θJC
(°C/W)
25°C
TA = 25
C
POWER RATING
D
167‡
38.3
740 mW
DGN§
58.4
4.7
2.14 W
‡ This data was taken using the JEDEC standard Low-K test PCB. For the JEDEC Proposed
High-K test PCB, the θJA is 95°C/W with a power rating at TA = 25°C of 1.32 W.
§ This data was taken using 2 oz. trace and copper pad that is soldered directly to a 3 in. × 3 in.
PC.
recommended operating conditions
MIN
Supply voltage, VCC+ to VCC–
Operating free-air temperature, TA
Dual supply
Single supply
C suffix
I suffix
PowerPAD is a trademark of Texas Instruments.
2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TYP
MAX
± 2.5
± 15
5
30
0
70
– 40
85
UNIT
V
°C
THS4130, THS4131
HIGH-SPEED, LOW NOISE, FULLY-DIFFERENTIAL I/O AMPLIFIERS
SLOS318D – MAY 2000 – REVISED MARCH 2001
electrical characteristics, VCC = ±5 V, RL = 800 Ω, TA = 25°C (unless otherwise noted)†
dynamic performance
PARAMETER
TEST CONDITIONS
Small signal bandwidth (– 3 dB),
Single ended input, differential output, VI = 63 mVPP
BW
Small signal bandwidth (– 3 dB),
Single ended input, differential output, VI = 63 mVPP
SR
ts
Slew rate (see Note 2)
VCC = 5
VCC = ± 5
VCC = ± 15
VCC = 5
VCC = ± 5
VCC = ± 15
MIN
125
Gain = 1, Rf = 390 Ω
Gain = 1, Rf = 390 Ω
135
Gain = 2, Rf = 750 Ω
Gain = 2, Rf = 750 Ω
80
Gain = 2, Rf = 750 Ω
90
MAX
150
UNIT
MHz
85
Gain = 1
Settling time to 0.1%
TYP
Gain = 1, Rf = 390 Ω
Step voltage = 2 V, Gain = 1
Settling time to 0.01%
† The full range temperature is 0°C to 70°C for the C suffix, and –40°C to 85°C for the I suffix.
NOTE 2: Slew rate is measured from an output level range of 25% to 75%.
52
V/µs
78
ns
213
ns
distortion performance
PARAMETER
TEST CONDITIONS
VCC = 5
Total harmonic distortion,
Differential input, differential output,
Gain = 1, Rf = 390 Ω, RL = 800 Ω, VO = 2 VPP
VCC = ±5
VCC = ±15
THD
VCC = ±5
VO = 4 VPP
VCC = ±15
MIN
TYP
f = 250 kHz
– 95
f = 1 MHz
– 81
f = 250 kHz
– 96
f = 1 MHz
– 80
f = 250 kHz
– 97
f = 1 MHz
– 80
f = 250 kHz
– 91
f = 1 MHz
– 75
f = 250 kHz
– 91
f = 1 MHz
– 75
VCC = ± 2.5
VCC = ± 5
97
VCC = ± 15
VCC = ± 5
99
95
Third intermodulation distortion
VI(PP) = 4 V,
F1 = 3 MHz,
VCC = ± 15
G = 1,
F2 = 3.5 MHz
Third order intercept
VI(PP) = 4 V,
F1 = 3 MHz,
G = 1,
F2 = 3.5 MHz
Spurious free dynamic range (SFDR),
Differential input, differential output,
Gain = 1, Rf = 390 Ω,, RL = 800 Ω, f = 250 kHz
VO = 2 Vpp
VO = 4 Vpp
MAX
UNIT
dBc
98
dB
93
– 53
dBc
41.5
dB
† The full range temperature is 0°C to 70°C for the C suffix, and –40°C to 85°C for the I suffix.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
3
THS4130, THS4131
HIGH-SPEED, LOW NOISE, FULLY-DIFFERENTIAL I/O AMPLIFIERS
SLOS318D – MAY 2000 – REVISED MARCH 2001
electrical characteristics, VCC = ±5 V, RL = 800 Ω, TA = 25°C (unless otherwise noted) (continued)†
noise performance
PARAMETER
TEST CONDITIONS
MIN
TYP
Vn
Input voltage noise
f = 10 kHz
In
Input current noise
f = 10 kHz
† The full range temperature is 0°C to 70°C for the C suffix, and –40°C to 85°C for the I suffix.
MAX
UNIT
1.3
nV/√Hz
1
pA/√Hz
dc performance
PARAMETER
TEST CONDITIONS
Open loop gain
IIB
IOS
TYP
71
MAX
78
0.2
TA = 25°C
TA = full range
0.2
Input offset voltage drift
Input bias current
TA = full range
2
6
100
500
Common mode input offset voltage, referred to VOCM
Input offset current
2
3
mV
3.5
µV/°C
4.5
TA = full range
Offset drift
UNIT
dB
69
TA = 25°C
TA = full range
Input offset voltage
V(OS)
MIN
TA = 25°C
TA = full range
2
µA
nA
nA/°C
† The full range temperature is 0°C to 70°C for the C suffix, and –40°C to 85°C for the I suffix.
input characteristics
PARAMETER
CMRR
Common-mode rejection ratio
VICR
Common-mode input voltage range
RI
Input resistance
CI
Input capacitance, closed loop
TEST CONDITIONS
MIN
TA = full range
TYP
MAX
UNIT
80
95
dB
– 3.77
to 4.3
– 4 to
4.5
V
Measured into each input terminal
ro
Output resistance
Open loop
† The full range temperature is 0°C to 70°C for the C suffix, and –40°C to 85°C for the I suffix.
34
MΩ
4
pF
41
Ω
output characteristics
PARAMETER
Output voltage swing
IO
Output current
TEST CONDITIONS
MIN
TYP
VCC = 5 V
TA = 25°C
TA = full range
1.2 to 3.8
0.9 to 4.1
VCC = ± 5 V
TA = 25°C
TA = full range
± 3.7
VCC = ± 15 V
TA = 25°C
TA = full range
± 10.5
VCC = 5 V,
RL = 7 Ω
TA = 25°C
TA = full range
25
VCC = ± 5 V,
RL = 7 Ω
TA = 25°C
TA = full range
30
VCC = ± 15 V,
RL = 7 Ω
TA = 25°C
TA = full range
60
† The full range temperature is 0°C to 70°C for the C suffix, and –40°C to 85°C for the I suffix.
4
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MAX
UNIT
1.3 to 3.7
±4
± 3.6
V
± 12.4
± 10.2
45
20
55
28
50
85
mA
THS4130, THS4131
HIGH-SPEED, LOW NOISE, FULLY-DIFFERENTIAL I/O AMPLIFIERS
SLOS318D – MAY 2000 – REVISED MARCH 2001
electrical characteristics, VCC = ±5 V, RL = 800 Ω, TA = 25°C (unless otherwise noted) (continued)†
power supply
PARAMETER
VCC
Supply voltage range
ICC
Quiescent current
TEST CONDITIONS
MIN
Single supply
Split supply
VCC = ± 15 V
ICC(SD)
Quiescent current (shutdown) (THS4130 only)
PSRR
Power supply rejection ratio (dc)
VPD = –5 V
±2
± 16.5
12.3
TA = full range
† The full range temperature is 0°C to 70°C for the C suffix, and –40°C to 85°C for the I suffix.
UNIT
V
15
16
TA = 25°C
TA = 25°C
TA = full range
TA = 25°C
MAX
33
TA = 25°C
TA = full range
VCC = ± 5 V
TYP
4
mA
14
0.86
1.4
1.5
73
70
98
mA
dB
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
Small signal frequency response
CMMR
1, 2
Small signal frequency response (various supplies)
3
Small signal frequency response (various CF)
4
Small signal frequency response (various CL)
5
Large signal transient response (differential in/single out)
6
Large signal frequency response
7
Common mode rejection ratio
ICC
Supply current
IIB
Input bias current
vs Frequency
9
vs Free-air temperature (shutdown state)
10
vs Free-air temperature
Settling time
PSRR
11
12
Power supply rejection ratio
vs Frequency (differential out)
Large signal transient response
THD
8
vs Free-air temperature
13
14
Total harmonic distortion
Second harmonic distortion
Third harmonic distortion
vs Frequency
15
vs Frequency
16, 17
vs Output voltage
18, 19
vs Frequency
20, 21
vs Output voltage
22, 23
Vn
In
Voltage noise
vs Frequency
24
Current noise
vs Frequency
25
V(OS)
VO
Input offset voltage
vs Common-mode output voltage
26
Output voltage
vs Differential load resistance
27
zo
Output impedance
vs Frequency
28
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
5
THS4130, THS4131
HIGH-SPEED, LOW NOISE, FULLY-DIFFERENTIAL I/O AMPLIFIERS
SLOS318D – MAY 2000 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
SMALL SIGNAL FREQUENCY RESPONSE
SMALL SIGNAL FREQUENCY RESPONSE
25
Output –dB
15
2
1
Gain = 5_Rf = 2 kΩ
Rf = 620 Ω
Gain = 1,
RL = 800 Ω,
VCC = ± 5 V,
VI = 63 mVPP
0
Output – dB
20
3
RL = 800 Ω,
VCC = ± 5 V,
VI = 63 mVPP
Gain = 10_Rf = 4 kΩ
10
Gain = 2_Rf = 750 Ω
5
–1
Rf = 390 Ω
–2
–3
–4
Gain = 1_Rf = 390 Ω
0
–5
–5
–6
–7
–10
100 k
1M
10 M
100 M
f – Frequency – Hz
–8
100 k
1G
1M
Figure 1
10 M
100 M
f – Frequency – Hz
Figure 2
SMALL SIGNAL FREQUENCY RESPONSE
(VARIOUS SUPPLIES)
SMALL SIGNAL FREQUENCY RESPONSE
(VARIOUS CF)
2
3
VCC= ± 15
1
2
CF = 0 pF
1
0
0
VCC= 5
–1
Output – dB
Output – dB
–1
–2
–3
–4
–7
–2
–3
–6
Gain = 1,
RL = 800 Ω,
Rf = 390 Ω,
VI = 63 mVPP
–8
100 k
1M
–7
–8
–9
10 M
100 M
f – Frequency – Hz
1G
–10
100 k
Figure 3
6
CF = 1 pF
–4
–5
–5
–6
1G
1M
10 M
100 M
f – Frequency – Hz
Figure 4
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1G
THS4130, THS4131
HIGH-SPEED, LOW NOISE, FULLY-DIFFERENTIAL I/O AMPLIFIERS
SLOS318D – MAY 2000 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
SMALL SIGNAL FREQUENCY RESPONSE
(VARIOUS CL)
LARGE SIGNAL TRANSIENT RESPONSE
(DIFFERENTIAL IN/SINGLE OUT)
5
3
2
Output – dB
1
1
Gain = 1,
RL = 800 Ω,
VCC = ± 5 V,
VI = 63 mVPP,
Rf = 390 Ω
CL = 10 pF
Large Signal Transient Response – V
4
–0
CL = 0 pF
–1
–2
–3
–4
–5
–6
VO+
0.5
0
VO–
–0.5
0.5
0
VI (Diff)
–0.5
–7
–8
100 k
1M
10 M
100 M
f – Frequency – Hz
–1
1G
0
0.1
0.2
0.6
COMMON MODE REJECTION RATIO
vs
FREQUENCY
LARGE SIGNAL FREQUENCY RESPONSE
–50
CMRR – Common Mode Rejection Ratio – dB
5
VCC = ± 15 V
0
–5
Output – dB
0.5
Figure 6
Figure 5
–10
VCC = ± 5 V
–15
–20
0.4
0.3
t – Time – µs
Gain = 1
Rf = 390 Ω,
RL = 800 Ω,
CF = 0 pF,
VI = 0.2 VRMS
–25
100 k
1M
VCC = 5 V
10 M
100 M
1G
–55
Rf = 1 kΩ,
VCC = ± 5 V
–60
–65
–70
–75
–80
–85
–90
–95
–100
100 k
f – Frequency – Hz
Figure 7
1M
10 M
f – Frequency – Hz
100 M
Figure 8
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
7
THS4130, THS4131
HIGH-SPEED, LOW NOISE, FULLY-DIFFERENTIAL I/O AMPLIFIERS
SLOS318D – MAY 2000 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE
(SHUTDOWN STATE)
SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE
15
940
14.5
920
VCC = ± 15 V
I CC – Supply Current – µ A
I CC – Supply Current – mA
14
13.5
13
12.5
VCC = ± 5 V
12
11.5
900
880
860
840
11
820
10.5
10
–40
–20
0
20
40
60
80
800
–50
–25
0
25
50
75
100
TA – Free-Air Temperature (Shutdown State) – °C
100
TA – Free-Air Temperature – °C
Figure 9
Figure 10
SETTLING TIME
2.4
2.04
2.35
2.02
VO – Output Voltage – V
IIB– Input Bias Current – µ A
INPUT BIAS CURRENT
vs
FREE-AIR TEMPERATURE
2.3
IIB+
2.25
2.2
2.15
2
RF = 510 Ω
CF = 1 pF,
VCC = 5 V
VO = 4 VPP
RL = 800 Ω
1.98
1.96
1.94
IIB–
2.1
2.05
–50
1.92
–25
0
25
50
75
TA – Free-Air Temperature – °C
100
1.9
0
Figure 11
8
25
50
75
100
t – Time – ns
Figure 12
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
125
150
THS4130, THS4131
HIGH-SPEED, LOW NOISE, FULLY-DIFFERENTIAL I/O AMPLIFIERS
SLOS318D – MAY 2000 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
POWER SUPPLY REJECTION RATIO
vs
FREQUENCY (DIFFERENTIAL OUT)
LARGE SIGNAL TRANSIENT RESPONSE
2.5
VO+
2
1.5
VO – Output Voltage – V
–50
Gain = 1,
Rf = 330 Ω,
RL = 400 Ω
–60
VCC = 5 V
–70
–80
VCC = – 5 V
G = 1,
Rf = 390 Ω,
RL = 800 Ω,
CF = 0 pF,
CL = 10 pF,
VI_Peak = 2 V,
VCC = ± 15 V
TA = 25°C
1
5
0
–5
–1
–1.5
–90
–2
–100
10 k
VO–
–2.5
100 k
1M
10 M
f – Frequency (Differential Out) – Hz
100 M
0
40
80
120
160
200
t – Time – nS
Figure 13
Figure 14
TOTAL HARMONIC DISTORTION
vs
FREQUENCY
–20
THD – Total Harmonic Distortion – dB
PSRR – Power Supply Rejection Ratio – dB
–40
–30
VOUT = 2 VPP
–40
–50
–60
VCC = 5 V to ± 5 V
–70
–80
VCC = ± 15 V
–90
–100
100k
1M
f – Frequency – Hz
10M
Figure 15
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
9
THS4130, THS4131
HIGH-SPEED, LOW NOISE, FULLY-DIFFERENTIAL I/O AMPLIFIERS
SLOS318D – MAY 2000 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
SECOND HARMONIC DISTORTION
vs
FREQUENCY
SECOND HARMONIC DISTORTION
vs
FREQUENCY
–30
–30
Second Harmonic Distortion – dBc
–40
Single Ended Input
Differential Output
Second Harmonic Distortion – dBc
VO = 2 VPP,
RL = 800 Ω,
Rf = 390 Ω,
G=1
–50
–60
VCC = 5 V
–70
–80
–90
–40
–50
VCC = ± 5 V
–60
–70
–80
VCC = ± 15 V
–90
–100
–100
VCC = ± 15V, ± 5V
–110
100 k
1M
f – Frequency – Hz
–110
100 k
10 M
1M
f – Frequency – Hz
SECOND HARMONIC DISTORTION
vs
OUTPUT VOLTAGE
SECOND HARMONIC DISTORTION
vs
OUTPUT VOLTAGE
–88
–92
Second Harmonic Distortion – dBc
–96
VCC = ±15 V
VCC = ± 5 V
–90
Second Harmonic Distortion – dBc
f = 250 KHz
RL = 800 Ω,
Rf = 390 Ω,
G=1
–94
VCC = 5 V
–98
VCC = ± 15 V
–100
–102
–104
Single Ended Input
Differential Output
–92
–94
VCC = ± 5 V
–96
–98
VCC = 5 V
–100
–102
Single Ended Input
Differential Output
–104
–106
0
1
2
3
4
5
VO – Output Voltage – V
6
7
0
1
Figure 18
10
10 M
Figure 17
Figure 16
–106
Single Ended Input
Differential Output
VO = 4 VPP,
RL = 800 Ω,
Rf = 390 Ω,
G=1
2
3
4
5
VO – Output Voltage – V
Figure 19
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
f = 500 KHz
RL = 800 Ω,
Rf = 390 Ω,
G=1
6
7
THS4130, THS4131
HIGH-SPEED, LOW NOISE, FULLY-DIFFERENTIAL I/O AMPLIFIERS
SLOS318D – MAY 2000 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
THIRD HARMONIC DISTORTION
vs
FREQUENCY
THIRD HARMONIC DISTORTION
vs
FREQUENCY
–30
–50
VCC = ± 5 V
–60
VCC = ± 15 V
–70
–80
–90
–100
1M
f – Frequency – Hz
–50
–60
Single Ended Input
Differential Output
–70
VCC = ± 15 V
–80
VCC = ± 5 V
–90
VCC = 5 V
–100
Single Ended Input
Differential Output
–110
100 k
VO = 2 VPP,
RL = 800 Ω,
Rf = 390 Ω,
Gain = 1
–40
Third Harmonic Distortion – dBc
–40
Third Harmonic Distortion – dBc
–30
VO = 4 VPP
RL = 800 Ω,
Rf = 390 Ω,
G=1
–110
100 k
10 M
1M
f – Frequency – Hz
Figure 20
Figure 21
THIRD HARMONIC DISTORTION
vs
OUTPUT VOLTAGE
THIRD HARMONIC DISTORTION
vs
OUTPUT VOLTAGE
–88
–88
VCC = ± 15 V
–92
–94
VCC = ± 5 V
–96
VCC = 5 V
–98
f = 500 KHz
RL = 800 Ω,
Rf = 390 Ω,
G=1
–100
–102
–104
–106
1
2
3
4
5
6
–92
7
VCC = ± 5 V
–94
–96
VCC = 5 V
–98
VCC = ± 15 V
–100
–102
–104
Single Ended Input
Differential Output
0
f = 250 KHz
RL = 800 Ω,
Rf = 390 Ω,
G=1
–90
Third Harmonic Distortion – dBc
–90
Third Harmonic Distortion – dBc
10 M
–106
Single Ended Input
Differential Output
0
1
VO – Output Voltage – V
2
3
4
5
VO – Output Voltage – V
6
7
Figure 23
Figure 22
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
11
THS4130, THS4131
HIGH-SPEED, LOW NOISE, FULLY-DIFFERENTIAL I/O AMPLIFIERS
SLOS318D – MAY 2000 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
VOLTAGE NOISE
vs
FREQUENCY
Vn – Voltage Noise – nV/ Hz
10
1
10
100
1k
10 k
100 k
f – Frequency – Hz
Figure 24
CURRENT NOISE
vs
FREQUENCY
INPUT OFFSET VOLTAGE
vs
COMMON-MODE OUTPUT VOLTAGE
7E–12
1000
V(OS) – Input Offset Voltage – µ V
I n – Current Noise – pA/ Hz
6E–12
5E–12
4E–12
3E–12
2E–12
1E–12
0
800
Rf = 1 k,
RL = 800 Ω,
G=1
600
400
200
VCC = ± 5 V
0
VCC = ± 15 V
–200
–400
1
10
100
1k
f – Frequency – Hz
10 k
100 k
–600
–12
–9
–6
–3
0
3
6
9
VOCM – Common-Mode Output Voltage – V
Figure 25
12
VCC = ± 2.5 V
Figure 26
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
12
THS4130, THS4131
HIGH-SPEED, LOW NOISE, FULLY-DIFFERENTIAL I/O AMPLIFIERS
SLOS318D – MAY 2000 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
OUTPUT VOLTAGE
vs
DIFFERENTIAL LOAD RESISTANCE
OUTPUT IMPEDANCE
vs
FREQUENCY
15
100
Rf = 1 k
G=2
5
VOUT+
VCC = ± 5 V
VOUT–
VCC = ± 5 V
0
–5
–10
VCC = ± 5 V
VOUT+
zo – Output impedance – Ω
VO – Output Voltage – V
10
VCC = ± 15 V
VOUT–
10
1
VCC = ± 15 V
–15
100
1000
10 k
RL – Differential Load Resistance – Ω
100 k
0.1
100 k
1M
10 M
100 M
1G
f – Frequency – Hz
Figure 27
Figure 28
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
13
THS4130, THS4131
HIGH-SPEED, LOW NOISE, FULLY-DIFFERENTIAL I/O AMPLIFIERS
SLOS318D – MAY 2000 – REVISED MARCH 2001
APPLICATION INFORMATION
resistor matching
Resistor matching is important in fully differential amplifiers. The balance of the output on the reference voltage
depends on matched ratios of the resistor. CMRR, PSRR, and cancellation of the second harmonic distortion
will diminish if resistor mismatch occurs. Therefore, it is recommended to use 1% tolerance resistors or better
to keep the performance optimized.
VOCM sets the dc level of the output signals. If no voltage is applied to the VOCM pin, it will be set to the midrail
voltage internally defined as:
ǒV
CC
Ǔ
)
)
ǒV
CC–
Ǔ
2
In the differential mode, the VOCM on the two outputs cancel each other. Therefore, the output in the differential
mode is the same as the input in the gain of 1. VOCM has a high bandwidth capability up to the typical operation
range of the amplifier. For the prevention of noise going through the device, use a 0.1 µF capacitor on the VOCM
pin as a bypass capacitor. The following graph shows the simplified diagram of the THS413x.
VCC+
Output Buffer
VIN–
x1
VOUT+
C
VIN+
Vcm Error
Amplifier
+
_
C
x1
Output Buffer
VCC+
30 kΩ
30 kΩ
VCC–
VCC–
VOCM
Figure 29. THS413x Simplified Diagram
14
R
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
R
VOUT–
THS4130, THS4131
HIGH-SPEED, LOW NOISE, FULLY-DIFFERENTIAL I/O AMPLIFIERS
SLOS318D – MAY 2000 – REVISED MARCH 2001
APPLICATION INFORMATION
data converters
Data converters are one of the most popular applications for the fully differential amplifiers. The following
schematic shows a typical configuration of a fully differential amplifier attached to a differential ADC.
VDD
VCC
5V
VIN
+
–
AVDD
AIN1
–
+
AIN2
AVSS
VOCM
0.1 µF
DVDD
Vref
–5 V
VCC–
Figure 30. Fully Differential Amplifier Attached to a Differential ADC
Fully differential amplifiers can operate with a single supply. VOCM defaults to the midrail voltage, VCC/2. The
differential output may be fed into a data converter. This method eliminates the use of a transformer in the circuit.
If the ADC has a reference voltage output (Vref), then it is recommended to connect it directly to the VOCM of
the amplifier using a bypass capacitor for stability. For proper operation, the input common-mode voltage to the
input terminal of the amplifier should not exceed the common-mode input voltage range.
VDD
VCC
5V
VIN
+
–
AVDD
AIN1
–
+
AIN2
AVSS
VOCM
0.1 µF
DVDD
Vref
Figure 31. Fully Differential Amplifier Using a Single Supply
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
15
THS4130, THS4131
HIGH-SPEED, LOW NOISE, FULLY-DIFFERENTIAL I/O AMPLIFIERS
SLOS318D – MAY 2000 – REVISED MARCH 2001
APPLICATION INFORMATION
data converters (continued)
Some single supply applications may require the input voltage to exceed the common-mode input voltage
range. In such cases, the following circuit configuration is suggested to bring the common-mode input voltage
within the specifications of the amplifier.
VDD
VCC
VCC
RPU
Rg
VIN
0.1 µF
Rf
5V
VP V
OCM
Rg
VOUT
+
–
–
+
VOUT
RPU
VCC
AVDD DVDD
AIN1
THS1206
AIN2
Vref
AVSS
Rf
Figure 32. Circuit With Improved Common-Mode Input Voltage
The following equation is used to calculate RPU:
R
+
PU
ǒ
Ǔ
V
P
1
V – V
IN
P RG
ǒ
– V
)
CC
V
OUT
– V
Ǔ
1
P RF
driving a capacitive load
Driving capacitive loads with high performance amplifiers is not a problem as long as certain precautions are
taken. The first is to realize that the THS413x has been internally compensated to maximize its bandwidth and
slew rate performance. When the amplifier is compensated in this manner, capacitive loading directly on the
output will decrease the device’s phase margin leading to high frequency ringing or oscillations. Therefore, for
capacitive loads of greater than 10 pF, it is recommended that a resistor be placed in series with the output of
the amplifier, as shown in Figure 33. A minimum value of 20 Ω should work well for most applications. For
example, in 50-Ω transmission systems, setting the series resistor value to 50 Ω both isolates any capacitance
loading and provides the proper line impedance matching at the source end.
390 Ω
20 Ω
390 Ω
Output
THS413x
20 Ω
390 Ω
Output
390 Ω
Figure 33. Driving a Capacitive Load
16
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
THS4130, THS4131
HIGH-SPEED, LOW NOISE, FULLY-DIFFERENTIAL I/O AMPLIFIERS
SLOS318D – MAY 2000 – REVISED MARCH 2001
APPLICATION INFORMATION
Active antialias filtering
For signal conditioning in ADC applications, it is important to limit the input frequency to the ADC. Low-pass
filters can prevent the aliasing of the high frequency noise with the frequency of operation. The following figure
presents a method by which the noise may be filtered in the THS413x.
R2
C1
VCC
R4
+
R1
–
VIN–
+
VIN+
R(t)
THS413x
–
+
C2
Vs
C3
R3
VIN+
R1
THS1050
VIN–
VOCM
VOCM
R3
C3
VIC
R4
VCC–
+
C1
R2
Figure 34. Antialias Filtering
ȡȧ
+
Ȣǒ
ȣȧ ȡ
ȧ
) Ȥ Ȣ )
The transfer function for this filter circuit is:
H (f)
d
–
FSF x fc
Ǔ)
f
FSF x fc
2
K
x
jf
1
Q FSF x fc
1
+ 2π Ǹ2 x R2R3C1C2
and Q
1
1
)
ȣȧ
Ȥ
Rt
2R4
Rt
j2πfR4RtC3
2R4
Rt
)
Where K
+ R2
R1
R2R3C1C2
+ R3C1Ǹ2)xR2C1
) KR3C1
K sets the pass band gain, fc is the cutoff frequency for the filter, FSF is a frequency scaling factor, and Q is the
quality factor.
FSF
+Ǹ
Re
2
) |Im|
2
and Q
Ǹ
+
Re 2
) |Im|
2
2Re
where Re is the real part, and Im is the imaginary part of the complex pole pair. Setting R2 = R, R3 = mR,
C1 = C, and C2 = nC results in:
FSF x fc
+ 2πRC Ǹ12 x mn
and Q
+ 1 Ǹ)2 xm(1mn) K)
Start by determining the ratios, m and n, required for the gain and Q of the filter type being designed, then select
C and calculate R for the desired fc.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
17
THS4130, THS4131
HIGH-SPEED, LOW NOISE, FULLY-DIFFERENTIAL I/O AMPLIFIERS
SLOS318D – MAY 2000 – REVISED MARCH 2001
PRINCIPLES OF OPERATION
theory of operation
The THS413x is a fully differential amplifier. Differential amplifiers are typically differential in/single out, whereas
fully differential amplifiers are differential in/differential out.
THS413x
Fully differential Amplifier
VCC+
Differential Amplifier
Rf
R(g)
_
VIN+
+
R(g)
_
VIN–
+
Rf
VO+
+
_
VO–
VOCM
VCC–
Figure 35. Differential Amplifier Versus a Fully Differential Amplifier
To understand the THS413x fully differential amplifiers, the definition for the pinouts of the amplifier are
provided.
Input voltage definition
V
Output voltage definition
V
Transfer function
OD
V
+
V
+
OC
V
Output common mode voltage
ǒ Ǔ ǒ Ǔ
+ ǒ )Ǔ ǒ Ǔ
+ VI)
ID
OD
Differential Structure Rejects
Coupled Noise at The Input
VIN–
VIN+
Differential Structure Rejects
Coupled Noise at The Power Supply
–
V
–
O
V
V
ID
I–
V
O–
x A
ǒfǓ
ǒ Ǔ ǒ Ǔ
ǒ Ǔ) ǒ Ǔ
+ )
V
)
I)
+
IC
2
V
V
OC
I–
V
O
2
Differential Structure Rejects
Coupled Noise at The Output
_
VO+
+
_
VO–
VOCM
VCC–
Figure 36. Definition of the Fully Differential Amplifier
18
V
OCM
VCC+
+
V
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
O–
THS4130, THS4131
HIGH-SPEED, LOW NOISE, FULLY-DIFFERENTIAL I/O AMPLIFIERS
SLOS318D – MAY 2000 – REVISED MARCH 2001
PRINCIPLES OF OPERATION
theory of operation (continued)
The following schematics depict the differences between the operation of the THS413x, fully differential
amplifier, in two different modes. Fully differential amplifiers can work with differential input or can be
implemented as single in/differential out.
Rf
R(g)
VIN–
VCC+
VO+
– +
Vs
+–
VIN+
VO–
VOCM
R(g)
VCC–
Rf
Note: For proper operation, maintain symmetry by setting
Rf1 = Rf2 = Rf and R(g)1 = R(g)2 = R(g) ⇒ A = Rf/R(g)
Figure 37. Amplifying Differential Signals
Rf
R(g)
VIN–
VIN+
VCC+
RECOMMENDED RESISTOR VALUES
– +
VO+
+–
VO–
VOCM
R(g)
Vs
GAIN
R(g) Ω
Rf Ω
1
2
5
10
390
374
402
402
390
750
2010
4020
VCC–
Rf
Figure 38. Single In With Differential Out
If each output is measured independently, each output is one-half of the input signal when gain is 1. The
following equations express the transfer function for each output:
V
O
+ 12
V
I
The second output is equal and opposite in sign:
V
O
+ – 12
V
I
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
19
THS4130, THS4131
HIGH-SPEED, LOW NOISE, FULLY-DIFFERENTIAL I/O AMPLIFIERS
SLOS318D – MAY 2000 – REVISED MARCH 2001
PRINCIPLES OF OPERATION
theory of operation (continued)
Fully differential amplifiers may be viewed as two inverting amplifiers. In this case, the equation of an inverting
amplifier holds true for gain calculations. One advantage of fully differential amplifiers is that they offer twice as
much dynamic range compared to single-ended amplifiers. For example, a 1-VPP ADC can only support an input
signal of 1 VPP. If the output of the amplifier is 2 VPP, then it will not be practical to feed a 2-VPP signal into the
targeted ADC. Using a fully differential amplifier enables the user to break down the output into two 1-VPP signals
with opposite signs and feed them into the differential input nodes of the ADC. In practice, the designer has been
able to feed a 2-V peak-to-peak signal into a 1-V differential ADC with the help of a fully differential amplifier.
The final result indicates twice as much dynamic range. Figure 39 illustrates the increase in dynamic range. The
gain factor should be considered in this scenario. The THS413x fully differential amplifier offers an improved
CMRR and PSRR due to its symmetrical input and output. Furthermore, second harmonic distortion is
improved. Second harmonics tend to cancel because of the symmetrical output.
a
VOD= 1–0 = 1
VCC+
+1
_
VIN–
VIN+
+
+
_
VO+
0
VO–
+1
0
VOCM
VCC–
VOD = 0–1 = –1
b
Figure 39. Fully Differential Amplifier With Two 1-VPP Signals
Similar to the standard inverting amplifier configuration, input impedance of a fully differential amplifier is
selected by the input resistor, R(g). If input impedance is a constraint in design, the designer may choose to
implement the differential amplifier as an instrumentation amplifier. This configuration improves the input
impedance of the fully differential amplifier. The following schematic depicts the general format of
instrumentation amplifiers.
The general transfer function for this circuit is:
V
OD
V
– V
IN1
IN2
+
R
R
f
ǒ1
(g)
)
2R2Ǔ
R1
THS4012
VIN1
R(g)
+
_
Rf
R2
_
R1
THS413x
+
R2
_
VIN2
+
THS4012
R(g)
Rf
Figure 40. Instrumentation Amplifier
20
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
THS4130, THS4131
HIGH-SPEED, LOW NOISE, FULLY-DIFFERENTIAL I/O AMPLIFIERS
SLOS318D – MAY 2000 – REVISED MARCH 2001
PRINCIPLES OF OPERATION
circuit layout considerations
To achieve the levels of high frequency performance of the THS413x, follow proper printed-circuit board high
frequency design techniques. A general set of guidelines is given below. In addition, a THS413x evaluation
board is available to use as a guide for layout or for evaluating the device performance.
D
D
D
D
D
Ground planes—It is highly recommended that a ground plane be used on the board to provide all
components with a low inductive ground connection. However, in the areas of the amplifier inputs and
output, the ground plane can be removed to minimize the stray capacitance.
Proper power supply decoupling—Use a 6.8-µF tantalum capacitor in parallel with a 0.1-µF ceramic
capacitor on each supply terminal. It may be possible to share the tantalum among several amplifiers
depending on the application, but a 0.1-µF ceramic capacitor should always be used on the supply terminal
of every amplifier. In addition, the 0.1-µF capacitor should be placed as close as possible to the supply
terminal. As this distance increases, the inductance in the connecting trace makes the capacitor less
effective. The designer should strive for distances of less than 0.1 inches between the device power
terminals and the ceramic capacitors.
Sockets—Sockets are not recommended for high-speed operational amplifiers. The additional lead
inductance in the socket pins will often lead to stability problems. Surface-mount packages soldered directly
to the printed-circuit board is the best implementation.
Short trace runs/compact part placements—Optimum high frequency performance is achieved when stray
series inductance has been minimized. To realize this, the circuit layout should be made as compact as
possible, thereby minimizing the length of all trace runs. Particular attention should be paid to the inverting
input of the amplifier. Its length should be kept as short as possible. This will help to minimize stray
capacitance at the input of the amplifier.
Surface-mount passive components—Using surface-mount passive components is recommended for high
frequency amplifier circuits for several reasons. First, because of the extremely low lead inductance of
surface-mount components, the problem with stray series inductance is greatly reduced. Second, the small
size of surface-mount components naturally leads to a more compact layout thereby minimizing both stray
inductance and capacitance. If leaded components are used, it is recommended that the lead lengths be
kept as short as possible.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
21
THS4130, THS4131
HIGH-SPEED, LOW NOISE, FULLY-DIFFERENTIAL I/O AMPLIFIERS
SLOS318D – MAY 2000 – REVISED MARCH 2001
PRINCIPLES OF OPERATION
power-down mode
The power-down mode is used when power saving is required. The power-down terminal (PD) found on the
THS413x is an active low terminal. If it is left as a no-connect terminal, the device will always stay on due to an
internal 50 kΩ resistor to VCC. The threshold voltage for this terminal is approximately 1.4 V above VCC–. This
means that if the PD terminal is 1.4 V above VCC –, the device is active. If the PD terminal is less than 1.4 V above
VCC –, the device is off. For example, if VCC – = – 5 V, then the device is on when PD reaches –3.6 V, (–5 V +
1.4 V = – 3.6 V). By the same calculation, the device is off below –3.6 V. It is recommended to pull the terminal
to VCC – in order to turn the device off. The following graph shows the simplified version of the power-down
circuit. While in the power-down state, the amplifier goes into a high impedance state. The amplifier output
impedance is typically greater than 1 MΩ in the power-down state.
VCC
50 kΩ
To Internal Bias
Circuitry Control
PD
VCC–
Figure 41. Simplified Power-Down Circuit
Due to the similarity of the standard inverting amplifier configuration, the output impedance appears to be very
low while in the power-down state. This is because the feedback resistor (Rf) and the gain resistor (R(g)) are
still connected to the circuit. Therefore, a current path is allowed between the input of the amplifier and the output
of the amplifier. An example of the closed loop output impedance is shown in Figure 42.
OUTPUT IMPEDANCE (IN POWER DOWN)
vs
FREQUENCY
Output Impedance – Ω
2200
VCC = ±5 V
G=1
Rf = 1 kΩ
PD = VCC–
1200
200
100 k
1M
10 M
100 M
f – Frequency – Hz
Figure 42
22
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1G
THS4130, THS4131
HIGH-SPEED, LOW NOISE, FULLY-DIFFERENTIAL I/O AMPLIFIERS
SLOS318D – MAY 2000 – REVISED MARCH 2001
PRINCIPLES OF OPERATION
general PowerPAD design considerations
The THS413x is available packaged in a thermally-enhanced DGN package, which is a member of the
PowerPAD family of packages. This package is constructed using a downset leadframe upon which the die is
mounted [see Figure 43(a) and Figure 43(b)]. This arrangement results in the lead frame being exposed as a
thermal pad on the underside of the package [see Figure 43(c)]. Because this thermal pad has direct thermal
contact with the die, excellent thermal performance can be achieved by providing a good thermal path away
from the thermal pad.
The PowerPAD package allows for both assembly and thermal management in one manufacturing operation.
During the surface-mount solder operation (when the leads are being soldered), the thermal pad can also be
soldered to a copper area underneath the package. Through the use of thermal paths within this copper area,
heat can be conducted away from the package into either a ground plane or other heat dissipating device.
The PowerPAD package represents a breakthrough in combining the small area and ease of assembly of the
surface mount with the, heretofore, awkward mechanical methods of heatsinking.
More complete details of the PowerPAD installation process and thermal management techniques can be found
in the Texas Instruments Technical Brief, PowerPAD Thermally Enhanced Package (SLMA002). This document
can be found at the TI web site (www.ti.com) by searching on the key word PowerPAD. The document can also
be ordered through your local TI sales office. Refer to literature number SLMA002 when ordering.
DIE
Side View (a)
Thermal
Pad
DIE
End View (b)
Bottom View (c)
NOTE A: The thermal pad is electrically isolated from all terminals in the package.
Figure 43. Views of Thermally Enhanced DGN Package
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
23
THS4130, THS4131
HIGH-SPEED, LOW NOISE, FULLY-DIFFERENTIAL I/O AMPLIFIERS
SLOS318D – MAY 2000 – REVISED MARCH 2001
MECHANICAL DATA
D (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0.050 (1,27)
0.020 (0,51)
0.014 (0,35)
14
0.010 (0,25) M
8
0.008 (0,20) NOM
0.244 (6,20)
0.228 (5,80)
0.157 (4,00)
0.150 (3,81)
Gage Plane
0.010 (0,25)
1
7
0°– 8°
A
0.044 (1,12)
0.016 (0,40)
Seating Plane
0.069 (1,75) MAX
0.010 (0,25)
0.004 (0,10)
PINS **
0.004 (0,10)
8
14
16
A MAX
0.197
(5,00)
0.344
(8,75)
0.394
(10,00)
A MIN
0.189
(4,80)
0.337
(8,55)
0.386
(9,80)
DIM
4040047 / D 10/96
NOTES: A.
B.
C.
D.
24
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15).
Falls within JEDEC MS-012
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
THS4130, THS4131
HIGH-SPEED, LOW NOISE, FULLY-DIFFERENTIAL I/O AMPLIFIERS
SLOS318D – MAY 2000 – REVISED MARCH 2001
MECHANICAL DATA
DGN (S-PDSO-G8)
PowerPAD PLASTIC SMALL-OUTLINE PACKAGE
0,38
0,25
0,65
8
0,25 M
5
Thermal Pad
(See Note D)
0,15 NOM
3,05
2,95
4,98
4,78
Gage Plane
0,25
1
0°– 6°
4
3,05
2,95
0,69
0,41
Seating Plane
1,07 MAX
0,15
0,05
0,10
4073271/A 04/98
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions include mold flash or protrusions.
The package thermal performance may be enhanced by attaching an external heat sink to the thermal pad.
This pad is electrically and thermally connected to the backside of the die and possibly selected leads.
E. Falls within JEDEC MO-187
PowerPAD is a trademark of Texas Instruments.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
25
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,
enhancements, improvements, and other changes to its products and services at any time and to discontinue
any product or service without notice. Customers should obtain the latest relevant information before placing
orders and should verify that such information is current and complete. All products are sold subject to TI’s terms
and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI
deems necessary to support this warranty. Except where mandated by government requirements, testing of all
parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for
their products and applications using TI components. To minimize the risks associated with customer products
and applications, customers should provide adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right,
copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process
in which TI products or services are used. Information published by TI regarding third-party products or services
does not constitute a license from TI to use such products or services or a warranty or endorsement thereof.
Use of such information may require a license from a third party under the patents or other intellectual property
of the third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of information in TI data books or data sheets is permissible only if reproduction is without
alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction
of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for
such altered documentation.
Resale of TI products or services with statements different from or beyond the parameters stated by TI for that
product or service voids all express and any implied warranties for the associated TI product or service and
is an unfair and deceptive business practice. TI is not responsible or liable for any such statements.
Following are URLs where you can obtain information on other Texas Instruments products and application
solutions:
Products
Amplifiers
Applications
amplifier.ti.com
Audio
www.ti.com/audio
Data Converters
dataconverter.ti.com
Automotive
www.ti.com/automotive
DSP
dsp.ti.com
Broadband
www.ti.com/broadband
Interface
interface.ti.com
Digital Control
www.ti.com/digitalcontrol
Logic
logic.ti.com
Military
www.ti.com/military
Power Mgmt
power.ti.com
Optical Networking
www.ti.com/opticalnetwork
Microcontrollers
microcontroller.ti.com
Security
www.ti.com/security
Telephony
www.ti.com/telephony
Video & Imaging
www.ti.com/video
Wireless
www.ti.com/wireless
Mailing Address:
Texas Instruments
Post Office Box 655303 Dallas, Texas 75265
Copyright  2003, Texas Instruments Incorporated