IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 21, NO. 4, JULY 2006
959
Programmable PFC Based Hybrid Multipulse Power
Rectifier for Ultra Clean Power Application
Luiz Carlos Gomes de Freitas, Member, IEEE, Marcelo G. Simões, Senior Member, IEEE,
Carlos Alberto Canesin, Member, IEEE, and Luiz Carlos de Freitas, Member, IEEE
Abstract—A novel hybrid three-phase rectifier is proposed.
It is capable to achieve high input power factor (PF) and low
total harmonic input currents distortion (THD ). The proposed
hybrid high power rectifier is composed by a standard three-phase
six-pulse diode rectifier (Graetz bridge) with a parallel connection
of single-phase Sepic rectifiers in each three-phase rectifier leg.
Such topology results in a structure capable of programming the
input current waveform and providing conditions for obtaining
high input power factor and low harmonic current distortion. In
order to validate the proposed hybrid rectifier, this work describes
its principles, with detailed operation, simulation, experimental
results, and discussions on power rating of the required Sepic
converters as related to the desired total harmonic current distortion. It is demonstrated that only a fraction of the output power
is processed through the Sepic converters, making the proposed
solution economically viable for very high power installations,
with fast investment payback. Moreover, retrofitting to existing
installations is also feasible since the parallel path can be easily
controlled by integration with the existing dc-link. A prototype
has been implemented in the laboratory and it was fully demonstrated to both operate with excellent performance and be feasibly
implemented in higher power applications.
I. INTRODUCTION
N ORDER to improve the distribution of electrical energy
and to provide agreement with the power quality standards,
special rectifier structures have been currently used as front end
energy processors. But three-phase diode-bridge rectifiers continue to be very popular in several industrial and rural applications, where an intermediate dc link provides energy for other
electronic circuits. However, such standard diode-bridge rectifiers do not meet harmonic current content restrictions, as imposed by several international standards such as IEC 61000 and
IEEE 519 [1]–[6]. Thus, expensive and bulky passive filters or
complex power factor correction (PFC) and active filter structures must be installed to compensate the inherent harmonic current distortion. Therefore, in the past few years there has been
a tremendous interest in achieving low harmonic current distortion in three-phase ac to dc converters, motivating the development of several front-end multipulse rectifier solutions [7]–[11].
Multipulse rectifiers have been typically applied in threephase applications for mitigation of the input current harmonic
I
Manuscript received January 26, 2005; revised June 13, 2005. This work was
supported by CAPES, FAPEMIG, CNPq, FAPESP, and the National Science
Foundation. Recommended by Associate Editor F. Z. Peng.
L. C. G. de Freitas and L. C. de Freitas are with the Faculty of Electrical Engineering (FEELT), Federal University of Uberlandia (UFU), Uberlandia 38400902, Brazil.
M. G. Simões is with the Engineering Division, Colorado School of Mines
(CSM), Golden, CO 80401-1887 USA (e-mail: mgsimoes@ieee.org).
C. A. Canesin is with the Faculty of Engineering, São Paulo State University
(UNESP), São Paulo 15385-000, Brazil.
Digital Object Identifier 10.1109/TPEL.2006.876859
content. However, these converters need magnetic circuits such
as multiphase transformers, interphase transformers, current
balancing transformers, or harmonic blocking transformers,
resulting in customized equipments which are complex, heavy,
bulky, and expensive [12]–[16]. In addition, elimination of
interphase transformers is particularly desirable when there
is preexisting harmonic voltage content in the three-phase
power source. Such harmonic voltages cause fluctuations in
the dc output voltage, leading to further design complexities
[12]–[14], [17].
A simplified transformer concept for multipulse rectifier application was proposed in order to improve current sharing between two rectifiers [18] and eliminate the use of an interphase
transformer. However, to compose the input line current wave(where
form, a power transformer with a rating of 1.16
is the nominal value of output power) was necessary. Such a device contributes for increased cost, weight, and size of the structure. In the same context, in [19] the authors proposed an active
multipulse rectifier system using Boost converters to shape the
input line current to sinusoidal waveform and to improve current sharing, without the use of an interphase transformer. In
this case, a controlled dc output voltage is achieved through the
use of two Boost converters processing 50% of the output power
and, a power transformer with a rating of 0.6169
,
limiting its application and increasing the cost, weight, and size
of the proposed structure.
A novel approach that overcomes such disadvantages is
presented in this paper. The authors propose a new structure
composed of a single-phase Sepic rectifier associated in parallel
with each leg of a three-phase six-pulse diode rectifier resulting
in a programmable input line current waveform structure.
Thus, controlled rectifiers operating in parallel to a standard
three-phase diode rectifier are proposed in contrast to expensive and complex schemes. The overall converter behaves as
a current source controlled with a suitable strategy, i.e., the
imposition of a suitable input line current waveform in order
to provide low THD (total harmonic distortion of current)
and high input power factor. The system is a programmable
PFC based hybrid multipulse power rectifier (PFC–HMPR)
deploying Sepic converters. The proposed structure is depicted
in Fig. 1. It is a very compact structure and somewhat easy to
implement when compared to the expensive and complex multipulse schemes. The proposed system is capable of providing
ultra clean power without using multiphase transformers,
interphase transformers, current balancing transformers, or harmonic blocking transformers. This new topology is described
and analyzed in the next section.
It is important to emphasize that the proposed hybrid multipulse power rectifier deploying Sepic rectifiers in parallel to
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IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 21, NO. 4, JULY 2006
Fig. 2. Theoretical waveforms for the case of 12-pulse in the line input current.
Fig. 1. New three-phase PFC hybrid multipulse power rectifier (PFC-HMPR).
each leg of such a standard six-pulse diode rectifier does not
need connection to the neutral point. Standard operation of the
Sepic rectifiers is achieved when they are interconnected. Although it might be advisable connect the Sepic rectifiers to the
neutral point for improved performance in conditions where harmonics may want to circulate in the neutral, but the application
of the proposed structure does not depend on whether or not
there is any neutral point available. The authors are investigating
towards detailed design guidelines for this proposed structure on
improvements of installations with corresponding neutral harmonic circulation issues improvements.
II. FUNDAMENTAL PRINCIPLES
Fig. 1 shows the PFC–HMPR which is composed by a standard three-phase six-pulse diode rectifier, indicated in the block
diagram as Rect—1, and single-phase Sepic rectifiers associated in parallel to each diode-bridge rectifier leg. It should be
observed that non-isolated Boost rectifiers are not capable of imposing input current waveform when operating in parallel connection such as indicated in Fig. 1. Thus, the proposed system
has single-phase Sepic rectifiers, which have been observed to
have the capabilities to impose a desirable input line current
waveform.
Fig. 2 shows the principle of constructing an input line current
through two components
and
, obtained when the
PFC–HMPR topology operates as a conventional three-phase
12-pulse rectifier, which is the focus of this paper.
current reference is the main controller of the overall
The
characteristic of the final input line current waveform, as analyzed in Section IV. The proposed PFC-HMPR allows the imby reducing its THD.
provement of the input line current
It is important to notice that, only a fraction of the total output
Fig. 3. Theoretical waveforms for programmable THD
current.
in the input line
power is required to flow through the Sepic parallel circuits, supporting a competitive economic impact. It was experimentally
observed that for the PFC-HMPR operating as a conventional
12-pulse rectifier, just about 20% of the total output power is
less than 14% in
processed by the Sepic rectifiers and a
the input line current can be achieved. Besides, one can observe
that a variety of harmonic content restrictions imposed by IEEE
std 519–1992 can be easily meet by the PFC-HMPR presented
in this paper, as one can see in Fig. 3. For example, if a controlled
waveform as indicated in Fig. 3(b) is imposed through the Sepic
, will be built of the
parallel rectifiers, the input line current
and
with a very low
(around 5%).
combination of
In this case, the Sepic converters will supply about 45% of the
rated power. In conclusion, the proposed PFC–HMPR is able
of the input line current
to operate with a programmable
depending on the desired application conditions. Thus,
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DE FREITAS et al.: PROGRAMMABLE PFC BASED HYBRID MULTIPULSE POWER RECTIFIER
961
this flexibility is a very good characteristic of the proposed hybrid power rectifier system when compared to other multipulse
rectifier structures.
Depending on the kind of application, the proposed hybrid
rectifier can operate in accordance to the harmonic content
restrictions of the input line current with the Sepic rectifiers
processing just the minimum power. Therefore, the whole
structure presents reduced cost, volume and, higher efficiency
when compared to other multipulse schemes that use multiphase transformers and interphase transformers, saving energy
and attending the IEEE Std. 519–1992 as well. Moreover,
the economical benefits of this new topology are extremely
valuable for high power installations, because around 33%
maximum value of rated power will be processed in the parallel
to a very
circuits (Sepic rectifiers), in order to reduce the
low value (around 5%). This feature allows higher efficiency
and payback in a very short time for the investment. Moreover,
when used in retrofitting applications, the available total rated
power will increase to 133% of the original output power,
with obvious improvements on power quality. In this paper,
the authors show the proposed PFC-HMPR operating as a
conventional 12-pulse rectifier. The imposition of a sinusoidal
input current waveform is under progress and will be reported
in the future.
III. MOTIVATION TO USE A SEPIC CONVERTER
Boost converters have been traditionally used as front-end
wave shaping systems but, in order to be applied as parallel
path of three-phase six-pulse diode bridge rectifier, non-isolated Boost converters are not suitable because during the period of time where the input line voltage of the three-phase
power source is higher than the dc output voltage, the Boost
current keep increasing even when the switch is open. In fact,
when the Boost switch is open and the freewheeling diode is forward biased and connecting the path between Rect-2 and Rect-1,
the Boost current flows through the diodes of the three-phase
six-pulse rectifier bridge (Rect-1) and its control is lost, eventually impeding the desired current waveform composition. This
is the main reason that non-isolated Boost converters are not
suitable for being associated in parallel for the proposed multipulse hybrid power rectifier.
On the other hand, Sepic converters behave naturally as an
input current source, allowing that the waveform of the input
current can be imposed with a suitable control strategy. In conis
trast to the Boost converter behavior, when the switch
opened ( : 1, 2, 3), the series capacitor of the Sepic converter
assures, at any operating conditions, the isolation of those circuits and correspondent decrease of the current flow through the
input inductor. Thus, the imposition of the input current does
(dc
not strongly depend on the level of the output voltage
link voltage).
It should be emphasized that for isolated Boost converters
fed through single-phase transformers, there is galvanic isolation, as shown in Fig. 4. As a result, such structure is able
to replace Sepic converters, but with the obvious drawbacks
(volume, weight and cost) of requiring extra magnetic devices.
The authors discuss in [20] the implementation with Boost converters, as shown in Fig. 4. The Boost current is confined to
the secondary winding circuit and the dc link voltage is kept
Fig. 4. New three phase PFC hybrid power rectifier (PFC–HPR) deploying
boost converters fed through single-phase isolating transformers.
Fig. 5. Proposed control strategy for 12-pulse input line current waveform.
with average value approximately equal to the peak line voltage
value approximately. This structure is able to replace the Sepic
converters because it can be assured that Boost current will be
forced to return through the Boost circuit instead of the threephase six-pulse rectifier bridge. Hence, the control of the Boost
current is no longer lost resulting that the desired input line current waveform can be achieved. It is important to emphasize
that, even using single-phase isolating transformers, the proposed PFC-HMPR deploying Boost converters is still more attractive than the multipulse rectifier structures presented in [18]
and [19], as described in [20].
IV. PROPOSED CONTROL STRATEGY
The main control circuit objective is to impose the input line
current at low THD and high input power factor for the proposed PFC–HMPR. Therefore, the control strategy must focus
on establishing the best relationship between the input current
1 of the standard three-phase six-pulse diode bridge rectifier(Rect-1), and the input current 2 of the controlled Sepic
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IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 21, NO. 4, JULY 2006
Fig. 6. Simulated 3-kW PFC hybrid multipulse power rectifier (PFC-HMPR): (a) PWM 12-pulse control circuit and (b) power circuit.
rectifiers (Rect-2), in order to achieve a desirable input line current THD. As example, if a twelve pulses ac current waveform
is desired, the control strategy of the controlled Sepic rectifiers
(Rect-2) can be established as shown in the diagram of Fig. 5.
In order to compose the waveform of the input line current
, a sample of the input line-to-neutral voltage
must
be rectified and compared with dc voltage levels in order to gento impose the input
erate a synchronized square wave
depicted in Fig. 2. The voltage
is the
Sepic current
reference current waveform and can be supplied either by analog
or digital devices. It was found that, when operating as a con-
ventional 12-pulse rectifier, the lowest input line current THD is
(Rect-2) is 33%
achieved when the magnitude of the current
(Rect-1). Therefore, the
of the magnitude of the current
must be multiplied by a fraction of the
reference voltage
of Rect-1 providing a reference signal equal to
current
, where k is equal to
of the dc curof the three-phase
rent through the output inductor filter
six-pulse diode rectifier (Rect-1) for the minimum THD .
In order to generate a PWM reference signal, a sawtooth
voltage waveform is added to the multiplier circuit signal. Finally, the PWM reference signal must be compared with the cur-
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DE FREITAS et al.: PROGRAMMABLE PFC BASED HYBRID MULTIPULSE POWER RECTIFIER
963
TABLE I
DESIGNED PARAMETERS AND USED SEMICONDUCTORS
Fig. 9. Sinusoidal input voltage waveform and 12-pulse line input current
waveform (i
)–line a–simulation result.
Fig. 7. Input currents i
(Sepic)—simulation result.
Fig. 10. Frequency spectrum of the input line current—simulation result.
Fig. 8. Input current i
(six-pulse diode rectifier)—simulation result.
rent flowing through the inductor
of Sepic converter (Rect-2)
to generate the gate-drive signal for switch . Hence, the curwill follow the imposed reference
rent through the inductor
through a very simple PWM control strategy [21], [22].
Fig. 11. Output voltage (dc link)—simulation result.
A. Simulation Results
In order to analyze the operation of the proposed PFC-HMPR,
a digital simulation was performed and then compared with experimental results. Table I shows the system specifications. A
12-pulse PWM control strategy was applied in order to control
the proposed structure, imposing 12-pulse waveform in the line
input currents. Thus, the proposed control shown in Fig. 5 was
implemented, and used for simulation analysis. An open loop
control strategy, following the principles depicted in Fig. 6 was
implemented in PSPICE.
The simulation results for the input line current composition
are portrayed in Figs. 7 and 8. Fig. 7 shows the input current
from the controlled Sepic rectifier, considering highly dc
and
).
inductive filters (
Fig. 9 shows the simulation of input voltage and current waveforms where it can be observed that a 12-pulse input current
waveform was imposed in the input line current, resulting in a
THD near to 13.7%, for nominal output power. Fig. 10 shows
, for rated
the frequency spectrum of the input line current
load. The ripple voltage over the average nominal output voltage
is depicted on Fig. 11.
The simulation studies supported the best relationship bemagnitude and curtween the magnitudes of current
to be about 33%. This relationship gives the lowest
rent
of 13.55% for a 12-pulse waveform in the line input current, as shown in Fig. 12. Fig. 13 shows the power rating of
Rect-2 in relation to the total output power. Therefore, one can
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IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 21, NO. 4, JULY 2006
Fig. 12. THD of the line input current versus relation (I
=I
) in %.
Fig. 14. Implemented prototype: PFC three-phase 3-kW hybrid rectifier.
Fig. 13. THD of the line input current versus relation (P
=P
) in %.
observe that, processing only 15.29% of the total output power,
less than 14% of THD in the line input current is achieved.
B. Experimental Results
After careful simulation study and analysis, a 3-kW threephase PFC non-isolated multipulse hybrid power rectifier
(PFC–HMPR) prototype was implemented and evaluated in
laboratory, in order to validate the proposed structure. The
experimental setup was built using analog and digital gate
circuitry. Fig. 14 shows the electrical diagram of the implemented prototype and details of the electronic circuit used in
the experimental setup to compose the input current of line A. It
should be noticed that all implemented parameters and devices
are the same from Table I. As one can observe in Fig. 14, a
sample of the input voltage is rectified and compared with two
dc voltages levels for the pulse generator circuit.
The outputs of the comparators are connected to an OR gate
resulting a pulsed output voltage with width equal to 3 rad
and amplitude equal to the comparator supply voltage, and the
reference current waveform is obtained. Therefore, the reference current signal is filtered and reduced to unity value in order
to be applied to the input of the signal multiplier circuit. The
signal multiplier circuit also receives a current signal of the
in order to generate a signal
six-pulse diode rectifier
. As a result, the refproportional to 1/3 of the current
erence current signal to be imposed at the Sepic rectifiers is obtained at the output of the multiplier circuit.
Finally, the PWM reference generator circuit receives the
signal from multiplier circuit and, with a sawtooth waveform,
Fig. 15. Input current I
(Sepic) 4.7 A/div: Experimental Result.
provides the PWM reference current signal that is compared
with the current through the inductor of Sepic rectifiers. Therefore, the driving command to the main Sepic switch is provided
through the gate drive circuit.
The experimental results are shown from Figs. 15 –18. They
are related to phase A of the power system, corroborating the
behavior of the analyzed simulation results; the other phases
have similar performance.
Figs. 15–16 show the currents from the controlled Sepic rectifier and uncontrolled six-pulse diode bridge rectifier, respectively. These currents are responsible to perform the 12-pulse
waveform in the input line current. The experimental line input
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DE FREITAS et al.: PROGRAMMABLE PFC BASED HYBRID MULTIPULSE POWER RECTIFIER
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The experimental input line current frequency spectrum is
shown in Fig. 18, where an experimental THD of 14.7% was
achieved, resulting in an input power factor (PF) equal 0.989,
for rated load. It was verified that the power rating of the parallel Sepic rectifiers (Rect-2) was about 21% of the total output
power, which is a very close match to the results obtained in the
simulation analysis.
V. CONCLUSION
Fig. 16. Input current I
result.
(six-pulse diode rectifier) 4.7 A/div: experimental
Fig. 17. Input line current I
This paper introduced a novel three-phase hybrid power rectifier capable of achieving nearly unity input power factor with
programmable input line current THD . The paper presented
comprehensive analysis, evaluation and design of a system composed of single-phase Sepic rectifiers connected to each leg of a
standard uncontrolled three-phase six-pulse diode rectifier. The
parallel converters power rating is only a small fraction of the
total output power supporting a competitive economic impact.
Additional analyses were presented to determine the amount of
power processed by the controlled rectifiers, in order to obtain
a given (and desirable) total harmonic distortion in the input
. It was verified that for
less than
line current
15% only 21% of the rated output power had to be processed by
the Sepic rectifiers. Therefore, this proposed structure is recommended for high power installations, and retrofitting to existing
installations is feasible since the parallel path can be easily controlled by integration with the existing dc-link. The proposed
structure provided a multipulse ac input line current without
phase-shift transformers, with simplified design and reduced
cost. In addition to the converter analysis and simulation results,
experimental results from a 3-kW prototype were presented, in
order to validate the proposed structure and control strategy. The
authors are working on further developments towards a fully
digital programmable control (using DSP and FPGA devices)
for the proposed converter.
4.7 A/div: Experimental Result.
REFERENCES
Fig. 18. Frequency spectrum of the input line current I
result.
: experimental
current is shown in Fig. 17, providing conditions to obtain a low
THD value as expected.
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Luiz Carlos Gomes de Freitas (S’03–M’06) received the B.S., M.S., and Ph.D. degrees in electrical
engineering from the Federal University of Uberlandia (UFU), Uberlandia (MG), Brazil, in 2001,
2003, and 2006, respectively.
He is currently with the Industry Division,
Centro Federal de Ensino Tecnológico de Goiás
UNED-Jataí, where he has been working to establish
research and education activities in industry application of power electronics converters. His research
interests include high-frequency power conversion,
active power-factor correction techniques, multipulse rectifiers, and clean
power applications.
Marcelo G. Simões (S’89–M’95–SM’98) received
the B.Sc. and M.Sc. degrees in electrical engineering
from the University of São Paulo, São Paulo, Brazil,
in 1985 and 1990, respectively, the Ph.D. degree from
The University of Tennessee, Nashville, in 1995, and
the D.Sc. degree from the University of São Paulo,
São Paulo, Brazil, in 1998.
He joined the faculty of the Colorado School of
Mines, Golden, in 2000 and has been working to
establish research and education activities in the
development of intelligent control for high power
electronics applications in renewable and distributed energy systems.
Dr. Simões received the NSF Faculty Early Career Development (CAREER)
in 2002. He is serving as IEEE Power Electronics Society Intersociety
Chairman, Associate Editor for Energy Conversion and Editor for Intelligent Systems of the IEEE TRANSACTIONS ON AEROSPACE AND ELECTRONIC
SYSTEMS, and Associate-Editor for Power Electronics in Drives of the IEEE
TRANSACTIONS ON POWER ELECTRONICS. He served as the Program Chair for
PESC’05, Power Electronics Specialists Conference, and the Conference Chair
for PEEW’05, Power Electronics Education Workshop, both held in Brazil.
He has been actively involved in the Steering and Organization Committee of
the IEEE/DOE/DOD 2005 International Future Energy Challenge.
Carlos Alberto Canesin (S’87–M’97) received
the B.S. degree from São Paulo State University,
Ilha Solteira (SP), Brazil, in 1984 and the M.S. and
Ph.D. degrees from the Federal University of Santa
Catarina, Florianópolis (SC), Brazil, in 1990 and
1996, respectively, all in electrical engineering.
He started the Power Electronics Laboratory LEP
at the UNESP-São Paulo State University-FEIS,
where he is currently an Associate Professor. His
interests include soft-switching techniques, dc to
dc converters, switching-mode power supplies,
solar/photovoltaic energy applications, electronic fluorescent ballasts, and
active power-factor correction techniques.
Luiz Carlos de Freitas (S’85–M’92) received the
M.Sc and Ph.D. degrees from the Federal University
of Santa Catarina, Florianópolis (SC), Brazil, in 1985
and 1992, respectively.
He has authored a variety of papers in the areas of
soft-switching, dc–dc, dc–ac, ac–dc converters, electronic fluorescent lamps, and multipulse rectifiers
for clean power systems. Currently, he is with the
Federal University of Uberlandia (UFU), Uberlandia
(MG), Brazil, where he is a member of the Power
Electronics Research Group.
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