2012-03-27
Real-Time and
Embedded Systems
(CUGS Course)
Petru Eles and Zebo Peng
Embedded Systems Laboratory (ESLAB)
Linköping University
www.ida.liu.se/~zebpe/teaching/rtes
Course Organization
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Module I  System-Level Design Methodology
 Wednesday, March 28, 13:15-18:00
 Thursday, March 29, 9:15-12:00
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Module II  Advanced Real-Time Systems
(Dr. Unmesh Bordoloi)
 Time to plan (13-14 June).
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Module III  Formal Modeling and Verification
(Prof. Wang Yi, Uppsala U.)
 Time to plan (9-10 May).
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The course gives 4.5 HP credits, 1.5 for each module.
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Module I: System-Level Design Methodology
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Design of embedded systems (0.5h)
Architectures and platforms for embedded
systems (1.5h)
Modeling techniques (1.5h)
Performance analysis and co-simulation (1.5h)
Optimization techniques for design space
exploration (1.5h)
System-level power/energy optimization (1.5h)
Prof. Z. Peng, ESLAB/LiTH, Sweden
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Literature
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Ernst, Codesign of Embedded Systems: Status and
Trends.
Keutzer et. al., System-Level Design: Orthogonalization of Concerns and Platform-Based Design.
Li et. al., Performance Estimation of Embedded
Software with Instruction Cache Modeling.
Glover, Tabu Search: A Tutorial.
Okuma et al., Software Energy Reduction Techniques
for Variable-Voltage Processors.
De Micheli el at., Readings in Hardware/software CoDesign.
Lecture notes.
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Examination for Module 1
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Written exam.
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Open book .
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Time:
 Friday, April 27 (?)
 13:00-17:00
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Introduction
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Embedded and RT systems
and their characteristics
Design of embedded
systems
The typical design flows
System level design issues
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What is an Embedded System?
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There are many different definitions!
 “A special-purpose computer system that is used for a
particular task.”
 “A computer based systems embedded in real life
machines. Though computer based, it dose not have the
usual key-board and monitors.”
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Some highlights what it is (not) used for:
 “Any device which includes a programmable component but
itself is not intended to be a general purpose computer.”
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Some focus on what it is built from:
 “A collection of programmable parts surrounded by ASICs
and other standard components, that interact continuously
with an environment through sensors and actuators.”
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What is a Real-Time System?
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“An information processing system that has to
respond to input stimuli within a finite and specified
time.”
 The correctness depends not only on the logical result but
also the time it was delivered.
 Failure to respond in time is as bad as the wrong response!
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Embedded RT Systems
General purpose systems
Embedded systems
Microprocessor
market shares
99%
1%
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Characteristics of Embedded RT Systems
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Dedicated computers (not general purpose).
 One or several applications known at design-time.
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Contain a programmable component.
 But usually not programmable by the end-user.
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Interact (continuously) with the environment:
 Real-time behavior (faster ≠ better).
 Predictable, safe and reliable.
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Usually very cost sensitive:
 Products in competitive markets, demanding low cost.
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Low power/energy is often preferred.
 Battery life: High energy consumption  short battery life time.
 Cost issue: High power consumption  strong power supply and
expensive cooling mechanism.
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Embedded Controllers
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Sensors
Environment
HW Unit
Application-special logic
Timers
A/D and D/A conversion
Actuators
CPU
Memory
Reactive systems.
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The system never stops.
The system responds to signals produced by the environment.
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Distributed Embedded Systems
Actuators
Sensors
I/O Interface
RAM
CPU
ROM
ASIC
Network Interface
ECU
ECU
ECU
ECU
ECU
ECU
Gateway
Gateway
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The ES Design Challenges
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Increasing application complexity (e.g., automotive).
Heterogeneous architecture (HW, SW, network,
mechatronics, etc.).
Stringent time and power constraints.
Low cost requirement.
Short time to market.
Safety and reliability (e.g., very long life-time).
In order to achieve all these requirements, systems
have to be highly optimized.
Both hardware and software aspects have to be
considered simultaneously!
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Co-Design to Reduce Design Time
Traditional Design:
HW/SW Codesign:
Specification
& Partitioning
Specification
& Partitioning
HW Design
&
Simulation
Co-sim. HW Design
SW Design
&
&
&
Co-verif. Simulation
Simulation
SW Design
&
Simulation
Integration
&
Test
Integration
&
Test
Reduced TTM
time
Prof. Z. Peng, ESLAB/LiTH, Sweden
time
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Current ES Design Practice
1.
Start from some informal specification and a set of
constraints (time, power, and cost constraints).
2.
Generate a more formal specification, based on some
modeling concept (FSM, data-flow, etc.), using Matlab,
Statecharts, SystemC, C, UML, or VHDL.
3.
Simulate the model in order to check its functionality. The
model is modified, if needed.
4.
Choose an architecture such that the cost limit is satisfied,
and hopefully that time/power constraints will be fulfilled.
5.
Implement both the hardware and software components
and build a prototype.
6.
Validate the system from both functional and nonfunctional perspective.
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A usual outcome: Neither time nor power constraints are satisfied,
if the functions are correctly implemented!!!
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The Consequences
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Delays in the design process:
 Increased design cost.
 Delays in time to market  missing market window.
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High cost due to many iterations with
implementation and prototyping.
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Bad design decisions taken under time pressure:
 Low quality.
 High cost.
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The lesson: We need to explore more design
alternatives in an efficient manner.
 At the system level!
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System-Level Design
Informal Specification,
Constraints
Modeling
Functional
Simulation
Arch. Selection
System Model
Formal
Verification
System
Architecture
Mapping
Estimation
Scheduling
Not OK
Not OK
Mapped and
Scheduled Model
OK
Software Model
Simulation
Structural
Simulation
Formal
Verification
Hardware Model
Lower-Level Design
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The Improved Design Flow
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Several design alternatives are evaluated before
going down to the lower-level design.
 Different architectures, mappings and schedules are
explored, before actual implementation and prototyping.
 Hardware/software trade-offs can be made systematically.
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Verification and simulation are integrated into the
design flow.
 Used not only for functional validation, but also for other
requirements.
 Used after mapping and scheduling in order to check, for
example, timing properties.
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We get highly optimized solutions in short time.
 There is a good chance that design iterations at the lowerlevel, including prototyping, can be avoided.
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The Lower-Level Issues
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Software generation:
 Encoding in an implementation language (C, C++,
assembler).
 Compiling (this can include particular optimizations for
application specific processors, DSPs, etc.).
 Generation of a real-time kernel or adapting to an existing
operating system.
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Hardware synthesis:
 Encoding in a HDL (VHDL and Verilog).
 Successive synthesis steps: high-level, register-transfer
level, logic-level synthesis.
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Hardware/software integration:
 The software is “run” together with the hardware model
(co-simulation).
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Prototyping:
 A prototype of the hardware is constructed and the
software is executed on the target architecture.
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Lower-Level Design
There are established CAD tools on the market which
automatically perform many of the low level tasks:
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Code generators (software model  C, hardware
model  VHDL)
Compilers.
Hardware synthesis tools:
 RT-level synthesis
 Logic synthesis
 Layout and physical implementation
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Test generators and debuggers.
Simulation and co-simulation tools.
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Focus on System-Level Design
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Large influence on the quality of the final
implementation.
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Very few commercial tools are available.
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Mostly experimental and academic tools available.
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Huge efforts and investments are currently made on
developing tools/methods for system-level design.
Ad-hoc solutions are less and less likely to be utilized.
It is system level design that we are
mainly interested in, in this course!
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