International Journal of Engineering Trends and Technology (IJETT) – Volume 14 Number 4 – Aug 2014
Design and Development of Mono-Pulse Autotrack
Receiver
1
2
V.Sri Phani Swetha,
M.Tech, Department of ECE
G.V.P college of Engineering
Visakhapatnam
AndhraPradesh, India
D & E SDGM,
Bharat Electronics, ,
IE Nacharam Hyderabad
Telangana, India.
Abstract: In this paper, a mono pulse auto track receiver is used
to set the direction of ECM antenna. The design involves the
development of 2-Dimensional Tracking (Azimuth & Elevation)
with quick response time is implemented. Instantaneous tracking
of all types of radars i.e., surface, submarine and airborne
radars. The design is done based on high end RF front end and
Digital Signal processing techniques. This design is optimized
against multipath signals .To achieve tracking accuracy less than
2° at any frequency in the given frequency range.
Index terms-ECM, Tracking, Front end, multipath signals.
I.INTRODUCTION
RADAR means Radio detection and ranging. It is an
electromagnetic system used for detection, range, location of
objects. Radar is an active device in that it carries its own
transmitter and does not depend on ambient radiation, as do
most optical and infrared sensors. Radar can detect relatively
small targets at near or far distances and can measure their
range with precision in all weather, which is its chief
advantage when compared with other sensors.[1] The circuit of
RADAR contains both transmitter part and receiver part.
Transmitter part is for transmitting RF signal and receiver part
is for measuring the parameters of the returned echo signal.
The RADAR range is [1]:
R max =
(
( / )
) - (1.1)
Where,
Pt = Transmitted power
Gt = Transmitting gain
Ae = effective aperture area of the antenna
σ = radar cross section
Smin = minimum detectable signal
The major application of RADAR is Electronic Warfare
(EW). Electronic Warfare is a special field of electronics
which involves the study of effective use of electromagnetic
spectrum. It refers to any action involving the use of
the electromagnetic spectrum or directed energy to control the
ISSN: 2231-5381
3
Ch.Viswanadham,
K.S.Krishna Murty,
Assistant Professor, Department of ECE,
G.V.P college of Engineering
Visakhapatnam
Andhra Pradesh, India.
spectrum, attack an enemy, or impede enemy assaults via the
spectrum [2].
Electronic Warfare consists of three segments.
1.
2.
3.
Electronic Support Measure
Electronic Counter Measure.
Electronic Counter-Counter Measure.
Electronic Support Measure (ESM) describe the division
of electronic warfare involving actions taken under direct
control of an operational commander to detect, intercept,
identify, locate, record, and/or analyze sources of radiated
electromagnetic
energy
for
the
purposes
of
immediate threat recognition (such as warning that fire control
RADAR has locked on a combat vehicle, ship, or aircraft) or
longer-term operational planning[3]. ESM involves the
measurement of received RF echo signal parameters in the
operating frequency range. It measures the parameters such as
pulse width, pulse repetition frequency, signal strength,
antenna scan period, direction of arrival etc., These systems
were installed in warships, submarines and aircrafts.
Electronic Counter Measure (ECM) has three strategies.
They are
(1) Radar interference
(2) Target modification
(3) Changing the electrical properties of air.
Radar interference techniques contains jamming and
deception. Jamming is achieved by transmitting signals on the
radar frequency to generate a noise level sufficient to hide
echoes. The jammer's continuous transmissions will give a
clear direction, but no range information to the enemy
radar. Deception uses a transponder to imitate the radar echo
with a delay to indicate incorrect range. Target modification
includes radar absorbing coatings (i.e., paints) and modifying
shape of the surface. To provide confusing radar echoes a
common method called chaff which is dispersal of small strips
of aluminium. This is a method of changing the
electromagnetic properties of air [4].
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International Journal of Engineering Trends and Technology (IJETT) – Volume 14 Number 4 – Aug 2014
The equation for ECM Jammer Range is:
R max =
(
)
( / )
- (1.2)
Where
Pt= Radar transmitted power
Gt= Radar antenna gain in transmission
Gr = Radar antenna gain in reception
λ = transmitted wavelength
σ = target RCS (m2)
(S/N) min = Minimum signal to noise ratio for detection
Lt = Transmission loss
Lr = reception loss
La = two way atmospheric propagation loss
KTFr = noise power density at the receiver output with T =
290K
Br = Receiver Bandwidth at the output of the receiver
processing chain
Receiver bandwidth is the ratio of the transmitting signal
bandwidth to the receiver processing gain, Gp. [5] There are
many methods for tracking. Out of all tracking techniques,
auto tracking is the best suited method.
Electronic Counter-Counter Measure (ECCM) is also
known as Electronic Protective Measure (EPM) or Electronic
Protection (EP). This involves the action to protect personnel
and equipment from enemy. It puts a counter measure for the
ECM.
II. MONO PULSE AUTO TRACKING
Auto tracking is the technique which is used where the
tracking of radar signal is done automatically. As tracking of
error signal is obtained from single pulse, it is called mono
pulse. The error is measured by comparing the amplitude or
phase of the echo signal. There were two methods: 1.
Amplitude comparison method and 2. Phase comparison
method. We concentrate on amplitude comparison technique.
FIG. 1 SUM-DIFFERENCE BEAMS
III.BLOCK DIAGRAM
This paper proposes the optimized design of mono-pulse
auto track digital receiver circuit. This model is designed for
the frequency range of 0.5 GHz-2 GHz. If any RF input
frequency is given then it is down converted to the
intermediate frequency of 0.75 GHz-1.25 GHz. These IF
frequencies are given to a high speed ADC in order to convert
the RF signal into digital form. These digital signals are fed to
a Micro controller for error correction. If there is an error then
a command is given to the antenna control unit to set the
direction of antenna. The direction of antenna should be in
such a way that the difference of the corresponding signals
should be approximated to zero.
The block diagram of mono pulse auto track receiver
contains two parts: 1.RF part 2.DSP part. Fig.1 shows the
block diagram of RF part of one channel. Four such channels
are required for mono pulse auto track receiver. Fig.2 shows
the block diagram of DSP part. In the block diagram the
signals from all the four RF channels i.e., two azimuth and
two elevation are given to a high-speed ADC.
RF part contains limiter, digital attenuator, low noise
amplifier, SPT switches, band pass filters. DSP part contains
High-speed ADC, error correction circuits. DSP part contains
timing and clock generators, control signal generators,
EPROM’s, FPGA and Micro controller.
2.1: Amplitude comparison Method:
Two overlapping antenna beams are formed, which are
steered in slightly different directions, usually such that they
overlap at the 3dB-point of the beams. By comparing the
relative amplitude of the pulse in the two beams, its position
in the beams can be determined. In most implementations, two
signals is formed, one being the sum of the two beams, and
the other being the difference of the two beams. The ratio of
these two beams normalises the difference signal and allows
the direction of arrival of the signal to be calculated. [6]
FIG. 2 RF PART
ISSN: 2231-5381
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International Journal of Engineering Trends and Technology (IJETT) – Volume 14 Number 4 – Aug 2014
The implementation of logic cells and the connection
mechanism used in the device are differing in these two
types.[7] In this circuit we use XQ4013E FPGA. This is of
XQ4000E series device. This device contains 13,000
maximum no. of logic gates. The maximum no. of logical
RAM bits are18,432. The packages for this device are PG223,
CB228, and HQ240.
The below figure is the timing diagram of the circuit:
FIG. 3 DSP PART
IV.CIRCUIT IMPLEMENTATION
ECM antenna contains four Horn antennas and one
parabolic reflector antenna. These four antennas acts as feed.
Out of the four horn antennas, two are for azimuth and two are
for elevation. Inputs from all the four video channels are fed
to peak holding circuit. The peak holding is used for holding
the peak of video signals and vary the pulse-width. The timing
circuit contains or gate and a multi-vibrator for holding the
peak of video signals. The timing circuits are mainly intended
for synchronization. TAC1 & TAC2 are the control signals
given to the peak hold circuit which are obtained from timing
circuit. These signals are given to ADC, to convert the video
signals into digital form. These digital signals which are in the
form of bits are stored in the EPROM and are given to the
FPGA. In FPGA, the differences between the corresponding
channelled bits are measured. If the difference has a value,
then a command is send to the antenna control unit. If the
difference is a null value, then it sends a command which
conveys that antenna is in correct direction.
4.1 INPUT:
The input to the DSP part is the signal obtained from each
channel of RF frontend part.
4.2 OUTPUT:
The output of the DSP part is the command given to the
antenna control part.
4.3: FPGA:
This circuit is printed on a PCB and the coding is done in
VHDL in order to achieve the requirement.
V. SIMULATION
The simulation of the design PCB is done using Xilinx
software. Software coding is done using VHDL.
5.1: About Xilinx:
Designers can design and verify their unique circuits in
Xilinx programmable devices much faster than they could
than by choosing traditional methods such as mask
programmed, fixed logic gate arrays. Xilinx Software
Solutions provide powerful tools which make designing with
programmable logic simple. Push button design flows,
integrated on-line help, multimedia tutorials, plus high
performance automatic and auto-interactive tools, help
designers achieve optimum results. [7]
5.2: About VHDL:
An FPGA is a regular structure of logic cells or modules
and interconnect which is under the designer’s complete
control. There are 2 basic types of FPGA’s are available. 1.
SRAM based reprogrammable FPGA and 2. OTP (One time
programmable) FPGA.
ISSN: 2231-5381
FIG. 4 TIMING DIAGRAM
VHDL has a rich and interesting history. The HDL stands
for Hardware Description Language. VHDL is a true
computer language with the accompanying set of syntax and
usage rules. VHDL is primarily used to describe hardware. [8]
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International Journal of Engineering Trends and Technology (IJETT) – Volume 14 Number 4 – Aug 2014
5.3: About CADSTAR:
BIO DATA OF AUTHOR(S):
CADSTAR, Zuken’s powerful and easy-to-use, expert
desktop solution for PC-based PCB design, allows an intuitive
and complete design flow for EDA engineers and designers
alike, from initial schematics and then PCB design to
manufacturing output. It spans schematic capture, placement,
routing, library creation and management, signal integrity and
EMC analysis, along with the production of manufacturing
data. [9]
V. Sri Phani Swetha had completed her
Bachelor’s degree from Sri Prakash
College of Engineering, Tuni, Andhra
Pradesh, India. She completed her
Bachelor’s degree in Electronics and
Communications Engineering from Sri
Prakash college of Engineering, Tuni,
Affiliated to J. N. T. U Kakinada and pursuing her Master’s
degree in Communications and signal Processing from G.V.P
college of Engineering, Madhurawada, Vishakhapatnam,
Andhra Pradesh.
VI.CONLUSION
A novel circuit for Mono pulse Auto track digital receiver
circuit is presented in this paper to achieve tracking accuracy
less than 2o at any frequency in the operating frequency range.
Amplitude comparison method is best suited for mono pulse
auto tracking technique. It is very simple and provides more
accuracy with adjustment of precision. It is less prone to
noise. We developed the circuit on PCB. The estimated timing
diagram is shown in figure 4.
VII. REFERENCES
[1] Merrill.I.Skolnik, “Chapter-1: Introduction” RADAR Hand
Book, second edition, United States of America, Tata
McGraw-Hill, 1990, pp-1.1.
[2]http://en.wikipedia.org/wiki/Electronic warfare.
[3]http://en.wikipedia.org/wiki/Electronic_warfare_support_m
easures.
[4]http://en.wikipedia.org/wiki/Electronic_counter measure
[5]Andrea De Martino, “Chapter-5: Electronic counter
measure systems”, Introduction of Modern EW systems,
United States of America, Artech House, 2012, pp.264-266.
[6]http://en.wikipedia.org/wiki/AmplitudeComparison_Monopulse
[7] Karen Parnell & Nick Mehta,”Chapter-1.3 & 2.1”
Programmable Logic Design Quick Start Hand Book, second
edition, Xilinx, January 2002, pp.17, 35.
[8], B.Mealy, F.Tappero, “Chapter-1: Introduction to VHDL”,
Free range VHDL, release 1.17, June 2013, pp.5.
[9] CMR Design Automation Private limited, “CADSTAR
TRAINING GUIDE”, Version 14.0.
ISSN: 2231-5381
ChViswanadham
joined
Bharat
Electronics as Deputy Engineer in
1990after completion of B Tech (ECE)
from Nagarjuna University, Guntur,
Andhra Pradesh. He has rich experience
in Design, Production, Testing,
Integration& commissioning of ESM
systems on different types of Naval
platforms. He was instrumental in
configuring in-house ESM for Naval platform and had won
R&D award from BEL. He has also pursued his Master’s
degree in Digital systems from Osmania University during
work at BEL. He joined IETE recently as FELLOW. Presently
he is working as Deputy General Manager in D&E division at
BEL, Hyderabad.
K. Satya Krishna Murthy, presently
working as Assistant Professor in
Gayatri Vidya Parishad College of
Engineering, Department of ECE,
Madhurawada,
Vishakhapatnam,
Andhra Pradesh. He completed his
Bachelor’s
in
Electronics
and
Communications. He did Master’s in
Computers and Communications from J.N.T.U Kakinada. He
deals with data communications and optical communications.
He has 7 years of experience in teaching Profession. He
started his career as Associate professor in Sri Prakash
College of Engineering, Tuni, Andhra Pradesh.
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