International Journal of Engineering Trends and Technology (IJETT) – Volume 10 Number 1 - Apr 2014
An Automotive Software Domain-Combining Runnables Sequencing with Task
Scheduling on Multicore ECU’s
K.Suganyadevi 1, P.Mariaglenny2
1
Assistant Professor/ECE Sri Eshwar College of Engineering,Coimbatore-641202,India.
2
Assistant Professor/ECE Sri Eshwar College of Engineering,Coimbatore-641202,India
Abstract:
The aim of ECU group is to research the
Multicore architecture for automotive safety
applications to meet hard real-time embedded
systems timing and reliability constraints. The
automotive industry needs to change its architectural
approach in developing vehicle electronics systems.
By integrating more number of functions in a limited
set of ECUs. These new features involve greater
complexity in the design, growth, and confirmation
of the software applications. Hence, automotive
industry manufacturers require efficient tools and
design methodologies to fulfill their needs in various
aspects. In this paper ,we address the problem of
sequencing the infinite number of runnables on a
limited set of distinct cores as the sequencer tasks in
order to uniforming the CPU load over time. And
also we are determining the offset between the
runnables allocated on each core for both
synchronous and asynchronous task from the engine
RPM. Further we are reducing the execution time of
numerous runnables using intertask communication
between distinct Multicore ECU’s in efficient
manner.
Index terms: Automotive, Multicore runnable,
load balancing,
fixed priority
scheduling, intertask communication .
preemptive
1.0 INTRODUCTION:
Multisource software running on the same
electronic control unit (ECU) is becoming increasingly
wide spreading the automotive industry. This case is
one of the main reasons that car manufacturers want
to reduce the digit of ECUs, which grow up above
70 for high-end cars. One major outcome of the
ISSN: 2231-5381
Automotive
Open
System
Architecture
(AUTOSAR) initiative and, more specifically, its
operating system (OS) is to help car manufacturers
shift from the “one function per ECU” paradigm to
more centralized architecture designs by providing
appropriate protection mechanism. Another decisive
progression in the automotive industry is that chip
manufacturers are reaching the point where they
can no longer cost effectively meet the increasing
performance requirements through frequency scaling
alone. This condition is one reason that Multicore
ECUs are gradually introduced in the automotive
sphere. The superior level of performance provided
by Multicore architectures may help simplify invehicle architectures by executing on multiple cores
that the software previously run on multiple ECUs.
This possible evolution toward more centralized
architectures is also an opportunity for car
manufacturers to decrease the number of network
associations and buses. As a effect, parts of the
complexity will be transferred from the
electrical/electronic architecture to the hardware and
software architecture of the ECUs[4].However, fixed
priority preemptive scheduling makes it easy to add
functions to an accessible ECU. In practice,
imperative architectural shifts are hindered by the
carryover of ECUs and accessible subnetworks, which
are widely used by generalist car manufacturers. The
scope to which extra centralized architectures will be
adopted thus remains unsure.
As seen in research incentives there is a
demand for better performance with lower power
consumption. The only solution for such requirement
is the shift towards multi-cores In processors with a
single core, the increase in performance was brought
by increasing the most important factor, the clock
frequency. Software development on these machines
was under the assumption that every processor
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International Journal of Engineering Trends and Technology (IJETT) – Volume 10 Number 1 - Apr 2014
generation would run much faster than its
predecessor [12]. This era of steady growth of single
processor performance is over due to the practical
limits on power dissipation and the lack of
exploitable instruction-level parallelism. Therefore,
the common practice to increase processor
performance is by placing multiple computational
cores on one die, the multi-core architecture. Multicore was initially targeted towards desktop
computing but new devices for embedded
applications are increasingly adopting multi-core
architectures In future, it is expected that multi-core
chips will be readily available at a cheaper price due
to large-scale manufacturing by all device
vendors[12].
2.0 SCHEDULING IN THE AUTOMOTIVE
DOMAIN:
2.1 Static partitioning scheme:
Multiprocessor task scheduling is a key
research area in high performance computing.
without violating the deadlines, a set of software
modules called runnables on each processors should
be assigned and allocated at run time in order to
balancing the load over cpu .To overcome the run
time complexities, the runnables
are allocated
statically (i.e partitioning ) on each distinct cores.
2.2 Fixed-Priority Scheduling:
In fixed-priority scheduling, the priority of
a task once assigned, then it will never change. A
new fixed-priority algorithm for scheduling systems
of periodic tasks upon identical multiprocessors is
proposed. This algorithm has an markable
utilization of (m+1)/2 upon m unit-capacity
processors. It is demonstrated that this algorithm is
best possible from the perspective of achievable
utilization in the sense that no fixed-priority
algorithm for scheduling periodic task systems upon
identical multiprocessors may have an achievable
utilization greater than (m+1)/2.[8]
2.3 Fixed-Priority preemptive Scheduling:
Scheduling disciplines are algorithms used
for distributing resources among parties which
simultaneously and asynchronously request them.
The main purposes of scheduling algorithms are to
minimize resource starvation and to ensure fairness
amongst the parties utilizing the resources.
Scheduling deals with the trouble of deciding
allocated demand for their resources. There are many
ISSN: 2231-5381
different scheduling algorithms employed in
automotive domain. Here we are adopting fixed
priority preemptive scheduling. The OS assigns a
fixed priority rank to every method, and the scheduler
arranges the processes in the ready queue in order of
their priority. Higher priority processes first even
then interrupted by incoming lower priority
processes. Overhead is not absent, nor is it
significant. FPPS has no typical advantage in terms
of throughput over FIFO scheduling. Waiting time
and response time of any runnable depend on the
priority of the process. Higher priority processes have
tolerable waiting and response times.
This study deals with the fixed priority
preemptive scheduling of tasks in a real time systems
with hard constraints is mandatory. More specifically
we consider offset free systems where the offset can
be chosen by the scheduling algorithm. The model of
the system is defined by a task set ∆ of cardinality n,
∆={T1,T2,….Tn}.A periodic task T1 is characterized
by a quadruple (Ci.Ti,Di,Oi)where each request of
Ti,called instance, has an execution time of Ci, a
relative deadline Di. Ti time units separate two
consecutive instance of Ti(hence Ti is the period of
the task). The first instance of Ti occurs at time Oi
(the task offset in the following ). The system is said
to be schedulable if each instance finishes before its
deadline. If the system is schedulable in synchronous
case it follows that this is also the case in all
asynchronous situation. [7]. and determine feasible
offset from engine rpm. This is usually done to load
balance a system effectively.
Fig 1. Model of the runnables. After its release, an
instance of a runnable has to be executed before
the next instance is released (i.e., the deadline is
set to the period).
The requirement for a scheduling algorithm is to
perform multitasking (execute more than one
process at a time) and multiplexing (transmit
multiple flows simultaneously) with markable
success rate.
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International Journal of Engineering Trends and Technology (IJETT) – Volume 10 Number 1 - Apr 2014
3.0 MULTICORE RUNNABLE SEQUENCING
4.0 EXPERIMENTATIONS:
ALGORITHM:
4.1 Balancing performance:
3.1 Algorithm Complexity:
The increasing complexity of automotive
electronic systems has had a dramatic effect on the
throughput requirements and peripheral integration of
automotive microcontrollers. Algorithms handle the
inputs from many sensors and communications
systems and control the outputs of many actuators.
Although the majority operating systems are still
developed in-house by the application specialists, the
industry will drift very swiftly towards
standardization of the operating system and network
organization. The OSEK/VDX operating system has
been adopted by many as the open standard. This
standard was developed specifically to decouple the
application code (algorithm) from the network
management tasks and avoid incompatibility
problems between the application code and the
hardware. Implementation of OSEK/VDX should
facilitate reusability and portability of software and
predictable
system
behavior.
In
future
implementation of OSEK operating system is
expected in automotive domain.
Here we determine the performance of the
algorithms to uniformize the cpu load over run time
and it continuously giving the easiest solution at very
complex load levels.
Distribution of the load percentage over time:
100
80
60
core 1
40
core 2
20
0
slot 1 slot 2 slot 3 slot 4
Fig 2 Result of Least Crowded Algorithm.
4.2 Scheduling performances on automotive
ECUs:
3.2. Least crowded algorithm:
In this algorithm, each child runnable is
compared with its parent runnable. If the child
runnable dominates a parent runnable, the child
runnable is accepted as a parent runnable in the next
generation. If a parent runnable dominates the child
runnable, the child runnable is discarded and a new
child runnable must be created. In the case that both
are indifferent, the child runnable will be compared
with an archive of so far best solutions. If it
dominates any member in the archive, it will be a
parent runnable in the next generation. But if the
child runnable does not dominate any member in the
archive, both parent runnable and child runnable are
compared for their nearness (distance) to members of
the archive. If the child runnable resides in a least
crowded region, it is accepted as a parent runnable
and will be added to the archive. In the case that child
runnable and parent runnable have the same nearness
(distance) to the archive, one of them is selected
depending upon the nanosecond priority manner
The aim is to reach the extent to which the
schedulability bound, both in harmonic and
nonharmonic cases. precisely, we measure the
success rate of algorithm in non harmonic case at
load levels will ensure in harmonic cases also.
PERFORMANC
ALGORITHM:
Success rate of
Algorithm
Success % of
LL
Success % of
LP
Success % of
LPσ
Success % of
LC
FOR
SCHEDULING
WCET=500µs
90
CPU load
in %
13
91
13
92
17
98
10
Table:3
ISSN: 2231-5381
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International Journal of Engineering Trends and Technology (IJETT) – Volume 10 Number 1 - Apr 2014
4.3 Intertask communication on distinct ECUs:
Communications between electronic control
units (ECU's) is a growing trend. A modern
automobile may have as many as 70 electronic
control units (ECU) for various subsystems. Some of
the independent subsystems have to communicate
with others are essential so that the controlling
actions takes place.
Multiplexed communications in vehicles
was originally developed compactability, minimizes
interconnections, and difficulty. It soon became
evident though that vehicular systems could be
enhanced greatly with the opportunity to share data
from different ECUs, in real time. Unfortunately, a
single communication protocol is not efficient to
communicate between distinct runnables in
automotive application. Instead a number of different
communications subsystems are integrated together
in a modern vehicle so that we achieve intertask
better communication.
4.4. Synchronized task:
builds a high performance Multicore ECU which has
the power and ability to execute number of
operations at a time without any contradiction
between the synchronized and Nonsynchronized
tasks as for as the offset concerns.
References
[1]
[2]”
[3].
[4]
[5]
Here, synchronized means that the initial
offsets of the different tasks are known and all the
tasks are scheduled using the same basis. As a
consequence, the tasks phasing are known and can be
used when building the slot allocation of the
sequencer tasks. As in the case where we have a
single sequencer ,this problem cannot be solved and a
heuristic approach is required.[4]
[6]
[7].
4.5. Nonsynchronized task:
The tasks are scheduled on varying time
fashion and the task of higher priority can come
before the other tasks because of their run time offset
configuration from clock or the engine
rpm(revolution per minute).The transformation of
sequencer task into multiframe task in order to make
synchronized one to reduce the execution time of
cpu.
[8]“
[9].
[10]
5.0 CONCLUSION:
Multicore chips allow for greater increases
in computing power in contrast to a single CPU
continually made to run faster. For this we integrate
more number of functions on a single core makes
efficient distribution of runnables on cpu over run
time. If the number of ECUs is reduced then we
obtain many more
technical and economical
advantage abroad a modern trendy cars. The project
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