Computer Architecture …………………………………
Lecture No.2
1- CPU Unit
In this Lecture, we focus our attention on the main component of any
computer system, the Central Processing Unit (CPU). The primary function of the
CPU is to execute a set of instructions stored in the computer’s memory.
A typical CPU has three major components:
(1) Register Set,
(2) Arithmetic Logic Unit (ALU),
(3) Control Unit (CU).
Figure (2-1): CPU main components and interactions with the memory and I/O
The CPU can be divided into a data section and a control section. The data
section, which is also called the datapath, contains the registers and the ALU. The
datapath is capable of performing certain operations on data items. The control
section is basically the control unit, which issues control signals to the datapath.
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Computer Architecture …………………………………
Lecture No.2
Internal to the CPU, data move from one register to another and between ALU and
registers. Internal data movements are performed via local buses(using different
organizations including one-bus, two-bus, or three-bus organizations.), which may
carry data, instructions, and addresses. Externally, data move from registers to
memory and I/O devices, often by means of a system bus. In the next section we
ascertain register set.
2- Register set
Registers are essentially extremely fast memory locations within the CPU
that are used to create and store the results of CPU operations and other
calculations. Different computers have different register sets. They differ in the
number of registers (The number of registers in a particular architecture affects the
instruction set design. A very small number of registers may result in an increase in
memory references), register types, and the length of each register.
 Data Registers
The general purpose registers, are used for arithmetic and data movement. Each
register can be addressed as either 16-bit or 8 bit value. Example, AX register is a
16-bit register, its upper 8-bit is called AH, and its lower 8-bit is called AL. Bit 0 in
AL corresponds to bit 0 in AX and bit 0 in AH corresponds to bit 8 in AX. See
Figure (2-2).
Figure (2-2): 16 bit AX register
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Computer Architecture …………………………………
Lecture No.2
Instructions can address either 16-bit data register as AX, BX, CX, and DX
or 8-bit register as AL, AH, BL, BH, CL, CH, Dl, and DH.
Each general purpose register has special attributes:
1- AX (Accumulator): AX is the accumulator register because it is favored by the
CPU for arithmetic operations. Other operations are also slightly more efficient
when performed using AX.
2- BX (Base): the BX register can hold the address of a procedure or variable.
Three other registers with this ability are SI, DI and BP. The BX register can also
perform arithmetic and data movement.
3- CX (Counter): the CX register acts as a counter for repeating or looping
instructions. These instructions automatically repeat and decrement CX.
4- DX (Data): the DX register has a special role in multiply and divide operation.
When multiplying for example DX hold the high 16 bit of the product.
 Segment Registers
The CPU contains four segment registers used as base location for program
instruction, and for the stack.
1- CS (Code Segment): The code segment register holds the base location of all
executable instructions (code) in a program.
2- DS (Data Segment): the data segment register is the default base location for
variables. The CPU calculates their location using the segment value in DS.
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Computer Architecture …………………………………
Lecture No.2
3- SS (Stack Segment): the stack segment register contain the base location of the
stack.
4- ES (Extra Segment): The extra segment register is an additional base location for
memory variables.
 Index registers
Index registers contain the offset of data and instructions. The term offset refers
to the distance of a variable, label, or instruction from its base segment. The index
registers are:
1- BP (Base Pointer): the BP register contain an assumed offset from the stack
segment register, as does the stack pointer. The base pointer register is often used
by a subroutine to locate variables that were passed on the stack by a calling
program.
2- SP (Stack Pointer): the stack pointer register contain the offset of the top of the
stack. The stack pointer and the stack segment register combine to form the
complete address of the top of the stack.
3- SI (Source Index): This register takes its name from the string movement
instruction, in which the source string is pointed to by the source index register.
4- DI (Destination Index): the DI register acts as the destination for string
movement instruction.
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Computer Architecture …………………………………
Lecture No.2
 Status and Control register:
1- IP (Instruction Pointer): The instruction pointer register always contain the
offset of the next instruction to be executed within the current code segment. The
instruction pointer and the code segment register combine to form the complete
address of the next instruction.
2- The Flag Register: is a special register with individual bit positions assigned to
show the status of the CPU or the result of arithmetic operations. The Figure 4
describes the 8086/8088 flags register:
Figure (2-3): Flag Register.
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Computer Architecture …………………………………
Lecture No.2
Note: the following figure (2-4) illustrate Intel 16-bit registers
Figure (2-4) illustrate Intel 16-bit registers
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Computer Architecture …………………………………
Lecture No.2
3-Examples for using registers
A- Write operation
There are three basic steps are needed in order for the CPU to perform a
write operation into a specified memory location:
1. The word to be stored into the memory location is first loaded by the CPU into a
specified register, called the memory data register (MDR).
2. The address of the location into which the word is to be stored is loaded by the
CPU into a specified register, called the memory address register (MAR).
3. A signal, called write, is issued by the CPU indicating that the word stored in the
MDR is to be stored in the memory location whose address in loaded in the MAR.
Suppose that the CPU want to perform operation of writing the word given
by 7E (in hex) into the memory location whose address is 2005. Part (a) of the
figure (2-5) shows the status of the registers and memory locations involved in the
write operation before the execution of the operation. Part (b) of the figure shows
the status after the execution of the operation.
It is worth mentioning that the MDR and the MAR are registers used exclusively
by the CPU and are not accessible to the programmer.
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Computer Architecture …………………………………
Lecture No.2
Figure (2-5) : Illustration of the memory write operation
B- Read Operation
Similar to the write operation, three basic steps are needed in order to
perform a memory read operation:
1. The address of the location from which the word is to be read is loaded into the
MAR.
2. A signal, called read, is issued by the CPU indicating that the word whose
address is in the MAR is to be read into the MDR.
3. After some time, corresponding to the memory delay in reading the specified
word, the required word will be loaded by the memory into the MDR ready for use
by the CPU.
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Computer Architecture …………………………………
Lecture No.2
Figure (2-6): Illustration of the memory read operation
Figure (2-6) illustrates the operation of reading the word stored in the
memory location whose address is 2010. Part a of the figure shows the status of the
registers and memory locations involved in the read operation before the execution
of the operation. Part b of the figure shows the status after the read operation.
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