ADSP-21161N EZ-KIT Lite®
Evaluation System Manual
Revision 2.1, March 2004
Part Number
82-000530-01
Analog Devices, Inc.
One Technology Way
Norwood, Mass. 02062-9106
a
Copyright Information
© 2004 Analog Devices, Inc., ALL RIGHTS RESERVED. This document may not be reproduced in any form without prior, express written
consent from Analog Devices, Inc.
Printed in the USA.
Limited Warranty
The EZ-KIT Lite evaluation system is warranted against defects in materials and workmanship for a period of one year from the date of purchase
from Analog Devices or from an authorized dealer.
Disclaimer
Analog Devices, Inc. reserves the right to change this product without
prior notice. Information furnished by Analog Devices is believed to be
accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use; nor for any infringement of patents or other rights of
third parties which may result from its use. No license is granted by implication or otherwise under the patent rights of Analog Devices, Inc.
Trademark and Service Mark Notice
The Analog Devices logo, VisualDSP++, the VisualDSP++ logo, SHARC,
SHARC logo, CROSSCORE, the CROSSCORE logo, and EZ-KIT Lite
are registered trademarks of Analog Devices, Inc.
All other brand and product names are trademarks or service marks of
their respective owners.
Regulatory Compliance
The ADSP-21161N EZ-KIT Lite evaluation system has been certified to
comply with the essential requirements of the European EMC directive
89/336/EEC (inclusive 93/68/EEC) and, therefore, carries the “CE”
mark.
The ADSP-21161N EZ-KIT Lite evaluation system had been appended to
the Technical Construction File referenced “DSPTOOLS1” dated
December 21, 1997 and was awarded CE Certification by an appointed
European Competent Body as listed below.
Technical Certificate No: Z600ANA1.005
Issued by:
Technology International (Europe) Limited
41 Shrivenham Hundred Business Park
Shrivenham, Swindon, SN6 8TZ, UK
The EZ-KIT Lite evaluation system contains ESD
(electrostatic discharge) sensitive devices. Electrostatic charges readily accumulate on the human
body and equipment and can discharge without
detection. Permanent damage may occur on devices
subjected to high-energy discharges. Proper ESD
precautions are recommended to avoid performance
degradation or loss of functionality. Store unused
EZ-KIT Lite boards in the protective shipping
package.
CONTENTS
iv
ADSP-21161N EZ-KIT Lite Evaluation System Manual
CONTENTS
PREFACE
Purpose of This Manual ................................................................. xiv
Intended Audience ......................................................................... xiv
Manual Contents ............................................................................ xv
What’s New in This Manual ............................................................ xv
Technical or Customer Support ...................................................... xvi
Supported Processors ...................................................................... xvi
Product Information ...................................................................... xvi
MyAnalog.com ........................................................................ xvii
DSP Product Information ........................................................ xvii
Related Documents ................................................................ xviii
Online Documentation ............................................................ xix
Printed Manuals ....................................................................... xix
VisualDSP++ Documentation Set ......................................... xix
Hardware Manuals ................................................................ xx
Data Sheets ........................................................................... xx
Contacting DSP Publications ..................................................... xx
Notation Conventions .................................................................... xxi
ADSP-21161N EZ-KIT Lite Evaluation System Manual
v
CONTENTS
GETTING STARTED
Contents of EZ-KIT Lite Package ................................................. 1-1
PC Configuration ......................................................................... 1-3
Installation Tasks .......................................................................... 1-3
Installing VisualDSP++ and EZ-KIT Lite Software .................. 1-4
Installing and Registering VisualDSP++ License ....................... 1-4
Setting Up EZ-KIT Lite Hardware .......................................... 1-5
Installing EZ-KIT Lite USB Driver ......................................... 1-6
Windows 98 USB Driver .................................................... 1-7
Windows 2000 USB Driver .............................................. 1-11
Windows XP USB Driver ................................................. 1-12
Verifying Driver Installation .................................................. 1-14
Starting VisualDSP++ ........................................................... 1-16
USING EZ-KIT LITE
EZ-KIT Lite License Restrictions .................................................. 2-2
Memory Map ............................................................................... 2-2
Using SDRAM Memory ............................................................... 2-3
Using FLAG Pins ......................................................................... 2-5
Using Interrupt Pins ..................................................................... 2-6
Using Audio Interface ................................................................... 2-6
Example Programs ........................................................................ 2-8
Using Flash Programmer Utility .................................................... 2-8
Using EZ-KIT Lite VisualDSP++ Interface .................................... 2-9
vi
ADSP-21161N EZ-KIT Lite Evaluation System Manual
CONTENTS
Boot Load ............................................................................... 2-9
Target Options ........................................................................ 2-9
While Target is Halted and On Emulator Exit Options ...... 2-10
Other Options .................................................................. 2-10
Core Hang Conditions .......................................................... 2-11
Hardware Breakpoints ........................................................... 2-12
Common Hardware Breakpoint Attributes ......................... 2-13
Global Hardware Breakpoint Options ................................ 2-13
Data Hardware Breakpoints ............................................... 2-15
Instruction Hardware Breakpoints ..................................... 2-16
Other Breakpoints ............................................................. 2-17
Tips and Tricks Using Hardware Breakpoints ..................... 2-18
Latency ......................................................................... 2-18
Restrictions ................................................................... 2-18
Setting a Breakpoint on a Single Address ........................ 2-18
Restricted Software Breakpoints ............................................. 2-19
EZ-KIT LITE HARDWARE REFERENCE
System Architecture ...................................................................... 3-2
External Port ........................................................................... 3-3
Host Processor Interface (HPI) ................................................ 3-3
SPORT Audio Interface ........................................................... 3-3
SPI Audio Interface ................................................................. 3-4
Breadboard Area ...................................................................... 3-4
JTAG Emulation Port .............................................................. 3-5
ADSP-21161N EZ-KIT Lite Evaluation System Manual
vii
CONTENTS
Jumper Settings ............................................................................ 3-5
SDRAM Disable Jumper (JP1) ................................................ 3-5
SPDIF Selection Jumper (JP2) ................................................ 3-5
MCLK Selection Jumper (JP3) ................................................ 3-6
FLAG0 Enable Jumper (JP4) ................................................... 3-7
FLAG1 Enable Jumper (JP5) ................................................... 3-7
Sample Frequency Jumper (JP6) .............................................. 3-7
ADC2 Input Mode Selection Jumpers (JP7–8) ......................... 3-8
MIC Gain Selection Jumpers (JP9–10) .................................... 3-8
ADC1 Input Selection Jumper (JP11) ...................................... 3-9
Processor ID Jumper (JP19) .................................................. 3-10
Boot Mode Selection Jumper (JP20) ...................................... 3-10
Clock Mode Selection Jumper (JP21) .................................... 3-11
~BMS Enable Jumper (JP22) ................................................. 3-12
AD1836 Control Selection Jumper (JP23) ............................. 3-12
SW1 Enable Jumper (JP26) ................................................... 3-12
SW2 Enable Jumper (JP27) ................................................... 3-12
LEDs and Push Buttons .............................................................. 3-13
Reset LEDs (LED1 and LED8) ............................................. 3-14
FLAG LEDs (LED2–7) ......................................................... 3-14
VERF LED (LED9) .............................................................. 3-14
USB Monitor LED (LED10) ................................................. 3-15
Power LED (LED11) ............................................................ 3-15
Programmable FLAG Push Buttons (SW1–4) ........................ 3-15
viii
ADSP-21161N EZ-KIT Lite Evaluation System Manual
CONTENTS
Interrupt Push Buttons (SW5–7) ........................................... 3-15
Board Reset Push Button (SW8) ............................................ 3-16
Connectors ................................................................................. 3-16
USB Connector (P2) ............................................................. 3-16
Audio Connectors (P4–8, P17) .............................................. 3-18
External Port Connector (P9) ................................................ 3-18
Host Processor Interface Connector (P10) .............................. 3-19
JTAG Connector (P12) .......................................................... 3-19
Link Port Connectors (P13–14) ............................................. 3-19
SPORT1 and SPORT3 Connector (P15) ............................... 3-20
Power Connector (P16) ......................................................... 3-20
Specifications .............................................................................. 3-21
Power Supply ........................................................................ 3-21
Board Current Measurements ................................................ 3-21
BILL OF MATERIALS
INDEX
ADSP-21161N EZ-KIT Lite Evaluation System Manual
ix
CONTENTS
x
ADSP-21161N EZ-KIT Lite Evaluation System Manual
PREFACE
Thank you for purchasing the ADSP-21161N EZ-KIT Lite®, Analog
Devices (ADI) evaluation system for SHARC® processors.
The SHARC processors are based on a 32-bit super Harvard architecture
that includes a unique memory architecture comprised of two large
on-chip, dual-ported SRAM blocks coupled with a sophisticated IO processor, which gives SHARC the bandwidth for sustained high-speed
computations. SHARC represents today’s de facto standard for floating-point DSP targeted for premium audio applications.
The evaluation system is designed to be used in conjunction with the
VisualDSP++® development environment to test the capabilities of the
ADSP-21161N SHARC processors. The VisualDSP++ development environment gives you the ability to perform advanced application code
development and debug, such as:
• Create, compile, assemble, and link application programs written
in C++, C, and ADSP-21161N assembly
• Load, run, step, halt, and set breakpoints in application program
• Read and write data and program memory
• Read and write core and peripheral registers
• Plot memory
Access to the ADSP-21161N processor from a personal computer (PC) is
achieved through a USB port or an optional JTAG emulator. The USB
interface gives unrestricted access to the ADSP-21161N processor and the
ADSP-21161N EZ-KIT Lite Evaluation System Manual
xi
evaluation board peripherals. Analog Devices JTAG emulators offer faster
communication between the host PC and target hardware. Analog Devices
carries a wide range of in-circuit emulation products. To learn more about
Analog Devices emulators and DSP development tools, go to
http://www.analog.com/dsp/tools/.
ADSP-21161N EZ-KIT Lite provides example programs to demonstrate
the capabilities of the evaluation board.
VisualDSP++ license provided with this EZ-KIT Lite evaluaL The
tion system limits the size of a user program to 5K words of
internal memory.
The board features:
• Analog Devices ADSP-21161N processor
D
D
100 MHz Core Clock Speed
Core Clock Mode Jumper Configurable
• Analog Devices AD1836 96 kHz Audio Codec
D Jumper Selectable Line-In or Mic-In 3.5 mm Stereo Jack
D Line-Out 3.5 mm Stereo Jack
D 4 RCA Jacks for Audio Input
D 8 RCA Jacks for Audio Output
• Analog Devices AD1852 192 kHz Auxiliary DAC
• Crystal Semiconductor CS8414 96 kHz SPDIF Receiver
D
Optical and Coaxial Connectors for SPDIF Input
• Flash Memory
D
xii
512K x 8-bits
ADSP-21161N EZ-KIT Lite Evaluation System Manual
Preface
• Interface Connectors
D
D
D
D
14-Pin Emulator Connector for JTAG Interface
SPORT Connectors
Link Port 0 and Link Port 1
External Port Connectors (not populated)
• General-Purpose IO
D
D
D
4 Push Button Flags
3 Push Button Interrupts
6 LED Outputs
• Analog Devices ADP3338 and ADP3339 Voltage Regulators
• Breadboard area with typical SMT footprints
The EZ-KIT Lite board has a Flash memory device that can be used to
store user-specific boot code. By configuring the jumpers for EPROM
boot, the board can run as a stand-alone unit. The ADSP-21161N
EZ-KIT Lite package contains a Flash programmer utility, which allows
you to program the flash memory. The “Using Flash Programmer Utility”
is described on page 2-8.
and SPORT2 connect to the audio codec, facilitating creation of
audio-signal processing applications. SPORT1 and SPORT3 connect to
off-board connectors of other serial devices.
SPORT0
Additionally, the EZ-KIT Lite board provides un-installed expansion connector footprints that allow you to connect to the processor’s External
Port (EP) and Host Processor Interface (HPI).
ADSP-21161N EZ-KIT Lite Evaluation System Manual
xiii
Purpose of This Manual
Purpose of This Manual
The ADSP-21161N EZ-KIT Lite Evaluation System Manual provides
instructions for using the hardware and installing the software on your
PC. The text includes guidelines for running your own code on the
ADSP-21161N EZ-KIT Lite. The manual also describes the board’s configuration and components. Finally, a schematic and a bill of materials are
provided as a reference for future ADSP-21161N board designs.
Intended Audience
This manual is a user’s guide and reference to the ADSP-21161N EZ-KIT
Lite evaluation system. Programmers who are familiar with the Analog
Devices SHARC processor architecture, operation, and programming are
the primary audience for this manual.
Programmers who are unfamiliar with Analog Devices SHARC processors
can use this manual in conjunction with the ADSP-21161 SHARC Processor Hardware Reference and ADSP-21160 SHARC Processor Instruction Set
Reference, which describe the DSP’a architecture and instruction set. Programmers who are unfamiliar with VisualDSP++ should refer to the
VisualDSP++ online Help and the VisualDSP++ user’s or getting started
guides. For the locations of these documents, see “Related Documents” on
page -xviii.
xiv
ADSP-21161N EZ-KIT Lite Evaluation System Manual
Preface
Manual Contents
The manual consists of:
• Chapter 1, “Getting Started” on page 1-1
Provides software and hardware installation procedures, PC system
requirements, and basic board information.
• Chapter 2, “Using EZ-KIT Lite” on page 2-1
Provides information on the EZ-KIT Lite from a programmer’s
perspective and provides a simplified memory map.
• Chapter 3, “EZ-KIT Lite Hardware Reference” on page 3-1
Provides information on the hardware aspects of the evaluation
system.
• Appendix A, “Bill Of Materials” on page A-1
Provides a list of components used to manufacture the EZ-KIT
Lite board.
• Appendix B, “Schematics” on page B-1
Provides the resources to allow EZ-KIT Lite board-level debugging
or to use as a reference design.
The appendix is not part of the online Help. The online Help
viewers should go the PDF version of the ADSP-21161N EZ-KIT
Lite Evaluation System Manual located in the Docs\EZ-KIT Lite
Manuals folder on the installation CD to see the schematics.
What’s New in This Manual
This is the third edition of the ADSP-21161N EZ-KIT Lite Evaluation
System Manual. The new edition includes the updated installation and
license registration procedures.
ADSP-21161N EZ-KIT Lite Evaluation System Manual
xv
Technical or Customer Support
Technical or Customer Support
You can reach DSP Tools Support in the following ways.
• Visit the DSP Development Tools website at
www.analog.com/technology/dsp/developmentTools/index.html
• Email questions to
dsptools.support@analog.com
• Phone questions to 1-800-ANALOGD
• Contact your ADI local sales office or authorized distributor
• Send questions by mail to
Analog Devices, Inc.
One Technology Way
P.O. Box 9106
Norwood, MA 02062-9106
USA
Supported Processors
The ADSP-21161N EZ-KIT Lite evaluation system supports Analog
Devices ADSP-21161N SHARC processors.
Product Information
You can obtain product information from the Analog Devices website,
from the product CD-ROM, or from the printed publications (manuals).
xvi
ADSP-21161N EZ-KIT Lite Evaluation System Manual
Preface
Analog Devices is online at www.analog.com. Our website provides information about a broad range of products—analog integrated circuits,
amplifiers, converters, and digital signal processors.
MyAnalog.com
MyAnalog.com is a free feature of the Analog Devices website that allows
customization of a webpage to display only the latest information on
products you are interested in. You can also choose to receive weekly email
notification containing updates to the webpages that meet your interests.
MyAnalog.com provides access to books, application notes, data sheets,
code examples, and more.
Registration:
Visit www.myanalog.com to sign up. Click Register to use MyAnalog.com.
Registration takes about five minutes and serves as means for you to select
the information you want to receive.
If you are already a registered user, just log on. Your user name is your
email address.
DSP Product Information
For information on digital signal processors, visit our website at
www.analog.com/dsp, which provides access to technical publications, data
sheets, application notes, product overviews, and product announcements.
You may also obtain additional information about Analog Devices and its
products in any of the following ways.
• Email questions or requests for information to
dsp.support@analog.com
• Fax questions or requests for information to 1-781-461-3010
(North America) or +49 (0) 89 76903-157 (Europe)
ADSP-21161N EZ-KIT Lite Evaluation System Manual
xvii
Product Information
Related Documents
For information on product related development software, see the following publications.
Table 1. Related DSP Publications
Title
Description
ADSP-21161N DSP Data Sheet
General functional description, pinout, and
timing
ADSP-21161 SHARC Processor Hardware Refer- Description of internal processor architecture,
ence
registers, and all peripheral functions
ADSP-21160 SHARC Processor Instruction Set
Reference
Description of all allowed processor assembly
instructions
Table 2. Related VisualDSP++ Publications
Title
Description
VisualDSP++ 3.5 User’s Guide for 32-Bit Proces- Detailed description of VisualDSP++ 3.5 feasors
tures and usage
xviii
VisualDSP++ 3.5 Assembler and Preprocessor
Manual for SHARC Processors
Description of the assembler function and
commands for SHARC processors
VisualDSP++ 3.5 C/C++ Complier and Library
Manual for SHARC Processors
Description of the complier function and commands for SHARC processors
VisualDSP++ 3.5 Linker and Utilities Manual
for 32-Bit Processors
Description of the linker function and commands for the 32-bit processors
VisualDSP++ 3.5 Loader Manual for 32-Bit
Processors
Description of the loader function and commands for the 32-bit processors
ADSP-21161N EZ-KIT Lite Evaluation System Manual
Preface
The listed documents can be found through online Help or in the Docs
folder of your VisualDSP++ installation. Most documents are available in
printed form.
you plan to use the EZ-KIT Lite board in conjunction with a
L IfJTAG
emulator, refer to the documentation that accompanies the
emulator.
Online Documentation
Your software installation kit includes online Help as part of the Windows® interface. These help files provide information about VisualDSP++
and the ADSP-21161N EZ-KIT Lite evaluation system.
To view VisualDSP++ Help, click on the Help menu item or go to the
Windows task bar and select Start –>Programs –>Analog Devices–>VisualDSP++ for 32-bit Processors –>VisualDSP++ Documentation.
To view ADSP-21161N EZ-KIT Lite Help, which now is a part of the
VisualDSP++ Help system, go the Contents tab of the Help window and
select Manuals –>Hardware Tools –>EZ-KIT Lite Evaluation Systems.
For more documentation, please go to
http://www.analog.com/technology/dsp/library.html.
Printed Manuals
For general questions regarding literature ordering, call the Literature
Center at 1-800-ANALOGD (1-800-262-5643) and follow the prompts.
VisualDSP++ Documentation Set
Printed copies of VisualDSP++ manuals may be purchased through Analog Devices Customer Service at 1-781-329-4700; ask for a Customer
Service representative. The manuals can be purchased only as a kit. For
additional information, call 1-603-883-2430.
ADSP-21161N EZ-KIT Lite Evaluation System Manual
xix
Product Information
If you do not have an account with Analog Devices, you will be referred to
Analog Devices distributors. To get information on our distributors, log
onto www.analog.com/salesdir/continent.asp.
Hardware Manuals
Printed copies of hardware reference and instruction set reference manuals
can be ordered through the Literature Center or downloaded from the
Analog Devices website. The phone number is 1-800-ANALOGD
(1-800-262-5643). The manuals can be ordered by a title or by product
number located on the back cover of each manual.
Data Sheets
All data sheets can be downloaded from the Analog Devices website. As a
general rule, printed copies of data sheets with a letter suffix (L, M, N, S)
can be obtained from the Literature Center at 1-800-ANALOGD
(1-800-262-5643) or downloaded from the website. Data sheets without
the suffix can be downloaded from the website only—no hard copies are
available. You can ask for the data sheet by part name or by product
number.
If you want to have a data sheet faxed to you, the phone number for that
service is 1-800-446-6212. Follow the prompts and a list of data sheet
code numbers will be faxed to you. Call the Literature Center first to find
out if requested data sheets are available.
Contacting DSP Publications
Please send your comments and recommendations on how to improve our
manuals and online Help. You can contact us at
dsp.techpubs@analog.com.
xx
ADSP-21161N EZ-KIT Lite Evaluation System Manual
Preface
Notation Conventions
The following table identifies and describes text conventions used in this
manual.
conventions, which apply only to specific chapters, may
L Additional
appear throughout this document.
Example
Description
Close command
(File menu) or OK
Text in bold style indicates the location of an item within the
VisualDSP++ environment’s and boards’ menu system and user interface
items.
{this | that}
Alternative required items in syntax descriptions appear within curly
brackets separated by vertical bars; read the example as this or that.
[this | that]
Optional items in syntax descriptions appear within brackets and separated by vertical bars; read the example as an optional this or that.
[this,…]
Optional item lists in syntax descriptions appear within brackets delimited by commas and terminated with an ellipsis; read the example as an
optional comma-separated list of this.
PF9–0
Registers, connectors, pins, commands, directives, keywords, code examples, and feature names are in text with letter gothic font.
filename
Non-keyword placeholders appear in text with italic style format.
[
Note:
A note providing information of special interest or identifying a
related topic. In the online version of this book, the word Note appears
instead of this symbol.
Caution:
A caution providing information about critical design or programming
issues that influence operation of a product. In the online version of this
book, the word Caution appears instead of this symbol.
ADSP-21161N EZ-KIT Lite Evaluation System Manual
xxi
Notation Conventions
xxii
ADSP-21161N EZ-KIT Lite Evaluation System Manual
1 GETTING STARTED
This chapter provides information you need to begin using
ADSP-21161N EZ-KIT Lite evaluation system. For correct operation,
install the software and hardware in the order presented in “Installation
Tasks” on page 1-3.
The chapter includes the following sections.
• “Contents of EZ-KIT Lite Package” on page 1-1
Provides a list of the components shipped with this EZ-KIT Lite
evaluation system.
• “PC Configuration” on page 1-3
Describes the minimum requirements for the PC to work with the
EZ-KIT Lite.
• “Installation Tasks” on page 1-3
Describes the step-by-step procedures for setting up the hardware
and software.
Contents of EZ-KIT Lite Package
Your ADSP-21161N EZ-KIT Lite evaluation system package contains the
following items.
• ADSP-21161N EZ-KIT Lite board
• EZ-KIT Lite Installation Procedure
• VisualDSP++ 3.5 Installation Quick Reference Card
ADSP-21161N EZ-KIT Lite Evaluation System Manual
1-1
Contents of EZ-KIT Lite Package
• CD containing:
D
VisualDSP++ 3.5 for 32-bit processors with a limited
license
D
ADSP-21161N EZ-KIT Lite debug software
D
USB driver files
D
Example programs
D
ADSP-21161N EZ-KIT Lite Evaluation System Manual (this
document)
• Universal 7V DC power supply
• USB 2.0 type cable
• Registration card (please fill out and return)
If any item is missing, contact the vendor where you purchased your
EZ-KIT Lite or contact Analog Devices, Inc.
The EZ-KIT Lite evaluation system contains ESD
(electrostatic discharge) sensitive devices. Electrostatic charges readily accumulate on the human
body and equipment and can discharge without
detection. Permanent damage may occur on devices
subjected to high-energy discharges. Proper ESD
precautions are recommended to avoid performance
degradation or loss of functionality. Store unused
EZ-KIT Lite boards in the protective shipping
package.
1-2
ADSP-21161N EZ-KIT Lite Evaluation System Manual
Getting Started
PC Configuration
For correct operation of the VisualDSP++ software and the EZ-KIT Lite,
your computer must have the minimum configuration:
Windows 98, Windows 2000, Windows XP
Intel (or comparable) 166MHz processor
VGA Monitor and color video card
2-button mouse
50 MB free on hard drive
32 MB RAM
Full-speed USB port
CD-ROM Drive
[ EZ-KIT Lite does not run under Windows 95 or Windows NT.
Installation Tasks
The following task list is provided for the safe and effective use of the
ADSP-21161N EZ-KIT Lite. Follow the instructions in the presented
order to ensure correct operation of your software and hardware.
1. VisualDSP++ and EZ-KIT Lite software installation
2. VisualDSP++ license installation and registration
3. EZ-KIT Lite hardware setup
4. EZ-KIT Lite USB driver installation
5. USB driver installation verification
6. VisualDSP++ startup
ADSP-21161N EZ-KIT Lite Evaluation System Manual
1-3
Installation Tasks
Installing VisualDSP++ and EZ-KIT Lite Software
This EZ-KIT Lite comes with the latest version of VisualDSP++ 3.5 for
32-bit processors. VisualDSP++ installation includes EZ-KIT Lite
installations.
To install VisualDSP++ and EZ-KIT Lite software:
1. Insert the VisualDSP++ installation CD into the CD-ROM drive.
2. If Autoplay is enabled on your PC, you see the Install Shield Wizard Welcome screen. Otherwise, choose Run from the Start menu,
and enter D:\ADI_Setup.exe in the Open field, where D is the name
of your local CD-ROM drive.
3. Follow the on-screen instructions to continue installing the
software.
4. At the Custom Setup screen, select your EZ-KIT Lite from the list
of available systems and choose the installation directory.
Click an icon in the Feature Description field to see the selected
system’s description. When you have finished, click Next.
5. At the Ready to Install screen, click Back to change your install
options, click Install to install the software, or click Cancel to exit
the install.
6. When the EZ-KIT Lite installs, the Wizard Completed screen
appears. Click Finish.
Installing and Registering VisualDSP++ License
VisualDSP++ and EZ-KIT Lites are licensed products. You may run only
one copy of the software for each license purchased. Once a new copy of
the VisualDSP++ or EZ-KIT Lite software is installed on your PC, you
must install, register, and validate your licence.
1-4
ADSP-21161N EZ-KIT Lite Evaluation System Manual
Getting Started
The VisualDSP++ 3.5 Installation Quick Reference Card included in your
package will guide you through the licence installation and registration
process (refer to Tasks 1, 2, and 3).
Setting Up EZ-KIT Lite Hardware
The EZ-KIT Lite evaluation system contains ESD
(electrostatic discharge) sensitive devices. Electrostatic
charges readily accumulate on the human body and
equipment and can discharge without detection. Permanent damage may occur on devices subjected to
high-energy discharges. Proper ESD precautions are
recommended to avoid performance degradation or
loss of functionality. Store unused EZ-KIT Lite boards
in the protective shipping package.
The ADSP-21161N EZ-KIT Lite board is designed to run outside your
personal computer as a stand-alone unit. You do not have to open your
computer case.
To connect the EZ-KIT Lite board:
1. Remove the EZ-KIT Lite board from the package. Be careful when
handling the board to avoid the discharge of static electricity,
which may damage some components.
2. Figure 1-1 shows the default jumper settings, connector locations,
and LEDs used in installation. Confirm that your board is set up in
the default configuration before moving to the next step.
3. Plug the provided power supply into P16 on the EZ-KIT Lite
board. Visually verify that the green power LED (LED11) is on. Also
verify that the two red RESET LEDs (LED1 and LED8) go on for a
moment and then go off.
ADSP-21161N EZ-KIT Lite Evaluation System Manual
1-5
Installation Tasks
USB Monitor: LED10
DSP Reset: LED8
Reset: LED1
Power: LED11
Figure 1-1. EZ-KIT Lite Hardware Setup
4. Connect one end of the USB cable to an available full-speed USB
port on your PC and the other end to P2 on the ADSP-21161N
EZ-KIT Lite board.
Installing EZ-KIT Lite USB Driver
The EZ-KIT Lite evaluation system installed on the following platforms
requires one full-speed USB port.
• “Windows 98 USB Driver” on page 1-7 describes the installation
on Windows 98.
•
1-6
“Windows 2000 USB Driver” on page 1-11 describes the installation on Windows 2000.
ADSP-21161N EZ-KIT Lite Evaluation System Manual
Getting Started
•
“Windows XP USB Driver” on page 1-12 describes the installation
on Windows XP.
The USB driver used by the debug agent is not Microsoft certified because
it is intended for a development or laboratory environment, not a commercial environment.
Windows 98 USB Driver
Before using the ADSP-21161N EZ-KIT Lite for the first time, the Windows 98 USB driver must first be installed.
To install the USB driver:
1. Insert the CD into the CD-ROM drive.
The connection of the device to the USB port activates the Windows 98 Add New Hardware Wizard shown in Figure 1-2.
Figure 1-2. Windows 98 – Add New Hardware Wizard
2. Click Next.
ADSP-21161N EZ-KIT Lite Evaluation System Manual
1-7
Installation Tasks
3. Select Search for the best driver for your device, as shown in
Figure 1-3.
Figure 1-3. Windows 98 – Searching for Driver
4. Click Next.
5. Select CD-ROM drive, as shown in Figure 1-4.
Figure 1-4. Windows 98 – Searching for CD-ROM
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ADSP-21161N EZ-KIT Lite Evaluation System Manual
Getting Started
6. Click Next.
Windows 98 locates the WmUSBEz.inf file on the installation CD, as
shown in Figure 1-5.
Figure 1-5. Windows 98 – Locating Driver
7. Click Next.
The Coping Files dialog box appears (Figure 1-6).
Figure 1-6. Windows 98 – Searching for .SYS File
ADSP-21161N EZ-KIT Lite Evaluation System Manual
1-9
Installation Tasks
8. Click Browse.
The Open dialog box, shown in Figure 1-7, appears on the screen.
Figure 1-7. Windows 98 – Opening .SYS File
9. In Drives, select your CD-ROM drive.
10. Click OK. The Copying Files dialog box (Figure 1-8) appears.
Figure 1-8. Windows 98 – Copying .SYS File
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ADSP-21161N EZ-KIT Lite Evaluation System Manual
Getting Started
11. Click OK.
The driver installation is now complete, as shown in Figure 1-9.
Figure 1-9. Windows 98 – Completing Software Installation
12. Click Finish to exit the wizard.
13.Verify the installation by following the instructions in “Verifying
Driver Installation” on page 1-14.
Windows 2000 USB Driver
VisualDSP++ 3.5 installation software pre-installs the necessary drivers for
the selected EZ-KIT Lite. The install also upgrades an older driver if such
is detected in the system.
to running the VisualDSP++ 3.5 installer, ensure there are no
[ Prior
other Hardware Wizard windows running in the background. If
there are any wizard windows running, close them before starting
the installer.
ADSP-21161N EZ-KIT Lite Evaluation System Manual
1-11
Installation Tasks
To install the USB driver:
1. If VisualDSP++ 3.5 is already installed on your system, go to
step 2.
Otherwise, run VisualDSP++ 3.5 installation. Refer to the VisualDSP++ 3.5 Installation Quick Reference Card for a detailed
installation description.
When installing VisualDSP++ 3.5 on Windows 2000, make sure
the appropriate EZ-KIT Lite component is selected for the
installation.
2. Connect the EZ-KIT Lite device to your PC’s USB port.
Windows 2000 automatically detects an EZ-KIT device and automatically installs the appropriate driver for the selected device (see
step 1).
3. Verify the installation by following the instructions in “Verifying
Driver Installation” on page 1-14.
Windows XP USB Driver
VisualDSP++ 3.5 installation software pre-installs the necessary drivers for
the selected EZ-KIT Lite. The install also upgrades an older driver if such
is detected in the system.
to running the VisualDSP++ 3.5 installer, ensure there are no
[ Prior
other Hardware Wizard windows running in the background. If
there are any wizard windows running, close them before starting
the installer.
To install the USB driver:
1. If VisualDSP++ 3.5 is already installed on your system, go to
step 2.
Otherwise, run VisualDSP++ 3.5 installation. Refer to the VisualDSP++ 3.5 Installation Quick Reference Card for a detailed
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ADSP-21161N EZ-KIT Lite Evaluation System Manual
Getting Started
installation description.
When installing VisualDSP++ 3.5 on Windows XP, make sure the
appropriate EZ-KIT Lite component is selected for the installation.
2. Connect the EZ-KIT Lite device to your PC’s USB port.
By connecting the device to the USB port you activate the Windows XP Found New Hardware Wizard, shown in Figure 1-10.
Figure 1-10. Windows XP – Found New Hardware Wizard
3. Select Install the software automatically (Recommended) and
click Next.
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Installation Tasks
When Windows XP completes the driver installation for the
selected device (see step 1), a window shown in Figure 1-11
appears on the screen.
Figure 1-11. Windows XP – Completing Driver Installation
4. Verify the installation by following the instructions in “Verifying
Driver Installation”.
Verifying Driver Installation
Before launching the EZ-KIT Lite evaluation system, verify that the USB
driver software is installed properly:
1. Ensure that the USB cable connects to the evaluation board and
the PC.
2. Press and release the RESET button (SW8) on the evaluation board.
3. Verify that the red DSP RESET LED (LED8) blinks once and then
blinks again in 15 seconds.
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ADSP-21161N EZ-KIT Lite Evaluation System Manual
Getting Started
4. After the DSP RESET LED (LED8) blinks for the second time, verify that the yellow USB monitor LED (LED10) is lit. This signifies
that the board is communicating properly with the host PC and is
ready to run VisualDSP++.
5. Verify that the USB driver software is installed properly.
Open Windows Device Manager and verify that ADSP-21161N
EZ-KIT Lite shows under ADI Development Tools with no exclamation point, as in Figure 1-12.
Figure 1-12. Device Manager Window
Lite on Windows 98, disconnect the USB
[ Ifcableusingfroman theEZ-KIT
board before booting the PC. When Windows 98 is
booted and you are logged on, re-connect the USB cable to the
board. The operation should continue normally from this point.
ADSP-21161N EZ-KIT Lite Evaluation System Manual
1-15
Installation Tasks
Starting VisualDSP++
To set up a session in VisualDSP++:
1. Verify that the yellow USB monitor LED (LED10, located near the
USB connector) is lit. This signifies that the board is communicating properly with the host PC and is ready to run VisualDSP++.
2. Hold down the Control (CTRL) key.
3. Select the Start button on the Windows taskbar, then choose
Programs–>Analog Devices –>VisualDSP++ for 32-bit Processors–>VisualDSP++ Environment.
If you are running VisualDSP++ for the first time, go to step 4. If
you already have existing sessions, the Session List dialog box
appears on the screen.
4. Click New Session.
5. The New Session dialog box, shown in Figure 1-13, appears on the
screen.
Figure 1-13. New Session Dialog Box
6. In Debug Target, choose EZ-KIT Lite (ADSP-21161N).
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ADSP-21161N EZ-KIT Lite Evaluation System Manual
Getting Started
7. In Processor, choose the appropriate processor, ADSP-21161N.
8. Type a new target name in Session Name or accept the default
name.
9. Click OK to return to the Session List. Highlight the new session
and click Activate.
ADSP-21161N EZ-KIT Lite Evaluation System Manual
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Installation Tasks
1-18
ADSP-21161N EZ-KIT Lite Evaluation System Manual
2 USING EZ-KIT LITE
This chapter provides specific information to assist you with developing
programs for the ADSP-21161N EZ-KIT Lite evaluation system. This
information appears in the following sections.
• “EZ-KIT Lite License Restrictions” on page 2-2
Describes the restrictions of the VisualDSP++ license shipped with
the EZ-KIT Lite.
• “Memory Map” on page 2-2
Defines the ADSP-21161N EZ-KIT Lite’s memory map.
• “Using SDRAM Memory” on page 2-3·
Defines the register values to configure the on-board SDRAM.
• “Using FLAG Pins” on page 2-5
Describes the board’s FLAG pins.
• “Using Interrupt Pins” on page 2-6
Describes the board’s interrupt pins.
• “Using Audio Interface” on page 2-6
Describes the board’s audio interface.
• “Example Programs” on page 2-8
Provides information about example programs included in the
ADSP-21161N EZ-KIT Lite.
• “Using Flash Programmer Utility” on page 2-8
Provides information on the Flash Programmer utility included
with the EZ-KIT Lite software.
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2-1
EZ-KIT Lite License Restrictions
• “Using EZ-KIT Lite VisualDSP++ Interface” on page 2-9
Describes the trace, performance monitoring, boot loading, context
switching, and target options facilities of the EZ-KIT Lite system.
For detailed information on how to program the ADSP-21161N SHARC
processor, refer to the documents referenced in “Related Documents”.
EZ-KIT Lite License Restrictions
The license shipped with the EZ-KIT Lite imposes the following
restrictions.
• The size of a user program’s code is limited to 5K words (1/4) of
the ADSP-21161N processor’s program memory space.
• No connections to simulator or emulator sessions are allowed.
• The EZ-KIT Lite hardware must be connected and powered up in
order to use VisualDSP++ with a kit license.
Memory Map
The ADSP-21161N processors includes 1 Mbit of internal SRAM for program storage or data storage. The configuration of internal SRAM is
detailed in the ADSP-21161 SHARC Processor Hardware Reference.
The ADSP-21161N EZ-KIT Lite board contains 512K x 8-bits of external Flash memory. The Flash memory is connected to the processors’s
~MS1 and ~BMS memory select pins. The Flash memory can be accessed in
either the boot memory space or the external memory space. The external
memory interface is also connected to 1M x 48-bit SDRAM memory. The
Flash memory is connected to the ~MS0 pin.
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ADSP-21161N EZ-KIT Lite Evaluation System Manual
Using EZ-KIT Lite
Table 2-1. EZ-KIT Lite Evaluation Board Memory Map
Internal
Memory
External
Memory
Start Address
End Address
Content
0x0000 0000
0x0001 FFFF
IOP Registers (Internal)
0x0002 0000
0x0002 1FFF
Block 0 Long Word Addressing
0x0002 8000
0x0002 9FFF
Block 1 Long Word Addressing
0x0004 0000
0x0004 3FFF
Block 0 Normal Word Addressing
0x0005 0000
0x0005 3FFF
Block 1 Normal Word Addressing
0x0008 0000
0x0008 7FFF
Block 0 Short Word Addressing
0x000A 0000
0x000A 7FFF
Block 1 Short Word Addressing
0x0010 0000
0x001F FFFF
Multi-processor Memory Space
0x0020 0000
0x002F FFFF
External Memory Space Bank 0 (SDRAM)
0x0400 0000
0x047F FFFF
External Memory Space Bank 1 (FLASH)
0x0800 0000
0x0BFF FFFF
External Memory Space Bank 2
0x0C00 0000
0x0FFF FFFF
External Memory Space Bank 3
Using SDRAM Memory
To use the SDRAM memory, set the two SDRAM control registers to the
values shown in Listing 2-1.
Listing 2-1. ADSP-21161N EZ-KIT Lite – SDRAM Settings
/* SDRAM Controller Setup for the ADSP-21161N EZ-KIT Lite
*/
/* Assumes SDRAM part# Micron MT48LC16M16A1-7SE (1Mx16-bit,
2 banks)
*/
/* Default Factory Hardware settings (rev2.3)
*/
/* LK_CFG[1:0]= 10,~CLDBL=1
*/
/* CLKIN=25 MHz, => CCLK=100 MHz
*/
/* 3 SDRAMs by 16 bits wide total = 3x(1Mx16-bit) = 1M x 48-bit */
ADSP-21161N EZ-KIT Lite Evaluation System Manual
2-3
Using SDRAM Memory
/* Mapped to MS0 addresses 0x00200000-0x002fffff */
/* Estimated SDCLK 50 MHz => SDCKR=0
*/
/* Settings must be double counted for SDCKR-bit=0, except CAS
Latency) */
/* 50 MHz min @ CL=2 -> SDCL=2 [CAS Latency]
*/
/* tRAS=42ns min
-> SDTRAS=5*2=10 [precharge delay]
*/
/* tRP=21ns min
-> SDTRP=3*2=6
[active delay]
*/
/* tRCD=20ns min
-> SDTRCD=2*2=4
[CAS-to-RAS delay] */
/* tREF=64ms/4K rows ->
*/
/* -> SDRDIV= (100MHz*64ms/4096) – 13 = 1549 = 0x60D cycles */
/* Note: If you change any clock, you have to change all settings
for best performance */
init_21161_SDRAM_controller:
ustat1=dm(WAIT);
bit clr ustat1 0x000FFFFF;
/* clear MS0 wait state count */
dm(WAIT)=ustat1;
ustat1=0x60D;
/* refresh rate */
dm(SDRDIV)=ustat1;
ustat1=0x040146A2;
/* mask in SDRAM settings */
dm(SDCTL)=ustat1;
init_21161_SDRAM_controller.end:
rts;
The SDRAM registers are configured automatically through the debugger.
Checking the Manual External Mem configuration box in the Target
Options dialog box, as shown in Figure 2-1 on page 2-10, disables the
automatic setting.
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ADSP-21161N EZ-KIT Lite Evaluation System Manual
Using EZ-KIT Lite
Using FLAG Pins
The ADSP-21161N holds 12 asynchronous FLAG IO pins. Ten of these
pins (FLAG0–9) are available for interaction with the running program.
After the processor is reset, the FLAGs are configured as inputs. The directions of the FLAGs are configured though the MODE2 register and are set
and read though the FLAG registers. The FLAG registers are summarized in
Table 2-2. For more information on FLAGs, refer to the ADSP-21161
SHARC Processor Hardware Reference.
Table 2-2. FLAG Pin Summary
FLAG1
Connects To
Description
FLAG0
SW1/AD1836_SPI_SELECT
FLAG0
FLAG1
SW2/AD1852_SPI_SELECT
FLAG1
FLAG2
SW3
FLAG2
connects to push button SW1 for user
input and to the SPI select pin on the AD1836
audio codec.
connects to push button SW2 for user
input and to the SPI select pin on the AD1852
auxiliary DAC.
connects to push button SW3 for user
input.
FLAG3
SW4
FLAG3
connects to push button SW4 for user
input.
FLAG4–FLAG9
FLAG10
FLAG11
1
and
FLAG0–FLAG3
connect to LEDs on the EZ-KIT Lite
board and are for user output.
LED2–LED7
FLAG4–9
Not connected
Not available
are available on connector P10.
ADSP-21161N EZ-KIT Lite Evaluation System Manual
2-5
Using Interrupt Pins
Using Interrupt Pins
The ADSP-21161N holds three interrupt pins (IRQ0–2) that let you interact with the running program. Each of the three external interrupts is
directly accessible through the push button switches SW5–SW7 on the
EZ-KIT Lite board. Interrupt pins are summarized in Table 2-3. For more
information, refer to the ADSP-21161 SHARC Processor Hardware
Reference.
Table 2-3. Interrupt Pin Summary
Interrupt1
Connects To
Description
IRQ0
SW5
IRQ0–2
IRQ1
SW6
IRQ2
SW7
1
IRQ0–3
connect to the push buttons and supply
feedback for program execution. For instance, you
can write your code to trigger a FLAG when a
routine is complete.
are available on connector P10.
Using Audio Interface
The audio interface consists of the AD1836 audio codec, the AD1852
auxiliary DAC and the CS8414 SPDIF receiver. SPORT0 and SPORT2 connect to the audio devices and provide 3 channels of stereo input (1
channel digital, 2 channels analog) and 4 channels of stereo output.
Analog audio input is facilitated by a 3.5 mm stereo jack (P7) and four
RCA mono jacks (P6). One of the AD1836 stereo input channels is dedicated to two of the RCA mono jacks. The other stereo input channels can
either be supplied by the 3.5 mm stereo jack or the other two RCA mono
jacks. JP11 determines which jack is used for audio input. Digital audio
input can be provided on either a single RCA mono jack (P5) or an optical
input connector (P4). JP2 determines the source. Three of the stereo out-
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ADSP-21161N EZ-KIT Lite Evaluation System Manual
Using EZ-KIT Lite
put channels come from the AD1836, while the final channel is from the
AD1852. See “Audio Connectors (P4–8, P17)” on page 3-18 for more
information about the connectors.
The AD1836 multi-channel codec features six digital-to-analog converters
(DACs) and four analog-to-digital converters (ADCs) and supports multiple digital stereo channels with 24-bit conversion resolution and a 96 kHz
sample rate. The AD1836 features a 108 dB dynamic range for each of its
six DACs and a 104 dB dynamic range for its four ADCs. The AD1836 is
configured through its SPI port. The ADSP-21161N processor is capable
of accessing the AD1836’s SPI port through the SPI port as well as
through SPORT1. For more information, see “AD1836 Control Selection
Jumper (JP23)” on page 3-12.
The AD1852 is a complete 18/20/24-bit single-chip stereo digital audio
playback system. It is comprised of a multibit sigma-delta modulator, digital interpolation filters, and analog output drive circuitry. Other features
include an on-chip stereo attenuator and mute, programmed through an
SPI-compatible serial control port. The AD1852 is fully compatible with
all known DVD formats, including 192 kHz and 96 kHz sample frequencies and 24 bits. It also is backwards compatible by supporting 50/15µs
digital de-emphasis intended for “redbook” Compact Discs, as well as
de-emphasis at 32 kHz and 48 kHz sample rate.
The CS8414 is a monolithic CMOS device that receives and decodes
audio data up to 96 kHz, according to the AES/EBU, IEC958, S/PDIF,
and EIAJ CP340/1201 interface standards. The CS8414 receives data
from a transmission line, recovers the clock and synchronization signals,
and de-multiplexes the audio and digital data. The CS8414 is setup to
operate in I2S compatible mode.
The Microphone and Line-In jacks connect to the left and right ADC1
channel on the AD1836, depending on the setting of jumpers. See “MIC
Gain Selection Jumpers (JP9–10)” on page 3-8 and “ADC1 Input Selection Jumper (JP11)” on page 3-9 for more information. Two RCA jacks
ADSP-21161N EZ-KIT Lite Evaluation System Manual
2-7
Example Programs
connect to ADC2 on the AD1836. This input is configured though the
input mode selection jumpers, See “ADC2 Input Mode Selection Jumpers
(JP7–8)” on page 3-8 for more information.
The Line-Out jacks connect to the left and right DAC outputs of the
AD1836 and AD1852.
The CS8414 includes an error flag (VERF) to indicate that the audio output may not be valid. This signal connects to a LED (LED9) on the board.
This signal may also be used by interpolation filters to provide error
correction.
Example Programs
Example programs are provided with the ADSP-21161N EZ-KIT Lite to
demonstrate various capabilities of the evaluation board. These programs
are installed with the EZ-KIT Lite software and can be found in
\…\VisualDSP 3.5 32-Bit\211xx\EZ-KITs\ADSP-21161N\Examples. Please
refer to the readme file provided with each example for more information.
Using Flash Programmer Utility
The ADSP-21161N EZ-KIT Lite evaluation system includes a Flash Programmer utility. The utility allows you to program the Flash memory on
the EZ-KIT Lite. The Flash Programmer is installed with VisualDSP++.
Once the utility is installed, it is accessible from the Tools pull-down
menu.
For more information on the Flash Programmer utility, select Start and
choose Programs–>Analog Devices–>VisualDSP++ 3.5 for 32-bit Processors–>VisualDSP++ Documentation.
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ADSP-21161N EZ-KIT Lite Evaluation System Manual
Using EZ-KIT Lite
Using EZ-KIT Lite VisualDSP++ Interface
This section provides information about the following parts of the VisualDSP++ graphical user interface:
• “Boot Load” on page 2-9
• “Target Options” on page 2-9
• “Core Hang Conditions” on page 2-11
• “Hardware Breakpoints” on page 2-12
• “Restricted Software Breakpoints” on page 2-19
Boot Load
Choosing Boot Load from the Settings menu runs the processor and performs a hard reset on the board. This command saves you from having to
shut down VisualDSP++, reset the EZ-KIT Lite board, and bring up VisualDSP++ again when you want to perform a hard reset.
Use this feature when loading debug boot code from an external part or
when you want to put the device into a known state.
Target Options
Choosing Target Options from the Settings menu opens the Target
Options dialog box (Figure 2-1). Use target options to control certain
aspects of the processor on the ADSP-21161N EZ-KIT Lite evaluation
system.
ADSP-21161N EZ-KIT Lite Evaluation System Manual
2-9
Using EZ-KIT Lite VisualDSP++ Interface
Figure 2-1. Target Options Dialog Box
While Target is Halted and On Emulator Exit Options
This target option controls the processor’s behavior when VisualDSP++
relinquishes DSP control (for example, when exiting VisualDSP++). The
options are detailed in Table 2-4 and Table 2-5.
Table 2-4. While Target is Halted Options
Option
Description
Stop I/O DMA Stops IO DMAs in emulator space. This option disables DMA requests when
the emulator has control of the DSP. Data in the EP, LINK, or SPORT DMA
buffers are held there unless the internal DMA request was already granted.
This option holds off incoming data and ceases outgoing data. Because
SPORT-receive data cannot be held off, it is lost, and the overrun bit is set. The
direct write buffer (internal memory write) and the EP pad buffer are allowed
to flush any remaining data to internal memory.
Other Options
Table 2-6 describes other available target options.
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Table 2-5. On Emulator Exit Options
Option
Description
On Emulator
Exit
Determines the state the DSP is left in when the emulator relinquishes control
of the DSP:
Reset DSP and Run causes the DSP to reset and begin execution from its reset
vector location.
Run from current PC causes the DSP to begin running from its current location.
Table 2-6. Other Target Options
Option
Description
Reset before loading executable
Resets registers before loading a DSP executable. Clear this option
when DSP registers must not change to their reset values when a file
load occurs.
Verify all writes to target
memory
Validates all memory writes to the DSP. After each write, a read is
performed and the values are checked for a matching condition.
Enable this option during initial program development to locate
and fix initial build problems (such as attempting to load data into
non-existent memory).
Clear this option to increase performance while loading executable
files since VisualDSP++ does not perform the extra reads that are
required to verify each write.
Reset cycle counters on
run
Resets the cycle count registers to zero before a Run command is
issued. Select this option to count the number of cycles executed
between breakpoints in a program.
Manual Extern Mem configuration
Disables the automatic configuration of the SDRAM registers (done
through the debugger).
Core Hang Conditions
Certain peripheral devices, such as host ports, DMA, and link ports, can
hold off the execution of processor instructions. This is known as a hung
condition and commonly occurs when reading from an empty port or
writing to a full port. If an attempt to halt the processor is made during
one of these conditions, the EZ-KIT Lite may encounter a core hang.
ADSP-21161N EZ-KIT Lite Evaluation System Manual
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Using EZ-KIT Lite VisualDSP++ Interface
Normally, a core hang can be cleared by the board using a special
clear/abort bit. However, there are cases in which it is desirable or possible
not to clear the core hang. Sometimes it is desirable to wait for the core
hang to clear itself, such as when waiting for a host processor to read or
write data. In other cases, it is not possible to clear the core hang, and a
DSP reset must occur to continue the debugging session.
Table 2-7 describes the EZ-KIT Lite’s core hang operations.
Table 2-7. Core Hang Operations
Option
Description
Abort
Abort the hung operation. This causes the offending instruction to be
aborted in the pipeline.
Retry
Allows you to remedy the hung operation. For example, if a host processor is holding off the DSP, you can cause the host to clear the hung condition.
Ignore
Performs a software reset on the target board.
Clear
Aborts the hung operation. This causes the offending instruction to be
aborted in the pipeline.
Acknowledge
Allows you to remedy the hung operation. For example, if a host processor is holding off the DSP, you can cause the host to clear the hung condition.
Reset
Performs a software reset on the target board.
Hardware Breakpoints
Hardware breakpoints work similarly to watchpoints. Set hardware breakpoints on:
• Data transfers within a user-defined memory range
• Instructions
• Register reads and writes
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ADSP-21161N EZ-KIT Lite Evaluation System Manual
Using EZ-KIT Lite
To enable hardware breakpoints for ADSP-21161N DSPs:
1. From the Settings menu, choose Hardware Breakpoints.
2. The Hardware Breakpoints dialog box appears. The dialog box has
three tabbed pages: Data, Instruction, and Other (Figure 2-2).
Figure 2-2. Hardware Breakpoints Dialog Box
Refer to the following sections for information about hardware
breakpoints.
• “Common Hardware Breakpoint Attributes” on page 2-13
• “Global Hardware Breakpoint Options” on page 2-13
• “Data Hardware Breakpoints” on page 2-15
• “Instruction Hardware Breakpoints” on page 2-16
• “Other Breakpoints” on page 2-17
• “Tips and Tricks Using Hardware Breakpoints” on page 2-18
Common Hardware Breakpoint Attributes
Each of the three tabs in the Hardware Breakpoints dialog box has common attributes. The common attributes are described in Table 2-8.
Global Hardware Breakpoint Options
For ADSP-21161N DSPs, the options listed in Table 2-9 apply to all
hardware breakpoints, regardless of their type.
ADSP-21161N EZ-KIT Lite Evaluation System Manual
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Using EZ-KIT Lite VisualDSP++ Interface
Table 2-8. Common Hardware Breakpoint Attributes
Attribute
Description
Enable
Enables each individual breakpoint.
Start Address
End Address
Specify inclusive start and end addresses. Each pair of addresses sets up an
address range for the particular breakpoint.
Exclusive
Enables breaks outside of the specified (inclusive) address range.
Mode
Data page and Other page only. This option specifies the modes that trigger hardware breakpoints. The available choices are:
Disabled—disables the breakpoint
On Write—triggers the breakpoint on any write operation to the specified
address range
On Read—triggers the breakpoint on any read operation from the specified address range
Any Access—triggers the breakpoint on any read or write access to the
specified address range.
Table 2-9. Global Hardware Breakpoint Options
Option
Description
Skip N Breakpoint
Events
Specifies the number of breakpoint events to be ignored before stopping
the processor. Each time a hardware breakpoint condition occurs, the
count decrements. When the count reaches zero (0), the DSP processes the
hardware break. Use this option to count the number of times a break
operation occurs. Breakpoints within the group are ORed together to create this condition.
Restore Skip Count
on Break
Enables skip-count decrement as specified in Skip N Breakpoint Events.
Restore Skip Count
on Break
Causes the emulator to restore the Skip Count to the value at program
RESTART. Otherwise, the Skip Count remains at its current value.
AND All Breakpoints
ANDs the interrupts to form the composite interrupt. Normally, the group
interrupts are ORed to create a composite interrupt.
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ADSP-21161N EZ-KIT Lite Evaluation System Manual
Using EZ-KIT Lite
Data Hardware Breakpoints
For ADSP-21161N DSPs, use data breakpoints to break on accesses to
internal memory, IOP registers, the external port (EP), and multiprocessor memory space (MMS).
The following actions trigger a data breakpoint:
•
DAG1
access
•
DM()
modifier access
The two data breakpoints are ORed to generate a single data breakpoint
condition.
The Data page of the Hardware Breakpoints dialog box, which permits
the specification of two data breakpoints, is shown in Figure 2-3.
Figure 2-3. Data Page of Hardware Breakpoints Dialog Box
ADSP-21161N EZ-KIT Lite Evaluation System Manual
2-15
Using EZ-KIT Lite VisualDSP++ Interface
Instruction Hardware Breakpoints
For ADSP-21161N DSPs, an instruction breakpoint occurs when an
instruction is executed within one of the specified address ranges. The
four individual instruction breakpoints are ORed to generate a single
instruction breakpoint condition.
Shown below is the Instruction page of the Hardware Breakpoints dialog
box, which permits the specification of four individual instruction
breakpoints.
Figure 2-4. Instruction Page of Hardware Breakpoints Dialog Box
2-16
ADSP-21161N EZ-KIT Lite Evaluation System Manual
Using EZ-KIT Lite
Other Breakpoints
For SHARC DSPs, the Other page of the Data Breakpoints dialog box
permits the specification of hardware breakpoints triggered by access to
PM data, IO, or the external port.
Figure 2-5. Other Page of Hardware Breakpoints Dialog Box
Table 2-10. Other Hardware Breakpoint Options
Option
Description
PM DataEvents
Enables PM data breakpoints. PM data breakpoints are similar to data
breakpoints (Data page), except accesses that trigger a PM breakpoint are
made by DAG2 or the PM() modifier. Like data breakpoints, PM data
breakpoints cause a break on accesses to internal memory, IOP registers,
the external port (EP), and multiprocessor memory space (MMS).
I/O
Enables IO breakpoints. IO breakpoints are triggered by accesses made on
the IO Address Bus. Use an IO breakpoint to break on accesses made during DMA transfers, MMS accesses, and Host accesses.
ADSP-21161N EZ-KIT Lite Evaluation System Manual
2-17
Using EZ-KIT Lite VisualDSP++ Interface
Table 2-10. Other Hardware Breakpoint Options (Cont’d)
Option
Description
External Port
Enables external port breakpoints.External port (EP) breakpoints are triggered by accesses made through the External Port. Use an EP breakpoint to
break on accesses made to any external device that may be tied to the EP,
such as external memory.
AND All Breakpoints
ANDs the interrupts to form the composite interrupt. Normally, the group
interrupts are ORed to create a composite interrupt.
Tips and Tricks Using Hardware Breakpoints
Be aware of the following tips and tricks when using hardware breakpoints
on ADSP-21161N processors.
Latency
For SHARC processors, hardware breakpoints do not assert until two (2)
instruction cycles after the actual break condition occurs
Restrictions
When using hardware breakpoints, do not place breaks at any address
where a JUMP, CALL, or IDLE instruction would be illegal.
Do not place breaks in the last few instructions of a DO LOOP or in the
delay slots of a delayed branch. For more information on these illegal locations, refer to your DSP’s Hardware Reference.
Setting a Breakpoint on a Single Address
To set a breakpoint on a single address, set the Start Address equal to the
End Address.
2-18
ADSP-21161N EZ-KIT Lite Evaluation System Manual
Using EZ-KIT Lite
Restricted Software Breakpoints
The EZ-KIT Lite development system restricts breakpoint placement
when certain conditions are met. That is, under some conditions, breakpoints cannot be placed effectively. Such conditions depend on bus
architecture, pipeline depth, and ordering of the EZ-KIT Lite and its target processor.
ADSP-21161N EZ-KIT Lite Evaluation System Manual
2-19
Using EZ-KIT Lite VisualDSP++ Interface
2-20
ADSP-21161N EZ-KIT Lite Evaluation System Manual
3 EZ-KIT LITE HARDWARE
REFERENCE
This chapter describes the hardware design of the ADSP-21161N EZ-KIT
Lite board. The following topics are covered.
• “System Architecture” on page 3-2
Describes the configuration of the ADSP-21161N EZ-KIT Lite
board and explains how the board components interface with the
processor.
• “Jumper Settings” on page 3-5
Shows the location and describes the function of the on-board
jumpers.
• “LEDs and Push Buttons” on page 3-13
Shows the location and describes the function of the LEDs and
push buttons.
• “Connectors” on page 3-16
Shows the location and gives the part number for the on-board
connectors. Also, the manufacturer and part number information is
given for the mating parts.
• “Specifications” on page 3-21
Provides the board’s measurements and power supply
specifications.
ADSP-21161N EZ-KIT Lite Evaluation System Manual
3-1
System Architecture
System Architecture
This section describes the processor’s configuration on the EZ-KIT Lite
board.
Figure 3-1. System Architecture Block Diagram
The ADSP-21161N processor’s core voltage is 1.8V, and the external
interface voltage is 3.3V.
A 25 MHz through-hole oscillator supplies the input clock to the processor. Footprints are provided on the board for a surface-mount oscillator
and a through-hole crystal for alternate user-installed clocks. The speed at
3-2
ADSP-21161N EZ-KIT Lite Evaluation System Manual
EZ-KIT Lite Hardware Reference
which the core operates is determined by the location of the clock mode
jumper (JP21) as described on page 3-11. By default, the processor core
runs at 100 MHz.
External Port
The External Port (EP) of the processor connects to a 512K x 8-bit Flash
memory. The Flash memory connects to the boot memory select (~BMS)
pin and the memory select 1 (~MS1) pin. The connection allows the Flash
memory to be used to boot the processor as well as to store information
during normal operation.
The external memory interface also connects to 1M x 48-bit SDRAM
memory. The SDRAM memory connects to the memory select 0 (~MS0)
pin. Refer to “SDRAM Disable Jumper (JP1)” on page 3-5 for information on how to configure the width of the SDRAM. Refer to “Using
SDRAM Memory” on page 2-3 for a summary of the processor’s memory
map.
Some of the address, data, and control signals are available externally via
two off-board connectors. The EP connectors’ pinout (P9 and P10) can be
found in Appendix B, “Schematics”.
Host Processor Interface (HPI)
The Host Port Interface (HPI) signals are brought to an unpopulated
off-board connector (P9). This allows the HPI to interface with a user
application. The pinout of the host port connector can be found in
Appendix B, “Schematics”.
SPORT Audio Interface
and SPORT2 are connected to the AD1836 codec (U10). A 3.5 mm
stereo jack and four RCA mono jacks facilitate an audio input, while a
3.5 mm stereo jack and eight RCA mono jacks facilitate an audio output.
SPORT0
ADSP-21161N EZ-KIT Lite Evaluation System Manual
3-3
System Architecture
The codec contains two input channels. One channel connects to a
3.5 mm stereo jack and two RCA jacks. The 3.5 mm stereo jack connects
to a microphone. The two RCA jacks can connect to a LINE-OUT from an
audio device. You can supply an audio input to the codec microphone
input channel (MIC1) or to the LINE_IN input channel. The jumper settings
of JP11 determine whether the LINE_IN channel of the codec is driven by
the P6 connector or by the P7 connector.
SPI Audio Interface
The SPI port is connected to the AD1836 and AD1852. The SPI port is
used for writing and reading the control registers of the audio devices.
Breadboard Area
Use the breadboard area to add external circuitry to:
• All board voltages and grounds
• Package footprints:
D
D
D
D
D
D
1x SOIC16
1x SOIC20
4x SOT23-6
1x PSOP44
2x SOT23
27x 0805
Devices does not support and is not responsible for the
[ Analog
effects of additional circuitry.
3-4
ADSP-21161N EZ-KIT Lite Evaluation System Manual
EZ-KIT Lite Hardware Reference
JTAG Emulation Port
The JTAG emulation port allows an emulator to access the processor’s
internal and external memory, as well as the special function registers,
through a 14-pin header.
For a detailed description of the interface’s connectors, see EE-68 published on the Analog Devices website. For more information, see “JTAG
Connector (P12)” on page 3-19. For more information about available
emulators, contact Analog Devices (see “Product Information”).
Jumper Settings
This section describes the function of all the jumpers. Figure 3-2 shows
the locations of all the jumpers.
SDRAM Disable Jumper (JP1)
The JP1 jumper is used to enable or disable the third SDRAM device.
When the jumper is installed, the ADSP-21161N can access the SDRAM
as 48-bit-wide external memory.
The upper 16 bits of data are multiplexed with the Link Ports and the
external data bus; therefore, when the jumper is installed, the Link Ports
are not available. To use the Link Ports, the JP1 jumper must be removed.
SPDIF Selection Jumper (JP2)
The JP2 jumper is used select the SPDIF input to the CS8414 digital
audio receiver. When the jumper is configured for an optical connection,
the TOSLINK optical input connector (P4) should be used. When the
jumper is configured for a coax connection, the RCA input connector (P5)
should be used.
ADSP-21161N EZ-KIT Lite Evaluation System Manual
3-5
Jumper Settings
JP11: ADC1 Input Selector
JP5: FLAG1 Enable
JP1: External Memory
Width
JP22: BMS Enable
JP19: DSP ID
JP20: Boot Mode
JP21: Clock Mode
JP26: SW1 Enable
JP27: SW2 Enable
JP4: FLAG0 Enable
JP23: AD1836 Control Select
JP6: Sample Frequency
JP3: MCLK Select
JP2: SPDIF Select
JP9: Mic Gain Right
JP10: Mic Gain Left
JP7: ADC2 Input Mode Left
JP8: ADC2 Input Mode Right
Figure 3-2. Jumper Locations
MCLK Selection Jumper (JP3)
The JP3 jumper is used to select the MCLK source for the AD1836 and
AD1852.
3-6
ADSP-21161N EZ-KIT Lite Evaluation System Manual
EZ-KIT Lite Hardware Reference
Table 3-1. SPDIF Modes
Jumper Location
Mode
1 and 2
Optical (factory default)
2 and 3
Coax
Table 3-2. MCLK Selection
Jumper Location
MCLK Source
1 and 2
Audio Oscillator (12.288 MHz) (factory default)
2 and 3
Derived clock from SPDIF Stream
FLAG0 Enable Jumper (JP4)
In standard configuration, FLAG0 is connected to the AD1836 and used as
a select for the SPI port. This jumper should be removed to use the push
button switch or the signal on the expansion connector (P10). Once the
jumper is removed, the SPI can no longer communicate with the
AD1836.
FLAG1 Enable Jumper (JP5)
In standard configuration, FLAG1 is connected to the AD1852 and used as
a select for the SPI port. The JP5 jumper should be removed to use the
push button switch or the signal on the expansion connector (P10). Once
the jumper is removed, the SPI can no longer communicate with the
AD1852.
Sample Frequency Jumper (JP6)
The JP6 jumper is used to select the sample frequency for the AD1852
device. Table 3-3 shows the valid frequency modes.
ADSP-21161N EZ-KIT Lite Evaluation System Manual
3-7
Jumper Settings
Table 3-3. Sample Frequencies
Jumper Location
Sample Frequency
None installed
Not allowed
3 and 4
192 kHz (2x Interpolator)
1 and 2
96 kHz (4x Interpolator)
1 and 2, 3 and 4
48 kHz (8x Interpolator) (factory default)
ADC2 Input Mode Selection Jumpers (JP7–8)
The JP7 and JP8 jumpers control the input mode to ADC2 on the
AD1836 (see Table 3-4). In high-performance mode, the signal is routed
straight in to the ADC. In PGA mode, the signal goes through a multiplexer and a programmable gain amplifier inside of the codec.
Table 3-4. ADC Input Mode
Jumper Location
Input Mode
3 and 5, 4 and 6
PGA (factory default)
1 and 3, 2 and 4
High Performance
MIC Gain Selection Jumpers (JP9–10)
The JP9 and JP10 jumpers are used to select the pre-amp gain for the
microphone circuit (see Table 3-5). The gain for the left and right channel
should be configured the same.
Table 3-5. MIC Pre Amp Gain
3-8
Jumper Position
Gain
Not Installed
0 dB
ADSP-21161N EZ-KIT Lite Evaluation System Manual
EZ-KIT Lite Hardware Reference
Table 3-5. MIC Pre Amp Gain (Cont’d)
Jumper Position
Gain
1 and 2
20 dB
2 and 3
40 dB (factory default)
ADC1 Input Selection Jumper (JP11)
The JP11 jumper is used to select the input source for ADC2. If the input
source for ADC2 is LINE-IN, then the RCA connector P6 should be used.
If the input source for ADC2 is a microphone, then the mini stereo plug
P7 should be used. If a microphone is used, the gain of the circuit may be
increased, as described in “MIC Gain Selection Jumpers (JP9–10)” on
page 3-8.
When the JP11 jumpers are between pins 1 and 3 and between pins 2 and
4, the connection is to P7. When the jumpers are between pins 3 and 5
and between pins 4 and 6, the connection is to P6. The jumper settings are
illustrated in Table 3-6). (The words MIC and LINE are on the board as a
reference.)
Table 3-6. Audio Input Jumper Settings
Microphone Input
Stereo LINE_IN (Default)
MIC
1 2
MIC
1 2
JP11
LINE
JP11
LINE
ADSP-21161N EZ-KIT Lite Evaluation System Manual
3-9
Jumper Settings
Processor ID Jumper (JP19)
The JP19 jumper is used to select a different ID for the processor. During
typical operation of the EZ-KIT Lite board, there is only a single DSP in
the system. The jumper should be set to the single processor setting.
When a second processor is attached to the board though the link port,
these jumpers should be changed to configure one board for processor 1
and the other board for processor 2. System configuration options are
shown in Table 3-7.
Table 3-7. Processor ID Modes
Jumper Position
Description
1 and 2, 3 and 4, 5 and 6
Single processor (default)
3 and 4, 5 and 6
Processor 1
1 and 2, 5 and 6
Processor 2
Other
Invalid
Boot Mode Selection Jumper (JP20)
The JP20 jumper determines how the ADSP-21161N processor boots.
Table 3-8 shows the jumper setting for the boot modes.
Table 3-8. Boot Mode Select Jumper (JP20) Settings
EBOOT
Pins 1 & 2
LBOOT
Pins 3 & 4
BMS
Pins 5 & 6
Boot Mode
Not installed
Installed
Not installed
(output)
EPROM BOOT (default)
Installed
Installed
Not installed
(input)
Host Processor Boot
Installed
Not installed
Installed (input)
Serial Boot via SPI
3-10
ADSP-21161N EZ-KIT Lite Evaluation System Manual
EZ-KIT Lite Hardware Reference
Table 3-8. Boot Mode Select Jumper (JP20) Settings (Cont’d)
EBOOT
Pins 1 & 2
LBOOT
Pins 3 & 4
BMS
Pins 5 & 6
Boot Mode
Installed
Not installed
Not installed
(input)
Link Port Boot
Installed
Installed
Installed (input)
No Boot
Not installed
Not installed
Installed (input)
Reserved
Clock Mode Selection Jumper (JP21)
The JP21 jumper controls the speed for the core and external port of the
ADSP-21161N processor. The frequency supplied to CLKIN of the DSP
may be changed by removing the 25 MHz oscillator (U24) that is shipped
with the board and replacing it with a different oscillator or crystal (Y2). A
clock mode and frequency should be selected so that the minimum and
maximum specs of the ADSP-21161N processor are not exceeded. For
more information on clock modes, see the ADSP-21161 SHARC Processor
Hardware Reference. Table 3-9 shows the jumper setting for the clock
modes.
Table 3-9. Clock Mode Selections
CLKDBL
Pins 1 & 2
CLK_CFG1
Pins 3 & 4
CLK_CFG0
Pins 5 & 6
Core Clock
Ratio
External Port
Clock Ratio
Not installed
Installed
Installed
2:1
1x
Not installed
Installed
Not installed
3:1
1x
Not installed
Not installed
Installed
4:1
1x (default)
Installed
Installed
Installed
4:1
2x
Installed
Installed
Not installed
6:1
2x
Installed
Not installed
Installed
8:1
2x
ADSP-21161N EZ-KIT Lite Evaluation System Manual
3-11
Jumper Settings
~BMS Enable Jumper (JP22)
The JP22 jumper is used to control the routing of the Boot Memory Select
(~BMS) signal. When the jumper is installed, the ~BMS signal is routed to
the Flash memory interface and can be used for reading, writing, and
booting. The jumper should be installed when using EPROM boot mode.
The jumper should be removed when using the serial boot or no-boot
mode. If the jumper remains “ON” in serial boot or no-boot modes, the
~BMS signal is grounded, and the flash memory is selected.
AD1836 Control Selection Jumper (JP23)
The AD1836 control registers are programmed through an SPI port. The
SPI port can be configured to be connected to the processor’s SPI port or
SPORT1. When the jumper is installed at JP23, the AD1836 SPI port is
connected to SPORT1 of the processor. When the jumper is removed, the
AD1836 SPI port connects to the processor’s SPI port. By default, the
jumper is installed.
SW1 Enable Jumper (JP26)
The SW1 push button is attached though a driver to FLAG0 of the processor.
To disconnect the driver from FLAG0 (for example, to use FLAG1 as an output), remove JP26.
SW2 Enable Jumper (JP27)
The SW2 push button is attached though a driver to FLAG1 of the processor.
To disconnect the driver from (for example, to use FLAG1 as an output),
remove JP27.
3-12
ADSP-21161N EZ-KIT Lite Evaluation System Manual
EZ-KIT Lite Hardware Reference
LEDs and Push Buttons
This section describes the functionality of the LEDs and push buttons.
Figure 3-3 shows the locations of the LEDs and push buttons.
USB Monitor:
LED10
VERF:
LED9
DSP Reset:
LED8
Reset:
LED1
Power:
LED11
FLAG4-9: LED2 - 7
Reset:
SW8
IRQ0-2:
SW5-7
FLAG0-3:
SW1-4
Figure 3-3. LED and Push Button Locations
ADSP-21161N EZ-KIT Lite Evaluation System Manual
3-13
LEDs and Push Buttons
Reset LEDs (LED1 and LED8)
When LED1 is lit, the master reset of all the major ICs is active.
When LED8 is lit, the ADSP-21161N processor (U1) is being reset. The
USB interface resets the processor during USB communication
initialization.
FLAG LEDs (LED2–7)
The FLAG LEDs connect to the processor’s flag pins (FLAG4–9). The
LEDs are active HIGH and are lit by an output of “1” from the processor.
Refer to “LEDs and Push Buttons” on page 3-13 for more information on
how to use the programmable flags to program the DSP. Table 3-10
shows the FLAG signals and the corresponding LEDs.
Table 3-10. FLAG LEDs
FLAG Pin
LED Reference Designator
FLAG4
LED7
FLAG5
LED6
FLAG6
LED5
FLAG7
LED4
FLAG8
LED3
FLAG9
LED2
VERF LED (LED9)
The VERF LED indicates that there is a possible error in the audio stream
of the CS8414 digital receiver. The error may occur when digital audio
cables disconnect from the optical or coaxial SPDIF connectors.
3-14
ADSP-21161N EZ-KIT Lite Evaluation System Manual
EZ-KIT Lite Hardware Reference
USB Monitor LED (LED10)
The USB monitor LED (LED10) indicates that USB communication has
been initialized successfully, and you may connect to the processor using a
VisualDSP++ EZ-KIT Lite session. If the LED does not light, try cycling
power on the board and/or reinstalling the USB driver (see “Installing
EZ-KIT Lite USB Driver” on page 1-6).
Power LED (LED11)
When LED11 is lit (green), it indicates that power is being properly supplied to the board.
Programmable FLAG Push Buttons (SW1–4)
Four push buttons (SW1–4) are provided for general-purpose user input.
The push buttons connect to the processor’s FLAG pins. The push buttons
are active “HIGH” and, when pressed, send a High (1) to the processor.
Refer to “Using FLAG Pins” on page 2-5 for more information. The push
button reference designators and corresponding FLAGs are summarized in
Table 3-11.
Table 3-11. FLAG Switches
FLAG Pin
Push Button Reference
Designator
FLAG Pin
Push Button Reference
Designator
FLAG0
SW1
FLAG2
SW3
FLAG1
SW2
FLAG3
SW4
Interrupt Push Buttons (SW5–7)
Three push buttons are provided for general-purpose user interrupts. SW5–
SW7 connect to the processor’s programmable FLAG pins. The push buttons are active “HIGH” and, when pressed, send a High (1) to the
ADSP-21161N EZ-KIT Lite Evaluation System Manual
3-15
Connectors
processor. Refer to “Using FLAG Pins” on page 2-5 for more information.
The push button reference designators and corresponding interrupt signals are summarized in Table 3-12.
Table 3-12. Interrupt Switches
Interrupt Signal
Push Button Reference Designator
IRQ0
SW5
IRQ1
SW6
IRQ2
SW7
Board Reset Push Button (SW8)
The RESET push button (SW8) resets all of the ICs on the board. During
reset, the USB interface is automatically reinitialized.
the RESET push button ( ) while VisualDSP++ is run[ Pressing
ning disrupts communication and causes errors in the current
SW8
debug session. VisualDSP++ must be closed and re-opened.
Connectors
This section describes the connector functionality and provides information about mating connectors. Figure 3-4 shows the connector locations.
USB Connector (P2)
The USB connector (P2) is a standard Type B USB receptacle.
3-16
ADSP-21161N EZ-KIT Lite Evaluation System Manual
EZ-KIT Lite Hardware Reference
Figure 3-4. Connector Locations
Part Description
Manufacturer
Part Number
Type B USB receptacle
Mill-Max
897-30-004-90-000
Digi-Key
ED90003-ND
Mating Connector (provided with the EZ-KIT Lite)
USB cable
Assmann
AK672-5
Digi-Key
AK672-5ND
ADSP-21161N EZ-KIT Lite Evaluation System Manual
3-17
Connectors
Audio Connectors (P4–8, P17)
There are two 3.5 mm stereo audio jacks, 13 RCA jacks, and one optical
connector.
Part Description
Manufacturer
Part Number
3.5 mm stereo jack (P7 and P17)
Shogyo
SJ-0359AM-5
RCA Jacks (P6)
SWITCHCRAFT
PJRAS2X2S01
RCA Jacks (P8)
SWITCHCRAFT
PJRAS4X2U01
TORX (P4)
TOSHIBA
TORX173
Coaxial (P5)
SWITCHCRAFT
PJRAN1X1U01
Mating Connectors
3.5mm stereo plug to 3.5mm stereo
cable (P7 and P17)
Radio Shack
L12-2397A
Two channel RCA interconnect cable
(P6 and P8)
Monster Cable
BI100-1M
Digital Fiber-Optic Cable (P4)
Monster Cable
ILS100-1M
Digital Coaxial Cable (P5)
Monster Cable
IDL100-1M
External Port Connector (P9)
A 40-pin 0.05' spacing connector provides access to some of the processor’s External Port signals. By default, this connector is not populated.
Part Description
Manufacturer
Part Number
40-pin 0.05’ (male)
Samtec
FTSH-120-01-F-D-K
Mating Connector
Female to female cable
3-18
Samtec
FFSD-20-D-5.000-01-N
ADSP-21161N EZ-KIT Lite Evaluation System Manual
EZ-KIT Lite Hardware Reference
Host Processor Interface Connector (P10)
A 20-pin 0.05' spacing connector provides access to some of the processor’s External Port signals. By default, this connector is not populated.
Part Description
Manufacturer
Part Number
20-pin 0.05’ (male)
Samtec
FTSH-110-01-F-D-K
Mating Connector
Female to female cable
Samtec
FFSD-10-D-5.000-01-N
JTAG Connector (P12)
The JTAG header (P12) is the connecting point for a JTAG in-circuit
emulator pod. When an emulator is connected to the JTAG header, the
USB debug interface is disabled.
Pin 3 is missing to provide keying. Pin 3 in the mating connector should
have a plug.
using an emulator with the EZ-KIT Lite board, follow the
L When
connection instructions provided with the emulator.
Part Description
Manufacturer
Part Number
14-pin IDC Header (P12)
Berg
54102-T08-07
Link Port Connectors (P13–14)
Each link port is connected to a 26-pin connector. Refer to EE-106 found
on the ADI website at http://www.analog.com for more information
about the link port connectors.
ADSP-21161N EZ-KIT Lite Evaluation System Manual
3-19
Connectors
Part Description
Manufacturer
Part Number
26 position connector
Honda
RMCA-26JL-AD
Mating Connector
Cable connector
Honda
RMCA-E26F1S-A
Shroud
Honda
RMCA-E26L1A
Coaxial cable
Gore
DXN2132
SPORT1 and SPORT3 Connector (P15)
SPORT1
and SPORT3 are connected to a 20-pin connector.
Part Description
Manufacturer
Part Number
20 position AMPMODU system 50
receptacle
AMP
104069-1
Mating Connector
20 position AMPMODU system 20
connector
AMP
2-487937-0
20 position AMPMODU system 20
connector (w/o lock)
AMP
2-487938-0
Flexible film contacts (20 per connector)
AMP
487547-1
Power Connector (P16)
The power connector (P16) provides all of the power necessary to operate
the EZ-KIT Lite board.
Part Description
Manufacturer
Part Number
2.5 mm Power Jack (P16)
SWITCHCRAFT
RAPC712
Digi-Key
SC1152-ND
3-20
ADSP-21161N EZ-KIT Lite Evaluation System Manual
EZ-KIT Lite Hardware Reference
Part Description
Manufacturer
Part Number
Mating Power Supply (shipped with EZ-KIT Lite)
5V Power Supply
CUI Stack
DTS070175SUDC-p6-SZ
Specifications
This section provides the requirements for powering the board.
Power Supply
The power connector supplies DC power to the EZ-KIT Lite board.
Table 3-13 shows the power supply specifications.
Table 3-13. Power Supply Specifications
Terminal
Connection
Center pin
+7V@2 amps
Outer Ring
GND
Board Current Measurements
The ADSP-21161N EZ-KIT Lite board provides two zero-ohm resistors
that may be removed to measure current draw. Table 3-14 shows the resistor number, the voltage plane, and a description of the components on the
plane.
Table 3-14. Current Measurement Resistors
Resistor
Voltage Plane
Description
R168
VDDINT
Core Voltage of the DSP
R169
VDDEXT
IO Voltage of the DSP
ADSP-21161N EZ-KIT Lite Evaluation System Manual
3-21
Specifications
3-22
ADSP-21161N EZ-KIT Lite Evaluation System Manual
Manufacturer
Part
Number
U5
ST MICRO
M29W040B120K6
74LVC14A SOIC14
U21-22
HEX-INVER-SCHMITT-T
RIGGER
TI
74LVC14AD
3
MT48LC1M16A1TG
U2-4
TSOP50
1MX16-SDRAM-143MHZ
MICRON
MT48LC1M16A1TG-7S
4
1
CS8414 SOIC28
96KHZ-DIGITAL-AUDIO-RECVR
CIRRUS
LOGIC
CS8414
5
1
CY7C64603-128 PQFP128 U6
USB-TX/RX MICROCONTROLLER
CYPRESS
CY7C64603-128NC
6
1
MMBT4124 SOT-23
NPN TRANSISTOR 1A
Q2
FAIRCHILD
MMBT4124
7
1
MMBT4401 SOT-23
NPN TRANSISTOR
200MA
Q1
FAIRCHILD
MMBT4401
8
2
74LVC00AD SOIC14
U9, U27
PHILIPS
74LVC00AD
9
1
CY7C1019BV33-15VC
SOJ32
128K X 8 SRAM
U30
CYPRESS
CY7C1019BV33-12VC
Reference
Quantity
Description
Reference
Design
A BILL OF MATERIALS
1
1
M29W040 PLCC32
FLASH-512K-X-8-3V
2
2
3
U8
ADSP-21161N EZ-KIT Lite Evaluation System Manual
A-1
Part
Number
Manufacturer
Reference
Design
Description
Quantity
Reference
A-2
10 1
AD8532AR SOIC8
DUAL AMP 250MA
U29
ANALOG
DEVICES
AD8532AR
11 1
12.288MHZ 1/2 OSC001
U25
DIG01
SG-8002DC-PCC-ND
12.288MH
12 2
SN74AHC1G02 SOT23-5
SINGLE-2 INPUT-NOR
U34,U37
TI
SN74AHC1G02DBVR
13 1
SN74LV164A SOIC14
U33
8-BIT-PARALLEL-SERIAL
TI
SN74LV164AD
14 1
CY7C4201V-15AC TQFP32 U32
64-BYTE-FIFO
CYPRESS
CY7C4201V-15AC
15 1
25MHZ 1/2 OSC01
OSC
U24
DIGI-KEY
SG-8002DC-PCC-ND
16 1
12.0MHZ THR OSC006
CRYSTAL
Y1
DIG01
300-6027-ND
17 1
21161 24LC00 U7""
SEE 1000127
U7
MICROCHIP
24LC00-SN
18 2
1000pF 50V 5% 1206
CERM
C85-86
AVX
12065A102JAT2A
19 8
2200pF 50V 5% 1206
NPO
C40, C46,
C52, C58,
C64, C70,
C76, C82
AVX
12065A222JAT050
20 1
ADM708SAR SOIC8
VOLTAGE-SUPERVISOR
U26
ANALOG
DEVICES
ADM708SAR
21 1
AD1852 SSOP28
MULTIBIT-SIGMA-DELTA-DAC
U11
ANALOG
DEVICES
AD1852JRS
22 1
AD1836AS MQFP52
MULTI-CHANNEL-96KHZ-CODEC
U10
ANALOG
DEVICES
AD1836AS
ADSP-21161N EZ-KIT Lite Evaluation System Manual
Part
Number
Manufacturer
Reference
Design
Description
Quantity
Reference
Bill Of Materials
23 1
ADSP-21161NKCA100
U1
PBGA225
1MM SPACING REV. X1.2
ANALOG
DEVICES
ADSP-21161NCCA100
24 1
ADP3338AKC-33 SOT-223 VR2
3.3V-1.0AMP REGULATOR
ANALOG
DEVICES
ADP3338AKC-3.3
25 2
ADP3339AKC-5 SOT-223
5V-1.5A REGULATOR
ANALOG
DEVICES
ADP3339AKC-5-REEL
26 1
ADP3338AKC-18 SOT-223 VR3
1.8V-1A REGULATOR
ANALOG
DEVICES
ADP3338AKC-1.8
VR1, VR5
27 10 LMV722M SOIC8
DUAL AUDIO OP AMP
U12-20, U28 NATIONAL
SEMI
LMV722M
28 3
4.7uF 25V 10% C
TANT
CT23-25
AVX
TAJC475K025R
29 1
PWR 2.5MM_JACK
CON005
RA
P16
SWITCHCRAFT
SC1152-ND12
30 1
USB 4PIN CON009
USB
P2
MILL-MAX
897-30-004-90-000000
31 1
TORX173 6PIN CON008 P4
FIBER OPTIC REV MODULE
TOSHIBA
TORX173
32 1
RCA 4X2 CON011
RA
P8
SWITCHCRAFT
PJRAS4X2U01
33 1
RCA 1X1 CON012
BLK
P5
SWITCHCRAFT
PJRAN1X1U01
34 1
RCA 2X2 CON013
P6
SWITCHCRAFT
PJRAS2X2S01
35 2
LNKPRT 12X2 CON010
P13-14
HONDA
(TSUSHINK)
RMCA-EA26LMY-0M03-A
ADSP-21161N EZ-KIT Lite Evaluation System Manual
A-3
Reference
Design
Manufacturer
Part
Number
AMP
104069-1
37 8
SPST-MOMENTARY
SWT013
6MM
SW1-8
PANASONIC
EVQ-PAD04M
38 1
DIP8 SWT016
SW9
C&K
CKN1365-ND
39 1
10 1/8W 5% 1206
R2
PANASONIC
P10ECT-ND
40 6
0.00 1/8W 5% 1206
R153, R154,
R168-169,
R217, R218
YAGEO
0.0ECT-ND
41 8
AMBER-SMT LED001
GULL-WING
LED2-7,
LED9-10
PANASONIC
LN1461C-TR
42 8
330pF 50V 5% 805
NPO
C36, C42,
C48, C54,
C60, C66,
C72, C78
AVX
08055A331JAT
43 80 0.01uF 100V 10% 805
CERM
C2, C6-7,
C91-149,
C154-155,
C165-171,
C184-C186,
C174-179
AVX
08051C103KAT2A
44 11 0.22uF 25V 10% 805
CERM
C156-164,
C172, C183
AVX
08053C224FAT
45 16 0.1uF 50V 10% 805
CERM
C1,C5,C9-11, AVX
C33,C87-90,
C150-153,
C173,C180
08055C104KAT
A-4
Description
P15
Quantity
.05 10X2 CON014
RA
Reference
36 1
ADSP-21161N EZ-KIT Lite Evaluation System Manual
Part
Number
AVX
08055A102JAT2A
47 5
10uF 16V 10% C
TANT
CT19-22,
CT36
SPRAGUE
293D106X9025C2T
Reference
Design
C14-15,
C19-20,
C24-25,
C29-30
Description
0.001uF 50V 5% 805
NPO
Quantity
46 8
Reference
Manufacturer
Bill Of Materials
48 47 10K 100MW 5% 805
R3-4,R6,R13, AVX
R15,R17-20,
R124,R126,R
128,R130,
R132,R134,
R136,
R148-149,
R151,
R155-164,
R175,
R177-181,
R183,R190,
R171,R172,
R174,
R185-187,
R193-194,
R219-220
CR21-103J-T
49 4
33 100MW 5% 805
R1, R150,
R176, R152
AVX
CR21-330JTR
50 5
4.7K 100MW 5% 805
R184, R188,
R189, R191,
R165
AVX
CR21-4701F-T
51 11 680 100MW 5% 805
R137-147
AVX
CR21-6800F-T
52 1
R12
AVX
CR21-1004F-T
1M 100MW 5% 805
ADSP-21161N EZ-KIT Lite Evaluation System Manual
A-5
Description
Reference
Design
Manufacturer
Part
Number
R16
AVX
CR21-471J-T
54 1
1.5K 100MW 5% 805
R7
AVX
CR21-1501F-T
55 2
2.00K 1/8W 1% 1206
R49-50
DALE
CRCW1206-2001FRT1
56 10 49.9K 1/8W 1% 1206
R66, R74,
R82, R90,
R98, R106,
R114, R122,
R192, R206
AVX
CR32-4992F-T
57 2
R10-11
AVX
CR32-2211F-T
A-6
Quantity
475 100MW 5% 805
Reference
53 1
2.21K 1/8W 1% 1206
58 24 100pF 100V 5% 1206
NPO
C12, C16-17, AVX
C21-22,
C26-27, C31,
C35, C38,
C41, C44,
C47, C50,
C53, C56,
C59, C62,
C65, C68,
C71, C74,
C80, C77
12061A101JAT2A
59 5
10uF 16V 10% B
TANT
CT1-4, CT11 AVX
TAJB106K016R
60 1
22K 100MW 5% 805
R216
AVX
CR21-223J-T
61 7
100 100MW 5% 805
R123, R125,
R127, R129,
R131, R133,
R135
AVX
CR21-101J-T
ADSP-21161N EZ-KIT Lite Evaluation System Manual
Part
Number
AVX
12061A221JAT2A
63 1
1000 100MHZ 1.5A
FER002
0.06 CHOKE
FER13
MURATA
PLM250S40T1
64 2
2A S2A_RECT DO-214AA D1-2
SILICON RECTIFIER
GENERALSEMI
S2A
65 11 600 100MHZ 500MA 1206 FER1-11
0.70 BEAD
DIGI-KEY
240-1019-1-ND
66 8
237 1/8W 1% 1206
R23, R27,
R30, R34,
R40-41,
R47-48
KOA
P11.0FCT-ND
67 4
750K 1/8W 1% 1206
R25, R32,
R38, R45
KOA
RK73H2BT7503F
Reference
Design
C39, C45,
C51, C57,
C63, C69,
C75, C81
Description
220pf 50V 10% 1206
NPO
Quantity
62 8
Reference
Manufacturer
Bill Of Materials
68 16 5.76K 1/8W 1% 1206
R21, R22,
DALE
R24, R26,
R28-29, R31,
R33, R35-37,
R39, R42-44,
R46
CRCW12065761FRT1
69 8
11.0K 1/8W 1% 1206
R59, R67,
R75, R83,
R91, R99,
R107, R115
DALE
CRCW12061102FTR1
70 1
68NF 50V 10% 805
C8
MURRATA
GRM40X7R683K050AL
71 8
120PF 50V 5% 1206
NPO
C13, C18,
C23, C28,
C187-190
PHILLIPS
1206CG121J9B200
ADSP-21161N EZ-KIT Lite Evaluation System Manual
A-7
Description
Reference
Design
Manufacturer
Part
Number
R14
PHILIPS
9C12063A75R0JLRT/R
73 2
820PF 100V 10% 1206
NPO
C32, C34
AVX
12061A821KAT2A
74 2
30PF 100V 5% 1206
C3-4
AVX
12061A300JAT2A
75 8
680PF 50V 1% 805
NPO
C37, C43,
C49, C55,
C61, C67,
C73, C79
AVX
08055A681FAT2A
76 8
2.74K 1/8W 1% 1206
R63, R71,
R79, R87,
R95, R103,
R111, R119
PANASONIC
ERJ-8ENF2741V
77 16 5.49K 1/8W 1% 1206
R60, R61,
R68, R69,
R76, R77,
R84, R85,
R92, R93,
R100, R101,
R108, R109,
R116, R117
PANASONIC
ERJ-8ENF5491V
78 8
3.32K 1/8W 1% 1206
R62, R70,
R78, R86,
R94, R102,
R110, R118
PANASONIC
ERJ-8ENF3321V
79 2
100 1/8W 1% 1206
R54, R57
PANASONIC
ERJ-8ENF1000V
80 8
1.65K 1/8W 1% 1206
R64, R72,
R80, R88,
R96, R104,
R112, R120
PANASONIC
ERJ-8ENF1651V
A-8
Quantity
75 1/8W 5% 1206
Reference
72 1
ADSP-21161N EZ-KIT Lite Evaluation System Manual
Manufacturer
Part
Number
PCE3062TR-ND
82 10 68UF 25V 20% CAP003
ELEC
CT26-35
PANASONIC
EEV-FC1E680P
83 1
2A SL22 DO-214AA
SCHOTTKY
D3
GENERAL
SEMI
SL22
84 2
10K 100MW 2% RNET16
BUSSED
RN1-2
CTS
767-161-103G
85 1
1K 1/8W 5% 1206
R5
AVX
CR32-102J-T
86 1
100K 1/8W 5% 1206
R167
AVX
CR1206-1003FTR1
87 2
1.00K 1/8W 1% 1206
R53, R56
AVX
88 2
20.0K 1/8W 1% 1206
R170,R173
DALE
89 2
22 1/8W 5% 1206
R8-9
DALE
90 1
74FCT244AT QSOP20
OCTAL-BUFFER
U23
CYPRESS
91 4
10.0K 1/8W 1% 1206
R51-52, R55, DALE
R58
CRCW1206-1002FRT1
92 2
RED-SMT LED001
GULL-WING
LED1, LED8 PANASONIC
LN1261C
93 1
GREEN-SMT LED001
GULL-WING
LED11
PANASONIC
LN1361C
94 8
604 1/8W 1% 1206
R65, R73,
R81, R89,
R97, R105,
R113, R121
PANASONIC
ERJ-8ENF6040V
81 6
Description
DIG01
Quantity
CT5-10
Reference
Reference
Design
Bill Of Materials
10UF 16V 20% CAP002
ELEC
ADSP-21161N EZ-KIT Lite Evaluation System Manual
CRCW1206-2002FRT1
CY74FCT244ATQC
A-9
Reference
Design
Manufacturer
Part
Number
PANASONIC
ECS-T1EY105R
96 3
ADG774A QSOP16
QUICKSWITCH-257
U31.U35,
U36
ANALOG
DEVICES
ADG774ABRQ
97 7
IDC 2X1 IDC2X1
2X1 TIN
JP1, JP4-5,
JP22-23,
JP26, JP27
BERG
54101-T08-02
98 4
IDC 3X1 IDC3X1
JP2-3, JP9-10 BERG
54101-T08-03
99 1
IDC 4X1 IDC4X1
P3
BERG
54102-T08-02
100 1
IDC 2X2 IDC2X2
0.1x0.1
JP6
SULLINS
PTC02DAAN
101 6
IDC 3X2 IDC3X2
JP7-8, JP11,
JP19-21
BERG
54102-T08-03
102 1
IDC 7X2 IDC7X2
HEADER
P12
BERG
54102-T08-07
103 1
2.5A RESETABLE FUS001 F1
RAYCHEM
CORP.
SMD250-2
104 2
3.5MM STEREO_JACK
CON001
SHOGYO
SJ-0359AM-5
A-10
Description
CT12-18
Quantity
1uF 25V 20% A
TANT -55+125
Reference
95 7
P7, P17
ADSP-21161N EZ-KIT Lite Evaluation System Manual
A
B
C
D
1
1
ADSP-21161 EZ-KIT LITE
Schematic
2
2
3
3
ANALOG
DEVICES
4
Approvals
Drawn
Checked
Engineering
A
B
C
Date
Title
Size
Nashua, NH 03063
4
21161N EZ-KIT LITE - TITLE PAGE
Board No.
Rev
A0157-2000
B
Date
20 Cotton Road
2.4
Sheet
11-13-2003_11:40
D
1 OF 24
A
B
C
D
U1
A[0:21]
A0
A1
A2
A3
M05
ADDR0
N05
ADDR1
L04
ADDR2
R04
ADDR3
1
A4
P04
A5
N04
ADDR5
A6
M04
A7
R03
A8
ADDR6
ADDR7
P03
ADDR8
A9
P02
A10
N03
A11
2
ADDR4
ADDR9
ADDR10
R02
ADDR11
A12
M02
A13
P01
A14
N01
A15
N02
A16
M01
A17
L02
ADDR12
ADDR13
ADDR14
ADDR15
ADDR16
ADDR17
A18
M03
A19
L01
A20
K03
A21
ADDR18
ADDR19
ADDR20
L03
ADDR21
K02
ADDR22
K04
ADDR23
DATA16
DATA17
DATA18
DATA19
DATA20
DATA21
DATA22
DATA23
DATA24
DATA25
DATA26
DATA27
DATA28
DATA29
DATA30
DATA31
DATA32
DATA33
DATA34
DATA35
DATA36
DATA37
DATA38
DATA39
DATA40
N06
MS0
MS0
M06
MS1
MS1
P05
MS2
MS2
R05
MS3
MS3
DATA41
DATA42
DATA43
DATA44
DATA45
L12
CAS
3
CAS
M11
RAS
RAS
DATA46
DATA47
L14
M13
L15
K13
D21
K12
D22
K15
D23
L0CLK
D25
J12
D26
N10
SDCKE
SDCKE
P10
SDCLK0
SDCLK0
P09
SDCLK1
R14
SDWE
SDWE
M10
SDA10
SDA10
TDI
TDO
TMS
TRST
EMU
H13
D28
L1ACK
R08
RD
M09
WR
WR
M12
ACK
ACK
BRST
4
ID0
ID1
ID2
H12
D29
L1CLK
H14
D30
L1D[0:7]
H15
D31
G15
D32
G14
D33
G12
D34
G13
D35
F15
D36
D38
E13
D39
D40
E15
D41
FLAG[0:9]
D13
D42
E14
D43
DSP_AVDD
P14
BMSTR
AVDD
L0D7
B09
D15
D44
C14
D45
D14
D46
C15
D47
TCK
A02
3.3V
B06
SCLK1
SCLK1
D07
SFS1
C06
SD1A
D06
SD1B
SFS1
1
R1
2
R2
3
R3
4
R4
5
R5
6
R6
7
R7
8
R8
RD
SD1B
DMAR1
C08
SFS2
C07
SD2A
B07
SD2B
DMAR2
HBR
SD2A
REDY
CS
L1DAT1
L1D5
D12
L1DAT2
L1DAT3
L1DAT4
L1DAT5
L1D6
A12
L1D7
C11
BRST
D09
SCLK3
C09
SFS3
B08
SD3A
A08
SD3B
CLKIN
TMS
XTAL
TRST
CLK_CFG0
EMU
R1
33
805
ID0
ID1
P1
CLKDBL
DMAG1
12
R12
DMAG2
11
R11
SBTS
10
R10
HBG
9
R9
MS0
2
3.3V
L1DAT6
L1DAT7
H01
FLAG0
G01
FLAG1
G02
FLAG2
G04
FLAG3
G03
FLAG4
F01
FLAG5
F04
FLAG6
F02
FLAG7
E03
FLAG8
F03
FLAG9
E01
FLAG10
D03
FLAG11
D04
MISO
B04
MOSI
A04
SPIDS
C04
SPICLK
MISO
P12
CLKIN
R13
XTAL
N13
CLK_CFG0
N12
CLK_CFG1
R12
CLKDBL
RN2
MOSI
1
R1
2
R2
3
R3
4
R4
5
R5
6
R6
7
R7
8
R8
IRQ2
SPIDS
MS1
SPICLK
BR6
SPIDS
H02
IRQ0
IRQ0
MS2
H04
IRQ1
IRQ1
MS3
J01
IRQ2
IRQ2
BR4
IRQ0
R11
HBG
15
R15
14
R14
13
R13
IRQ1
12
R12
BR5
11
R11
BR3
10
R10
BR2
9
R9
BR1
HBG
R10
HBR
10K
RNET16
HBR
P11
REDY
16
COM
3
REDY
N11
CS
R2
10
1206
CS
DSP_AVDD
VDDINT
BR1
N08
BR2
BR2
R07
BR3
C1
0.1UF
805
BR3
P07
BR4
C2
0.01UF
805
BR4
N07
BR5
BR5
M07
BR6
BR6
R09
CLKOUT
TIMEXP
DMAG2
BMSTR
DMAR2
M15
DMAG1
N15
DMAR1
M14
DMAG2
P15
DMAR2
PA
AGND
SBTS
R06
PA
A05
EBOOT
A06
LBOOT
A03
BMS
ANALOG
DEVICES
EBOOT
LBOOT
BMS
Approvals
Drawn
ADSP-21161N-100
PBGA225
Checked
Engineering
AGND
B
13
R13
SD3B
P06
IDC1X1
14
R14
SD3A
SBTS
ID2
15
R15
10K
RNET16
SFS3
P08
TDO
16
COM
SCLK3
BR1
AGND
ADSP-21161N-100
PBGA225
A
RN1
SD1A
A07
TDI
B03
K01
1
C13
B12
FLAG9
J03
L1DAT0
C12
FLAG8
J02
B14
L1D4
FLAG7
J04
SD0A
WR
L1D3
FLAG6
C02
SFS0
L0DAT7
A14
FLAG5
B01
L0DAT6
L1D2
FLAG4
C01
L0DAT5
C10
FLAG3
D01
L0DAT4
L0D6
FLAG0
E02
TIMEXP
D10
L1D0
DMAR1
N14
A09
L0D5
FLAG2
B02
L0DAT3
L0D4
FLAG1
F13
SCLK0
B05
SFS0
E04
SD0A
C05
SD0B
L0DAT2
L1CLK
DMAG1
RPBA
D11
A13
N09
RESET
A11
L0D3
D37
F14
D02
L0DAT1
L0D2
L1D1
F12
L0DAT0
L1ACK
BRST
DSP_RESET
B11
B13
CLK_CFG1
RD
L0D1
D27
DQM
TCK
E12
D05
SCLK0
SCLK2
P13
DQM
L0D0
D24
J14
J15
B10
L0D[0:7]
D19
K14
L0ACK
L0CLK
D18
D20
A10
L0ACK
D17
L13
J13
U1
D[16:47]
D16
C
Date
Title
Size
Nashua, NH 03063
4
21161N EZ-KIT LITE - DSP
Board No.
Rev
A0157-2000
B
Date
20 Cotton Road
2.4
Sheet
11-12-2002_17:09
D
2 OF 24
A
1
B
C
D
A[0:14]
1
D[16:47]
U2
A0
21
A1
22
A2
23
A3
24
A4
27
A5
28
A6
29
A7
30
A8
31
A9
32
2
U3
A0
DQ0
A1
DQ1
A2
DQ2
A3
DQ3
A4
DQ4
A5
DQ5
A6
DQ6
A7
DQ7
A8
DQ8
A9
DQ9
20
A10
A14
19
BA
DQ10
DQ11
DQ12
15
WE
16
CAS
17
RAS
DQ13
DQ14
DQ15
14
DQML
36
DQMH
CS
CKE
CLK
2
D16
A0
21
3
D17
A1
22
5
D18
A2
23
6
D19
A3
24
8
D20
A4
27
9
D21
A5
28
11
D22
A6
29
12
D23
A7
30
39
D24
A8
31
40
D25
A9
32
42
D26
43
D27
45
D28
46
D29
15
48
D30
16
49
D31
17
20
A14
18
14
34
36
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
BA
WE
CAS
RAS
DQML
DQMH
35
D32
A0
D33
A1
D34
A2
D35
A3
D36
A4
D37
A5
D38
A6
D39
A7
D40
A8
D41
A9
D42
D43
A14
21
A0
22
A1
23
A2
24
A3
27
A4
28
A5
29
A6
30
A7
31
A8
32
A9
20
A10
19
BA
D47
18
3
L0D1
5
L0D2
6
L0D3
8
L0D4
9
L0D5
11
L0D6
12
L0D7
39
L1D0
40
L1D1
42
DQ10
43
DQ11
45
DQ12
46
DQ13
48
DQ14
49
DQ15
L1D2
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
15
WE
16
CAS
17
RAS
D46
L0D0
DQ1
D44
D45
2
DQ0
14
DQML
36
DQMH
CS
34
CKE
L1D[0:7]
2
L1D3
L1D4
L1D5
L1D6
L1D7
34
CKE
35
CLK
MT48LC1M16A1TG
TSOP50
SDRAM
1M X 16
L0D[0:7]
18
CS
35
CLK
MT48LC1M16A1TG
TSOP50
3
19
A0
U4
2
DQ0
3
DQ1
5
DQ2
6
DQ3
8
DQ4
9
DQ5
11
DQ6
12
DQ7
39
DQ8
40
DQ9
42
DQ10
43
DQ11
45
DQ12
46
DQ13
48
DQ14
49
DQ15
MT48LC1M16A1TG
TSOP50
SDRAM
1M X 16
SDRAM
1M X 16
3.3V
3
SDA10
SDWE
CAS
INSTALL JUMPER TO USE X48 MEMORY
REMOVE JUMPER TO USE LINK PORTS
R3
10K
805
RAS
DQM
SDCLK0
JP1
1
SDCKE
SJ1
SHORTING
JUMPER
DEFAULT=INSTALLED
2
MS0
IDC2X1
ANALOG
DEVICES
4
Approvals
Drawn
Checked
Engineering
A
B
C
Date
Title
Size
Nashua, NH 03063
4
21161N EZ-KIT LITE - SDRAM
Board No.
Rev
A0157-2000
B
Date
20 Cotton Road
2.4
Sheet
11-12-2002_17:09
D
3 OF 24
A
B
C
D
1
1
U5
A[0:18]
A0
12
A1
11
A2
10
A3
9
A4
8
A5
7
A6
6
A7
5
A8
27
A9
26
A10
23
A11
25
A12
4
A13
28
A14
29
A15
3
A16
2
A17
30
A18
1
3.3V
2
R175
10K
805
JP22
SJ32
1
BMS
SHORTING
JUMPER
DEFAULT=INSTALLED
2
IDC2X1
12
U27
U22
11
13
12
13
MS1
74LVC00AD
SOIC14
74LVC14A
SOIC14
22
3
INSTALL JUMPER TO READ/WRITE OR BOOT FROM FLASH
REMOVE JUMPER WHEN USING SPI OR NO BOOT MODE
RD
WR
24
31
D17
15
D18
17
D19
18
D20
19
D21
20
D22
21
D23
D1
14
A1
D16
D0
13
A0
A2
D2
A3
D3
A4
D4
A5
D5
A6
D6
A7
D7
D[16:23]
2
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
CE
3
OE
WE
M29W040B
PLCC32RS
FLASH
512K X 8
ANALOG
DEVICES
4
Approvals
Drawn
Checked
Engineering
A
B
C
Date
Title
Size
Nashua, NH 03063
4
21161N EZ-KIT LITE - FLASH & SRAM
Board No.
Rev
A0157-2000
B
Date
20 Cotton Road
2.4
Sheet
2-19-2004_15:44
D
4 OF 24
A
B
C
D
3.3V
1
1
R184
4.7K
805
R188
4.7K
805
R189
4.7K
805
R191
4.7K
805
U36
2
I0A
3.3V
USB_TMS
I1A
I0B
2
9
YC
TRST
10
I1C
14
I0D
USB_TDI
TCK
I1B
I0C
USB_TRST
7
YB
6
11
R187
10K
805
TMS
3
5
USB_TCK
4
YA
12
YD
2
TDI
13
I1D
R165
4.7K
805
1
S
15
E
QS3257Q
QSOP16
P12
1
2
3
4
5
6
7
8
9
10
11
12
13
14
U35
2
I0A
USB_EMU
EMU
3
I1A
5
I0B
IDC7X2
4
YA
7
YB
TDO
6
I1B
3
11
I0C
3
9
YC
10
I1C
14
I0D
12
YD
13
I1D
JTAG HEADER
PIN 3 SHOULD BE CUT
1
S
15
E
QS3257Q
QSOP16
JTAG HEADER CIRCUIT FOR EZ-KIT LITE ONLY
REFER TO EE-68 FOR STANDARD JTAG
HEADER CONNECTION. THIS CAN BE FOUND AT
HTTP://WWW.ANALOG.COM
ANALOG
DEVICES
4
Approvals
Drawn
Checked
Engineering
A
B
C
Date
Title
Size
B
20 Cotton Road
Nashua, NH 03063
4
21161N EZ-KIT LITE - JTAG INTERFACE
Board No.
Rev
A0157-2000
Date
2.4
Sheet
D
6 OF 24
A
B
C
D
VCC
1
1
R17
10K
805
JP3
R176
33
805
VCC
1
AUDIO_OSC
SJ3
2
MCLK
VCC
SHORTING
JUMPER
DEFAULT=2&3
3
IDC3X1
U8
26
SDATA
11
FSYNC
12
SCK
19
MCK
DSDATA2
R15
10K
805
FER2
600
1206
2
DLRCLK
DBCLK
C6
0.01UF
805
R13
10K
805
TOSLINK
OPTICAL
INPUT
3
JP2
1
2
SJ2
1
SHORTING
JUMPER
DEFAULT=1&2
U9
3
2
R16
475
805
74LVC00AD
SOIC14
3
IDC3X1
4
U9
6
5
74LVC00AD
SOIC14
PLACE JUMPER ON 1&2 FOR OPTICAL INPUT
PLACE JUMPER ON 2&3 FOR COAX INPUT
INSTALL JUMPER ON 1 & 2 TO USE AUDIO OSCILALTOR
INSTALL JUMPER ON 2 & 3 TO USE CS8414 MCK
ERF
15
CBL
28
VERF
C7
0.01UF
805
C8
68NF
805
2
VERF
6
C0~/E0
5
CA/E1
4
CB/E2
3
CC/F0
2
CD/F1
27
CE/F2
16
SEL
20
FILT
13
CS12/FCK
P4
3
VCC1
OUT2
GND4
GND5
SHIELD6
SHIELD
TORX173
CON008
14
25
23
M0
24
M1
18
M2
17
M3
POR
MCLK SOURCE FOR AD1836 AND AD1852
U
9
RXP
10
RXN
C5
0.1UF
805
1
C
OPERATING IN2 I S COMPATIBLE MODE
CS8414
SOIC28
3
DIGITAL
AUDIO
RECEIVER
P5
RCA
CON012
1X1
SPDIF
COAX
INPUT
AGND
2
1
R14
75
1206
ANALOG
DEVICES
4
Approvals
Drawn
Checked
Engineering
A
B
C
Date
Title
Size
Nashua, NH 03063
4
21161N EZ-KIT LITE - AUDIO RECEIVER
Board No.
Rev
A0157-2000
B
Date
20 Cotton Road
2.4
Sheet
12-9-2003_21:30
D
7 OF 24
A
B
C
D
INSTALL JUMPER TO CONNECT CODEC TO SPI PORT (JP12 & JP13 NOT INSTALLED)
REMOVE JUMPER TO USE FLAG0 FOR PUSH BUTTON OR EXPANSION HEADER
ODVDD IS CONNECTED TO 3.3V
3.3V
U10
3.3V
47
SD0A
ASDATA2
1
OUT1L+
ASDATA2
OUT1L-
44
SFS0
8
ABCLK
45
CLATCH
51
6
R220
10K
805
SJ6
R18
10K
805
R19
10K
805
R20
10K
805
SAMPLE FREQUENCY
DAC2 LEFT
OUT2L-
49
1&2
3&4
NOT ALLOWED
NOT SHORTEDNOT SHORTED
192kHz (2X INTERPOLATOR)NOT SHORTEDSHORTED
96kHz (4X INTERPOLATOR) SHORTED
NOT SHORTED
48kHz (8X INTERPOLATOR) SHORTED
SHORTED
JP6
1
2
3
4
CCLK
IDC2X2
CDATA
MISO_C
1
SHORTING
JUMPER
DEFAULT=3&4
OUT2L+
7
OUT2L-
2
MOSI_C
DAC1 RIGHT
OUT1R-
MCLK
50
SPICLK_C
SJ5
SHORTING
JUMPER
DEFAULT=1&2
OUT1R+
30
OUT2L+
CLATCH_C
DAC1 LEFT
OUT1L-
31
OUT1R+
OUT1R-
MCLK
OUT1L+
9
ALRCLK
43
SCLK0
R219
10K
805
ASDATA1
48
33
OUT2R+
COUT
OUT2R+
OUT2R-
32
DAC2 RIGHT
OUT2R-
U11
2
16
IN1L+
ADC1 LEFT
IN1L-
ADC1 RIGHT
IN1L+
17
IN1L-
OUT3L-
IN1R+
OUT3R+
18
IN1R+
19
IN1R-
4
OUT3L+
IN1R-
OUT3L+
5
OUT3L-
35
OUT3R+
OUT3R-
34
10
96/48~
7
192/48~
DAC3 LEFT
OUT3R-
2
MCLK
26
BCLK
25
LRCLK
27
SDATA
MCLK
DAC3 RIGHT
DBCLK
DLRCLK
20
IN2L+
IN2L-
ADC2 LEFT
DSDATA1
IN2L-/CL1/CL1
DSDATA2
21
IN2L+/CL2/CL2
22
IN2L1
NC/IN2L1/IN2L+
23
IN2L2
38
41
SJ7
DLRCLK
IN2R2
ADC2 RIGHT
13
FILTR
IN2R-/CR1/CR1
FILTD
27
IN2R+
2
MOSI
FLAG1
IN2R+/CR2/CR2
CT1
10UF
B
C9
0.1UF
805
CT2
10UF
B
C10
0.1UF
805
SJ4
R164
10K
805
DEFAULT=INSTALLED
U31
3
2
SFS1
3.3V
I0A
4
YA
CLATCH_C
1
I1A
5
I0B
R190
10K
805
11
10
MOSI
7
YB
SSM2275
SOIC8
SPICLK_C
I0D
13
MISO
9
YC
JP23
1
1
2
15
I1D
3
INSTALL JUMPER TO CONNECT DAC TO SPI PORT (JP12 & JP13 NOT INSTALLED)
REMOVE JUMPER TO USE FLAG1 FOR PUSH BUTTON OR EXPANSION HEADER
5
MOSI_C
R173
20.0K
1206
I1C
14
SD1A
4
I0C
YD
12
MISO_C
R154
0.00
1206
U28
7
6
SSM2275
SOIC8
AGND
ANALOG
DEVICES
S
E
Approvals
R153
0.00
1206
IDC2X1
QS3257Q
QSOP16
Drawn
Checked
Engineering
A
CT4
10UF
B
VREF
I1B
SD3A
C11
0.1UF
805
2
6
SPICLK
CT3
10UF
B
AUX
DAC
U28
3
SCLK1
8
ZEROR
AD1852
SSOP28
R170
20.0K
1206
2
IDC2X1
22
ZEROL
AGND
CODEC
1
2
14
FILTR
19
FILTB
21
IDPM0
20
IDPM1
AD1836AAS
MQFP52
JP4
DAC4 RIGHT
9
DEEMP
23
MUTE
3
SHORTING
JUMPER
OUT4R-
12
PD/RST
FLAG0
OUTR-
24
RESET
POR
3
POR
OUT4R+
13
DAC4 LEFT
IDC2X1
NC/IN2R1/IN2R+
26
IN2R-
DBCLK
NC/IN2R2/IN2R-
25
IN2R1
SHORTING
JUMPER
DEFAULT=INSTALLED
DLRCLK
37
1
OUT4L-
12
4
CCLK
3
CLATCH
5
CDATA
SPICLK
JP5
OUT4L+
16
OUTL-
OUTR+
DSDATA2
36
DBCLK
24
ASDATA2
42
DSDATA3
NC/IN2L2/IN2L-
SD2A
17
OUTL+
B
C
Date
Title
Size
Nashua, NH 03063
4
21161N EZ-KIT LITE - CODEC & DAC
Board No.
Rev
A0157-2000
B
Date
20 Cotton Road
2.4
Sheet
2-19-2004_14:44
D
8 OF 24
A
B
C
D
P6
CON013
CT5
10UF
CAP002
FER3
600
1206
2
R22
5.76K
1206
LOOP_ADC1_LEFT
3
1
R21
5.76K
1206
C13
120PF
1206
C12
100PF
1206
2
1
R23
237
1206
U12
AGND
1
IN1L-
AGND
3
VREF
SSM2275
SOIC8
R24
5.76K
1206
C14
0.001UF
805
R26
5.76K
1206
C16
100PF
1206
ADC1 LEFT
C187
120PF
1206
AGND
R25
750K
1206
2
6
C15
0.001UF
805
2
R27
237
1206
U12
7
IN1L+
5
SSM2275
SOIC8
AGND
P6
CON013
CT6
10UF
CAP002
FER4
600
1206
1
R28
5.76K
1206
R29
5.76K
1206
LOOP_ADC1_RIGHT
3
C18
120PF
1206
C17
100PF
1206
3
3
6
R30
237
1206
U13
AGND
7
IN1R-
AGND
5
SSM2275
SOIC8
R31
5.76K
1206
C19
0.001UF
805
R33
5.76K
1206
C21
100PF
1206
ADC1 RIGHT
C188
120PF
1206
AGND
R32
750K
1206
2
C20
0.001UF
805
R34
237
1206
U13
1
4
ANALOG
DEVICES
IN1R+
3
SSM2275
SOIC8
Approvals
Drawn
Checked
AGND
A
Engineering
B
C
Date
Title
Size
Nashua, NH 03063
4
21161N EZ-KIT LITE - PRIMARY INPUT
Board No.
Rev
A0157-2000
B
Date
20 Cotton Road
2.4
Sheet
11-12-2002_17:10
D
9 OF 24
A
B
C
D
SJ8
P6
CON013
CT7
10UF
CAP002
FER5
600
1206
R35
5.76K
1206
SHORTING
JUMPER
DEFAULT=1&3
R36
5.76K
1206
5
SJ9
SHORTING
JUMPER
DEFAULT=2&4
LOOP_ADC2_LEFT
6
1
C23
120PF
1206
C22
100PF
1206
ADC2 LEFT INPUT MODE
1
PGA MODE 3-5 & 4-6
HIGH PERFORMANCEMODE 1-3 & 2-4
2
IN2L2
U14
IN2L-
AGND
R40
237
1206
1
AGND
3
VREF
SSM2275
SOIC8
R37
5.76K
1206
R39
5.76K
1206
2
C24
0.001UF
805
6
JP7
IDC3X2
1
C189
120PF
1206
3
C26
100PF
1206
6
U14
2
AGND
R41
237
1206
7
5
IN2L+
SSM2275
SOIC8
IN2L1LINE
AGND
SJ10
P6
CON013
CT8
10UF
CAP002
FER6
600
1206
ADC2 LEFT
5
C25
0.001UF
805
R38
750K
1206
2
4
R42
5.76K
1206
SHORTING
JUMPER
DEFAULT=1&3
R43
5.76K
1206
4
SJ11
6
C28
120PF
1206
C27
100PF
1206
JP11 (ON SHEET 10) SHOULD BE IN LINE IN
POSITION TO USE EITHER OF THESE MODES
SHORTING
JUMPER
DEFAULT=2&4
LOOP_ADC2_RIGHT
ADC2 RIGHT INPUT MODE
PGA MODE 3-5 & 4-6
HIGH PERFORMANCEMODE 1-3 & 2-4
3
6
IN2R2
U15
3
IN2R-
AGND
R47
237
1206
7
AGND
5
SSM2275
SOIC8
R44
5.76K
1206
R46
5.76K
1206
2
4
C29
0.001UF
805
6
JP8
IDC3X2
C190
120PF
1206
1
3
C31
100PF
1206
C30
0.001UF
805
R45
750K
1206
2
U15
AGND
R48
237
1206
1
3
4
ADC2 RIGHT
5
SSM2275
SOIC8
IN2R1LINE
Approvals
AGND
Drawn
Checked
Engineering
A
ANALOG
DEVICES
IN2R+
B
C
Date
Title
Size
Nashua, NH 03063
4
21161N EZ-KIT LITE - SECONDARY INPUT
Board No.
Rev
A0157-2000
B
Date
20 Cotton Road
2.4
Sheet
11-12-2002_17:11
D
10 OF 24
A
B
C
D
MIC PRE AMP GAIN
JP9
1
SJ12
SHORTING
JUMPER
DEFAULT=1&2
2
1&2 20dB
2&3 40dB
NONE 0 dB
3
IDC3X1
1
1
R53
1.00K
1206
R54
100
1206
C32
820PF
1206
R55
10.0K
1206
AVCC
SJ13
U16
2
CT9
10UF
CAP002
FER7
600
1206
SHORTING
JUMPER
DEFAULT=3&5
1
3
SJ14
SSM2275
SOIC8
R51
10.0K
1206
2
R49
2.00K
1206
3
Q2
MMBT4124
SOT-23
P7
2
3
SHORTING
JUMPER
DEFAULT=4&6
2
IN2R1
2
IN2R1LINE
1
2
VREF
4
6
4
CT11
10UF
B
5
1
R50
2.00K
1206
CON001
MIC INPUT
FER8
600
1206
JP11
IDC3X2
C33
0.1UF
805
1
3
ADC2 RIGHT/LEFT
5
R52
10.0K
1206
IN2L1LINE
AGND
CT10
10UF
CAP002
IN2L1
AGND
U16
5
7
3
3
6
SSM2275
SOIC8
AGND
ADC2 INPUT SELECTOR
INSTALL JUMPERS ON 3-5 & 4-6 FOR LINE IN
INSTALL JUMPERS ON 1-3 & 2-4 FOR MIC IN
R58
10.0K
1206
C34
820PF
1206
R56
1.00K
1206
R57
100
1206
JP10
3
ANALOG
DEVICES
MIC PRE AMP GAIN
SJ15
4
2
1
SHORTING
JUMPER
DEFAULT=1&2
1&2 20dB
2&3 40dB
NONE 0 dB
Approvals
IDC3X1
Drawn
Checked
Engineering
A
B
C
Date
Title
Size
Nashua, NH 03063
4
21161N EZ-KIT LITE - MIC INPUT
Board No.
Rev
A0157-2000
B
Date
20 Cotton Road
2.4
Sheet
2-19-2004_14:44
D
11 OF 24
A
B
C
D
1
1
2
CT34
68UF
CAP003
U29
1
2
DAC1_RIGHT
2
3
AD8532AR
SOIC8
R206
49.9K
1206
P17
2
3
4
5
AGND
1
CON001
6
CT35
68UF
CAP003
U29
AGND
7
DAC1_LEFT
3
5
AD8532AR
SOIC8
3
R192
49.9K
1206
AGND
ANALOG
DEVICES
4
Approvals
Drawn
Checked
Engineering
A
B
C
Date
Title
21161N
Size
B
20 Cotton Road
Nashua, NH 03063
4
EZ-KIT LITE - DAC1 OUTPUT-STEREO JACK
Board No.
Rev
A0157-2000
Date
2.4
Sheet
D
12 OF 24
A
B
C
D
DAC1_LEFT
R61
5.49K
1206
C38
100PF
1206
1
1
R59
11.0K
1206
R62
3.32K
1206
OUT1LP8
C36
330PF
805
DAC1 LEFT
2
R65
604
1206
U17
C35
100PF
1206
CT26
68UF
CAP003
1
CON011
LOOP_DAC1_LEFT
2
3
R60
5.49K
1206
C37
680PF
805
SSM2275
SOIC8
R64
1.65K
1206
3
C40
2200PF
1206
R66
49.9K
1206
OUT1L+
R63
2.74K
1206
2
C39
220PF
1206
2
AGND
VREF
AGND
DAC1_RIGHT
R69
5.49K
1206
R67
11.0K
1206
3
C44
100PF
1206
R70
3.32K
1206
3
OUT1RP8
C42
330PF
805
DAC1 RIGHT
6
R73
604
1206
U17
C41
100PF
1206
CT27
68UF
CAP003
7
CON011
LOOP_DAC1_RIGHT 1
5
R68
5.49K
1206
C43
680PF
805
SSM2275
SOIC8
R72
1.65K
1206
3
C46
2200PF
1206
R74
49.9K
1206
OUT1R+
R71
2.74K
1206
C45
220PF
1206
ANALOG
DEVICES
AGND
4
Approvals
Drawn
AGND
Checked
Engineering
A
B
C
Date
Title
Size
Nashua, NH 03063
4
21161N EZ-KIT LITE - DAC1 OUTPUT
Board No.
Rev
A0157-2000
B
Date
20 Cotton Road
2.4
Sheet
11-12-2002_17:12
D
13 OF 24
A
B
C
R77
5.49K
1206
D
C50
100PF
1206
1
1
R75
11.0K
1206
R78
3.32K
1206
OUT2LP8
C48
330PF
805
DAC2 LEFT
6
R81
604
1206
U18
C47
100PF
1206
CT28
68UF
CAP003
7
CON011
LOOP_DAC2_LEFT 5
5
R76
5.49K
1206
C49
680PF
805
SSM2275
SOIC8
R80
1.65K
1206
6
C52
2200PF
1206
R82
49.9K
1206
OUT2L+
R79
2.74K
1206
2
C51
220PF
1206
2
AGND
VREF
AGND
R85
5.49K
1206
R83
11.0K
1206
3
C56
100PF
1206
R86
3.32K
1206
3
OUT2RP8
C54
330PF
805
DAC2 RIGHT
2
R89
604
1206
U18
C53
100PF
1206
CT29
68UF
CAP003
1
CON011
LOOP_DAC2_RIGHT
4
3
R84
5.49K
1206
C55
680PF
805
SSM2275
SOIC8
R88
1.65K
1206
6
C58
2200PF
1206
R90
49.9K
1206
OUT2R+
R87
2.74K
1206
C57
220PF
1206
ANALOG
DEVICES
AGND
4
Approvals
Drawn
AGND
Checked
Engineering
A
B
C
Date
Title
Size
Nashua, NH 03063
4
21161N EZ-KIT LITE - DAC2 OUTPUT
Board No.
Rev
A0157-2000
B
Date
20 Cotton Road
2.4
Sheet
11-12-2002_17:12
D
14 OF 24
A
B
C
R93
5.49K
1206
D
C62
100PF
1206
1
1
R91
11.0K
1206
R94
3.32K
1206
OUT3LP8
C60
330PF
805
DAC3 LEFT
6
R97
604
1206
U19
C59
100PF
1206
CT30
68UF
CAP003
7
CON011
LOOP_DAC3_LEFT
8
5
R92
5.49K
1206
C61
680PF
805
SSM2275
SOIC8
R96
1.65K
1206
9
C64
2200PF
1206
R98
49.9K
1206
OUT3L+
R95
2.74K
1206
2
C63
220PF
1206
2
AGND
VREF
AGND
R101
5.49K
1206
R99
11.0K
1206
3
C68
100PF
1206
R102
3.32K
1206
3
OUT3RP8
C66
330PF
805
DAC3 RIGHT
2
R105
604
1206
U19
C65
100PF
1206
CT31
68UF
CAP003
1
CON011
LOOP_DAC3_RIGHT
7
3
R100
5.49K
1206
C67
680PF
805
SSM2275
SOIC8
R104
1.65K
1206
9
C70
2200PF
1206
R106
49.9K
1206
OUT3R+
R103
2.74K
1206
C69
220PF
1206
ANALOG
DEVICES
AGND
4
Approvals
Drawn
AGND
Checked
Engineering
A
B
C
Date
Title
Size
Nashua, NH 03063
4
21161N EZ-KIT LITE - DAC3 OUTPUT
Board No.
Rev
A0157-2000
B
Date
20 Cotton Road
2.4
Sheet
11-12-2002_17:12
D
15 OF 24
A
B
C
R109
5.49K
1206
D
C74
100PF
1206
1
1
R107
11.0K
1206
R110
3.32K
1206
OUT4LP8
C72
330PF
805
DAC4 LEFT
6
R113
604
1206
U20
C71
100PF
1206
CT32
68UF
CAP003
7
CON011
LOOP_DAC4_LEFT
11
5
R108
5.49K
1206
C73
680PF
805
SSM2275
SOIC8
R112
1.65K
1206
12
C76
2200PF
1206
R114
49.9K
1206
OUT4L+
R111
2.74K
1206
2
C75
220PF
1206
2
AGND
VREF
AGND
R117
5.49K
1206
R115
11.0K
1206
3
C80
100PF
1206
R118
3.32K
1206
3
OUT4RP8
C78
330PF
805
DAC4 RIGHT
2
R121
604
1206
U20
C77
100PF
1206
CT33
68UF
CAP003
1
CON011
LOOP_DAC4_RIGHT
10
3
R116
5.49K
1206
C79
680PF
805
SSM2275
SOIC8
R120
1.65K
1206
12
C82
2200PF
1206
R122
49.9K
1206
OUT4R+
R119
2.74K
1206
C81
220PF
1206
ANALOG
DEVICES
AGND
4
Approvals
Drawn
AGND
Checked
Engineering
A
B
C
Date
Title
Size
Nashua, NH 03063
4
21161N EZ-KIT LITE - DAC4 OUTPUT
Board No.
Rev
A0157-2000
B
Date
20 Cotton Road
2.4
Sheet
11-12-2002_17:12
D
16 OF 24
A
B
C
3.3V
D
3.3V
1
1
EXFLAG0
EXFLAG3
R124
10K
805
R123
100
805
U21
1
SW1
SWT013
SPST-MOMENTARY
CT12
1UF
A
JP26
2
1
2
U21
9
FLAG0
IDC2X1
74LVC14A
SOIC14
R130
10K
805
R129
100
805
SW4
SWT013
SPST-MOMENTARY
SJ16
8
FLAG3
74LVC14A
SOIC14
CT15
1UF
A
SHORTING
JUMPER
DEFAULT=1 & 2
3.3V
3.3V
3.3V
2
2
R132
10K
805
EXFLAG1
EXIRQ0
R126
10K
805
R125
100
805
U21
3
SW2
SWT013
SPST-MOMENTARY
R136
10K
805
1
2
U21
11
FLAG1
IDC2X1
74LVC14A
SOIC14
CT13
1UF
A
R131
100
805
JP27
4
EXIRQ2
SW5
SWT013
SPST-MOMENTARY
SJ17
CT16
1UF
A
R135
100
805
U21
10
74LVC14A
SOIC14
13
12
U22
U22
5
IRQ0
SW7
SWT013
SPST-MOMENTARY
74LVC14A
SOIC14
CT18
1UF
A
6
74LVC14A
SOIC14
9
8
IRQ2
74LVC14A
SOIC14
SHORTING
JUMPER
DEFAULT=1 & 2
3
3
3.3V
3.3V
R134
10K
805
EXFLAG2
R127
100
805
EXIRQ1
R128
10K
805
5
SW3
SWT013
SPST-MOMENTARY
R133
100
805
U21
CT14
1UF
A
6
U22
1
FLAG2
SW6
SWT013
SPST-MOMENTARY
74LVC14A
SOIC14
CT17
1UF
A
74LVC14A
SOIC14
U22
2
3
4
IRQ1
74LVC14A
SOIC14
ANALOG
DEVICES
4
Approvals
Drawn
Checked
Engineering
A
B
C
Date
Title
Size
Nashua, NH 03063
4
21161N EZ-KIT LITE - PUSHBUTTONS
Board No.
Rev
A0157-2000
B
Date
20 Cotton Road
2.4
Sheet
11-12-2002_17:12
D
17 OF 24
A
B
C
D
VCC
3.3V
1
LED1
RED-SMT
LED001
LED8
RED-SMT
LED001
R143
680
805
1
R144
680
805
LED9
AMBER-SMT
LED001
U23
2
POR
1Y1
4
16
1A2
FLAG[4:9]
2
FLAG4
6
FLAG5
8
1Y2
11
FLAG7
13
FLAG8
15
FLAG9
17
R145
680
805
14
1A3
FLAG6
1Y3
12
1A4
1Y4
2A1
2Y1
2A2
2Y2
2A3
2Y3
2A4
2Y4
9
9
R146
680
805
R147
680
805
U27
8
VERF
10
74LVC00AD
SOIC14
7
5
1
3
U27
2
3
MONITOR
2
74LVC00AD
SOIC14
1
OE1
19
LED11
GREEN-SMT
LED001
18
1A1
DSP_RESET
LED10
AMBER-SMT
LED001
LED2
AMBER-SMT
LED001
OE2
LED3
AMBER-SMT
LED001
LED4
AMBER-SMT
LED001
LED5
AMBER-SMT
LED001
LED6
AMBER-SMT
LED001
LED7
AMBER-SMT
LED001
LED9 INDICATES AUDIO OUTPUT MAY NOT BE VALID
LED10 INDICATES MONITOR FIRMWARE IS RUNNING
74FCT244AT
QSOP20
R137
680
805
R138
680
805
R139
680
805
R140
680
805
R141
680
805
3.3V
R151
10K
805
R142
680
805
R152
33
805
U24
1
OE
5
OUT
25MHZ
OSC01
1/2
CLKIN
3
3.3V
3
XTAL
Y2
XXMHZ
12.5MHZ
OSC006
3.3V
C83
27PF
1206
R177
10K
805
3.3V
SOFT_RESET
4
U27
R148
10K
805
74LVC00AD
SOIC14
11
10
74LVC14A
SOIC14
U26
1
MR
SW8
SWT013
SPST-MOMENTARY
4
PFI
8
RESET
7
RESET
5
PFO
R149
10K
805
U22
6
5
4
DSP_RESET
R150
33
805
U25
1
OE
5
OUT
AUDIO_OSC
OSCILLATOR OR CRYSTAL CAN BE USED FOR THE 21161N
12.288MHZ
OSC001
1/2
ANALOG
DEVICES
POR
Approvals
ADM708SAR
SOIC8
Drawn
Checked
Engineering
A
C84
27PF
1206
B
C
Date
Title
Size
Nashua, NH 03063
4
21161N EZ-KIT LITE - LEDS, RESET, OSC
Board No.
Rev
A0157-2000
B
Date
20 Cotton Road
2.4
Sheet
2-19-2004_14:44
D
18 OF 24
A
B
C
D
3.3V
3.3V
1
1
R158
10K
805
R155
10K
805
R156
10K
805
R159
10K
805
R160
10K
805
R157
10K
805
SJ26
EBOOT
JP19
1
ID0
2
3
ID1
4
5
ID2
6
3
4
5
6
SHORTING
JUMPER
DEFAULT=3 & 4
SHORTING
JUMPER
DEFAULT=NOT INSTALLED
IDC3X2
SJ24
SJ28
BOOT MODES
SHORTING
JUMPER
DEFAULT=3 & 4
*
SJ25
SHORTING
JUMPER
DEFAULT=5 & 6
2
2
SJ27
BMS
SHORTING
JUMPER
DEFAULT=1 & 2
IDC3X2
DSP ID
LBOOT
SJ23
JP20
1
EBOOT
1
0
0
0
0
1
SHORTING
JUMPER
DEFAULT=NOT INSTALLED
LBOOT
BMS
Booting Mode
0
Output
EPROM
0
1 (Input) Host Processor
1
0 (Input) Serial Boot via SPI
1
1 (Input) Link Port
0
0 (Input) No Booting
1
x (Input) Reserved
* DENOTES FACTORY DEFAULT
2
REMOVE JP22 WHEN USING SPI OR NO BOOT MODES (REFER TO SHEET 4)
3.3V
ON
R163
10K
805
LOOP_ADC1_RIGHT
15
3
14
4
13
5
12
6
11
7
10
8
9
3
3
SJ29
CLKDBL
2
3
4
6
LOOP_ADC2_RIGHT
SJ30
8
CLOCK MODES
7
SHORTING
JUMPER
DEFAULT=NOT INSTALLED
IDC3X2
CLKDBL CLK_CFG1 CLK_CFG0 Core Clock Ratio
1
0
0
2:1
1
0
1
3:1
*
1
1
0
4:1
0
0
0
4:1
0
0
1
6:1
0
1
0
8:1
* DENOTES FACTORY DEFAULT
LOOP_ADC2_LEFT
6
5
CLK_CFG0
SHORTING
JUMPER
DEFAULT=NOT INSTALLED
5
CLK_CFG1
1
4
JP21
LOOP_DAC1_LEFT
LOOP_DAC1_RIGHT
LOOP_DAC2_LEFT
3
LOOP_DAC2_RIGHT
LOOP_DAC3_LEFT
LOOP_DAC3_RIGHT
LOOP_DAC4_LEFT
LOOP_DAC4_RIGHT
SWT016
DIP8
SJ31
EP Clock Ratio
1x
1x
1x
2x
2x
2x
16
2
2
R162
10K
805
1
R161
10K
805
SW9
1
LOOP_ADC1_LEFT
SHORTING
JUMPER
DEFAULT=5 & 6
TURNING THE SWITCHES ON PUTS THE BOARD IN LOOPBACK MODE
ANALOG
DEVICES
4
Approvals
Drawn
Checked
Engineering
A
B
C
Date
Title
Size
Nashua, NH 03063
4
21161N EZ-KIT LITE - CONFIGURATION
Board No.
Rev
A0157-2000
B
Date
20 Cotton Road
2.4
Sheet
11-12-2002_17:12
D
19 OF 24
A
B
C
D
1
1
P9
1
2
3
4
A8
5
6
A7
7
8
A6
9
10
A17
A19
A[8:0]
A5
A4
2
13
14
15
16
A2
17
18
A0
3
12
A3
A1
D[23:16]
11
19
20
21
22
D23
23
24
D22
25
26
D21
27
28
D20
29
30
D19
31
32
D18
33
34
D17
35
36
D16
37
38
39
40
A18
A20
A21
RD
VCC
WR
EBOOT
ACK
LBOOT
DMAG1
BMS
DMAR1
EXFLAG0
DMAG2
EXFLAG1
DMAR2
EXFLAG2
PA
EXFLAG3
SBTS
EXIRQ0
HBR
EXIRQ1
HBG
REDY
P10
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
3.3V
1.8V
TIMEXP
EXIRQ2
P11
1
2
MISO
3
4
MOSI
5
6
SPIDS
7
8
SPICLK
9
10
11
12
P18
1
BR1
2
BR2
3
BR3
4
MS2
2
5
MS3
IDC5X1
DNP
DSP_RESET
IDC6X2
CON023
CS
BMSTR
BRST
CON022
3
ANALOG
DEVICES
4
Approvals
Drawn
Checked
Engineering
A
B
C
Date
Title
Size
Nashua, NH 03063
4
21161N EZ-KIT LITE - EXPANSION HEADERS
Board No.
Rev
A0157-2000
B
Date
20 Cotton Road
2.4
Sheet
11-12-2002_17:12
D
20 OF 24
A
B
C
D
LINK PORT CONNECTORS
1
1
P13
14
CLKSH
15
ACKSH
16
D0SH
17
D1SH
18
D2SH
19
D3SH
20
D4SH
21
D5SH
22
D6SH
23
D7SH
26
UD2
2
SERIAL PORT CONENCTOR
1
UD1
2
CLK
L0CLK
3
ACK
L0ACK
4
L0D0
5
L0D1
D0
D1
L0D[0:7]
SCLK1
R218
0.00
1206
R217
0.00
1206
SFS1
CH1
2
3
4
5
6
7
8
6
L0D2
7
L0D3
8
L0D4
9
10
9
L0D5
11
12
10
L0D6
13
14
11
L0D7
15
16
17
18
19
20
D2
D3
D4
D5
D6
D7
SD1A
SD1B
SCLK3
SFS3
SD3A
28
P15
1
27
CH2
SD3B
2
CON014
LINKPORT
CON010
SHGND
SHGND
P14
14
CLKSH
15
ACKSH
16
D0SH
17
D1SH
18
D2SH
3
19
D3SH
20
D4SH
21
D5SH
22
D6SH
23
D7SH
26
UD2
28
CH1
1
UD1
CLK
L1CLK
L1ACK
4
L1D0
5
L1D1
6
L1D2
7
L1D3
8
L1D4
9
L1D5
10
L1D6
11
L1D7
D0
D1
2
DLRCLK
3
ACK
3
DSDATA2
L1D[0:7]
4
ASDATA2
IDC4X1
D2
D3
D4
D5
D6
D7
CH2
P3
1
DBCLK
2
3
27
LINKPORT
CON010
SHGND
SHGND
ANALOG
DEVICES
4
JP1 SHOULD NOT BE INSTALLED WHEN USING THE LINK PORT
Approvals
Drawn
Checked
Engineering
A
B
C
Date
Title
Size
Nashua, NH 03063
4
21161N EZ-KIT LITE - LINK PORTS & SPORTS
Board No.
Rev
A0157-2000
B
Date
20 Cotton Road
2.4
Sheet
11-13-2003_11:39
D
21 OF 24
A
B
C
D
VCC
F1
2.5A
FUS001
1
FER13
CHOKE_COIL
4
3
1
2
D2
2A
DO-214AA
VR1
5V_REG_IN
3
INPUT
P16
1
D1
2A
DO-214AA
C86
1000PF
1206
2
R167
100K
1206
CT19
10UF
C
2
OUTPUT
GND
1
ADP3339AKC-5
SOT-223
C87
0.1UF
805
1
CT20
10UF
C
C88
0.1UF
805
FER9
600
1206
3
7_5V_POWER
CON005
3.3V
AGND
C85
1000PF
1206
1.8V
3.3V
FER10
600
1206
VCC
VCC
D3
2A
DO-214AA
VR2
2
VR3
3
INPUT
SHGND
OUTPUT
2
3
INPUT
GND
1
ADP3338ARM-33
SOT-223
SHGND
2
OUTPUT
2
GND
1
ADP3338ARM-18
SOT-223
CT21
10UF
C
C89
0.1UF
805
VCC
CT22
10UF
C
C90
0.1UF
805
AVCC
FER11
600
1206
1.8V
3.3V
VDDINT
1.8V
R168
0.00
1206
3
SJ34
3
AVCC
SHORTING
JUMPER
DEFAULT=DNP
5V_REG_IN
3.3V
R216
22K
805
VR4
2
INPUT
JP25
1
6
SD
2
OUTPUT
3
3
INPUT
1
C180
0.1UF
805
FB
GND
4 ADP3331ART
SOT23-6
DNP
R169
0.00
1206
2
OUTPUT
GND
1
ADP3339AKC-5
SOT-223
R211
500K
RES002
DNP
R215
365K
1206
DNP
R212
1MEG
RES002
DNP
R214
634K
1206
DNP
CT36
10UF
C
C173
0.1UF
805
R168 & R169 ARE USED TO MEASURE CURRENT DRAW OF THE DSP
ANALOG
DEVICES
AGND
Approvals
Drawn
Checked
Engineering
A
VDDEXT
VR5
5
IDC2X1
DNP
4
ERR
R213
100K
1206
DNP
B
C
Date
Title
Size
Nashua, NH 03063
4
21161N EZ-KIT LITE - POWER
Board No.
Rev
A0157-2000
B
Date
20 Cotton Road
2.4
Sheet
2-19-2004_14:44
D
22 OF 24
A
B
C
D
3.3V
VDDINT
1
1
C91
0.01UF
805
C92
0.01UF
805
C93
0.01UF
805
C94
0.01UF
805
C95
0.01UF
805
C96
0.01UF
805
C97
0.01UF
805
C98
0.01UF
805
C99
0.01UF
805
C118
0.01UF
805
C100
0.01UF
805
C119
0.01UF
805
C120
0.01UF
805
C121
0.01UF
805
C122
0.01UF
805
C123
0.01UF
805
C127
0.01UF
805
C128
0.01UF
805
C129
0.01UF
805
C133
0.01UF
805
C134
0.01UF
805
C135
0.01UF
805
3.3V
VDDINT
2
C101
0.01UF
805
C102
0.01UF
805
VDDEXT
C103
0.01UF
805
C104
0.01UF
805
C105
0.01UF
805
C106
0.01UF
805
C107
0.01UF
805
C108
0.01UF
805
C124
0.01UF
805
C125
0.01UF
805
C126
0.01UF
805
2
3.3V
VDDEXT
C109
0.01UF
805
C110
0.01UF
805
C111
0.01UF
805
C112
0.01UF
805
C113
0.01UF
805
C114
0.01UF
805
C115
0.01UF
805
C116
0.01UF
805
C117
0.01UF
805
C130
0.01UF
805
C131
0.01UF
805
C132
0.01UF
805
3
3
3.3V
DSP (U1)
SDRAM (U2, U3, U4)
3.3V
C136
0.01UF
805
C137
0.01UF
805
C138
0.01UF
805
C139
0.01UF
805
C140
0.01UF
805
C141
0.01UF
805
C142
0.01UF
805
C143
0.01UF
805
C144
0.01UF
805
ANALOG
DEVICES
4
FLASH (U5)
Approvals
USB INTERFACE (U6)
Drawn
Checked
Engineering
A
B
C
Date
Title
Size
Nashua, NH 03063
4
21161N EZ-KIT LITE - BYPASS CAPS 1
Board No.
Rev
A0157-2000
B
Date
20 Cotton Road
2.4
Sheet
11-12-2002_17:12
D
23 OF 24
A
B
3.3V
VCC
AVCC
3.3V
3.3V
C
VCC
AVCC
VCC
D
AVCC
1
1
C145
0.01UF
805
C146
0.01UF
805
C147
0.01UF
805
C148
0.01UF
805
C149
0.01UF
805
C150
0.1UF
805
C151
0.1UF
805
C152
0.1UF
805
C153
0.1UF
805
C154
0.01UF
805
C155
0.01UF
805
AGND
SERIAL EEPROM (U7)
DIGITAL RX (U8)
AGND
NAND (U9)
AGND
CODEC (U10)
AUX DAC (U11)
AVCC
3.3V
2
C156
0.22UF
805
C157
0.22UF
805
C158
0.22UF
805
C159
0.22UF
805
C160
0.22UF
805
C161
0.22UF
805
C162
0.22UF
805
C163
0.22UF
805
C164
0.22UF
805
C172
0.22UF
805
C183
0.22UF
805
C165
0.01UF
805
VCC
C166
0.01UF
805
3.3V
C167
0.01UF
805
3.3V
C168
0.01UF
805
C169
0.01UF
805
2
C170
0.01UF
805
AGND
SCHMITT TRIGGERS (U21 & U22)
OPAMPS (U12-U20, U28, U29)
3.3V
3.3V
3.3V
3.3V
3.3V
OCTAL BUFFER (U23)
3.3V
OSCILLATORS (U24 & U25)
3.3V
3
VCC
C171
0.01UF
805
C186
0.01UF
805
NAND (U27)
SRAM (U30)
C185
0.01UF
805
C184
0.01UF
805
MUX (U31)
C177
0.01UF
805
FIFO (U32)
C176
0.01UF
805
SHIFTER (U33)
C178
0.01UF
805
RESET MON (U26)
C179
0.01UF
805
NOR (U34 & U37)
C174
0.01UF
805
C175
0.01UF
805
3.3V
CT23
4.7UF
C
1.8V
CT24
4.7UF
C
3
CT25
4.7UF
C
QUICK SWITCH (U35 & U36)
ANALOG
DEVICES
4
Approvals
Drawn
Checked
Engineering
A
B
C
Date
Title
Size
Nashua, NH 03063
4
21161N EZ-KIT LITE - BYPASS CAPS 2
Board No.
Rev
A0157-2000
B
Date
20 Cotton Road
2.4
Sheet
11-12-2002_17:12
D
24 OF 24
I
INDEX
Symbols
~BMS, memory select pin, 2-2, 3-3
~MS0, memory select pin, 2-2, 3-3
~MS1, memory select pin, 2-2, 3-3
A
abort, hang operations, 2-12
acknowledge, hang operation, 2-12
AD1836, xii, 2-6, 3-3, 3-4, 3-6
control registers, 3-12
MIC1 input channel, 3-4
SPI port, 2-7
SPI select pin, 2-5
AD1852, xii, 2-7, 3-4, 3-6
sampling frequency, 3-7
SPI port, 2-7
SPI select pin, 2-5
ADC1 input selector (JP11), 3-9
ADC2 mode selection (JP7, JP8), 3-8
Add New Hardware Wizard, Windows
98, 1-7
ADSP-21161N processor
boot modes, 3-10
clock jumper (JP21), 3-11
core speed, 3-3
core voltage, 3-2
external voltage, 3-2
ID jumper (JP19), 3-10
internal memory restrictions, 2-2
interrupt pins, 2-6
memory map, 2-2
reset, 2-5
SPI port, 2-7
analog audio
input, 2-6
interface, xii
asynchronous FLAGs, 2-5
audio
connectors (P4-8, P17), 3-18
input, 2-6, 3-3
interface, 2-6
output, 2-8, 3-3
stream, 3-14
B
bill of materials, A-1
BMS pin
enabling (JP22), 3-12
see ~BMS, select pin
board measurements, 3-21
boot
code, xiii
load, 2-9
memory select pin (~BMS), 3-3, 3-12
ADSP-21161N EZ-KIT Lite Evaluation System Manual
I-1
INDEX
memory space, 2-2
mode select (JP20), 3-10
breadboard area, xiii
breakpoints, 2-12
C
clear, hang operations, 2-12
CLK_CFG pins, 3-11
CLKDBL pins, 3-11
clock
frequency, 3-11
mode jumper (JP21), 3-3, 3-11
modes, 3-11
common attributes, hardware
breakpoints, 2-13
configuring SDRAM, 2-3
connecting, EZ-KIT Lite board, 1-5
connectors, -xii, 1-5, 3-16
JP11 (analog audio input), 2-6
JP2 (digital audio input), 2-6
P10 (external port), 2-5, 2-6, 3-3,
3-19
P12 (JTAG header), 3-19
P13 (link port), 3-19
P14 (link port), 3-19
P15 (SPORT1, SPORT3), 3-20
P16 (power), 1-5, 3-20
P2 (USB), 1-6, 3-16
P4 (optical input), 2-6, 3-5
P5 (mono jack), 2-6, 3-5
P6 (mono jack), 2-6, 3-4, 3-9
P7 (stereo jack), 2-6, 3-4, 3-9
P9 (external port), 3-3, 3-18
contents, EZ-KIT Lite package, 1-1
I-2
conventions, manual, -xxi
converters, 2-7
core
clock ratio, 3-11
hang conditions, 2-11
voltage, 3-21
CS8414 digital receiver, 2-7, 3-5, 3-14
clock signals, 2-7
synchronization signals, 2-7
customer support, xvi
D
data hardware breakpoints, 2-15
Device Manager window, 1-15
digital
audio playback, 2-7
data, 2-7
stereo channels, 2-7
DSP signals, DAI_P, 3-15
DVD formats, 2-7
E
EBOOT pins, 3-10
electrostatic discharge, 1-2
emulator connector, xiii
enable attribute, 2-14
end address, attribute, 2-14
EPROM boot mode, 3-10, 3-12
example programs, 2-8
exclusive, attribute, 2-14
expansion connector footprints, xiii
external
data bus, 3-5
interrupts, 2-6
ADSP-21161N EZ-KIT Lite Evaluation System Manual
INDEX
memory, EZ-KIT Lite, 2-3
port clock ratio, 3-11
port connectors, 3-3
port interface, xiii, 3-3
port signals, 3-18, 3-19
EZ-KIT Lite board
architecture, 3-2
features, xii
specifications, 3-21
Found New Hardware Wizard
Windows 2000, 1-13
frequency jumper (JP6), 3-7
F
features, EZ-KIT Lite board, -xii
FLAG
directing, 2-5
pins, 2-5, 3-15
registers, 2-5
FLAG0, 2-5, 3-12, 3-15
enable jumper (JP4), 3-7
FLAG1, 2-5, 3-12, 3-15
enable jumper (JP5), 3-7
FLAG10, 2-5
FLAG11, 2-5
FLAG2, 2-5, 3-15
FLAG3, 2-5, 3-15
FLAG4, 3-14
FLAG4-9, 2-5, 3-14
FLAG5, 3-14
FLAG6, 3-14
FLAG7, 3-14
FLAG8, 3-14
FLAG9, 3-14
flash
memory, xii, 2-2, 3-3, 3-12
programmer, 2-8
H
hard reset, 2-9
hardware breakpoints, 2-12, 2-17, 2-18
dialog box, 2-13
Help, online, xix, 2-8
host
processor booting, 3-10
processor interface, xiii, 3-3
processor interface connector (P10),
3-19
hung conditions, 2-11
G
general-purpose IO, xiii
global options, hardware breakpoints,
2-13
graphical user interface (GUI), 2-9
I
I2S mode, 2-7
ignore, hang operations, 2-12
input clock, 3-2
installation, summary, 1-3
installing
EZ-KIT Lite USB driver, 1-6
VisualDSP++ and EZ-KIT Lite
license, 1-4
VisualDSP++ and EZ-KIT Lite
software, 1-4
instruction hardware breakpoints, 2-16
ADSP-21161N EZ-KIT Lite Evaluation System Manual
I-3
INDEX
interface connectors, xiii
interfaces
see graphical user interface (GUI)
internal memory, EZ-KIT Lite, 2-3
interrupt
pins, 2-6
push buttons, xiii
see also push buttons
IO
input push buttons (SW1-4), 3-15
pins see FLAGs
voltage, 3-21
IRQ0-2 pins, 2-6, 3-16
J
JTAG
connector (P12), 3-19
emulation port, 3-5
emulator, 3-19
jumper settings, 1-5
jumpers, 2-7
JP1 (SDRAM disable), 3-5
JP10 (microphone), 3-8
JP11 (audio in), 3-4, 3-9
JP19 (processor ID), 3-10
JP2 (SPDIF), 3-5
JP20 (boot mode), 3-10
JP21 (clock), 3-11
JP22 (~BMS), 3-12
JP26 (SW1 enable), 3-12
JP27 (SW2 enable), 3-12
JP3 (MCLK source), 3-6
JP6 (frequency), 3-7
JP7 (ADC2), 3-8
I-4
JP8 (ADC2), 3-8
JP9 (microphone), 3-8
L
latency, 2-18
LBOOT pins, 3-10
LEDs, xiii, 1-5, 2-5, 3-13, 3-14
LED1 (reset), 1-5, 3-14
LED10 (USB monitor), 1-15, 1-16,
3-15
LED11 (power), 1-5, 3-15
LED2 (FLAG9), 3-14
LED2-LED7 (FLAGs), 3-14
LED3 (FLAG8), 3-14
LED4 (FLAG7), 3-14
LED5 (FLAG6), 3-14
LED6 (FLAG5), 3-14
LED7 (FLAG4), 3-14
LED8 (DSP reset), 1-5, 1-14, 3-14
LED9 (VERF), 2-8, 3-14
line-in
input channel, 3-4
jacks, 2-7
line-out jacks, 2-8
link port, 3-5, 3-10
booting, 3-11
connectors, 3-19
M
MCLK, selecting (JP3), 3-6
measurements, EZ-KIT Lite, 3-21
memory
restrictions, 2-2
select pins, 3-3
ADSP-21161N EZ-KIT Lite Evaluation System Manual
INDEX
microphone
circuit, 3-8
jacks, 2-7
mode, attribute, 2-14
MODE2 register, 2-5
N
no-boot mode, 3-11, 3-12
O
oscillator, 3-11
surface-mount, 3-2
through-hole, 3-2
through-hole crystal, 3-2
P
package contents, 1-1
PC configuration, 1-3
power
connector (P16), 3-20
LED (LED11), 3-15
specifications, 3-21
supply, 3-21
processor external memory, see
ADSP-21161N processor
programmable FLAGs
see FLAGs
push buttons, xiii, 2-6, 3-13, 3-15
SW1 (FLAG0), 3-15
SW2 (FLAG1), 3-15
SW3 (FLAG2), 3-15
SW4 (FLAG3), 3-15
SW5 (IRQ0), 3-15
SW6 (IRQ1), 3-15
SW7 (IRQ2), 3-15
SW8 (reset), 3-16
R
RCA jacks, 2-7, 3-3
registering, this product, 1-2, 1-4
reset
board, 2-9
hang operation, 2-12
processor, 3-14
push button (SW8), 3-16
retry, hang operation, 2-12
S
sample frequencies, 2-7
SDRAM
configuration, 2-3
control registers, 2-3
disabling (JP1), 3-5
memory, 2-2, 2-3, 3-3
semiconductor receiver, xii
serial booting, 3-10, 3-12
setting
breakpoints, 2-18
EZ-KIT Lite hardware, 1-5
target options, 2-9
SMT footprints, xiii
SPDIF
connectors, 3-14
modes, 3-7
selecting (JP2), 3-5
specifications, 3-21
SPI
audio interface, 3-4
ADSP-21161N EZ-KIT Lite Evaluation System Manual
I-5
INDEX
port, 3-4, 3-12
select pin, 2-5
SPORT
audio interface, 3-3
connectors, 3-3
SPORT0, xiii
SPORT1, xiii, 3-12, 3-20
SPORT2, xiii
SPORT3, xiii, 3-20
SRAM memory, 2-2
start address, attribute, 2-14
starting VisualDSP++, 1-16
stereo
jack (P7), 2-6, 3-3
output channels, 2-6
SW1 (FLAG0) push button, 2-5
SW1 (JP26) enable push button, 3-12
SW2 (FLAG1) push button, 2-5
SW3 (FLAG2) push button, 2-5
SW4 (FLAG3) push button, 2-5
SW5 (interrupt) push button, 2-6, 3-16
SW6 (interrupt) push button, 2-6, 3-16
SW7 (interrupt) push button, 2-6, 3-16
SW8 (reset) push button, 1-14
system
architecture, EZ-KIT Lite board, 3-2
requirements, PC, 1-3
T
target options
dialog box, 2-9
miscellaneous, 2-10
I-6
on emulator exit, 2-10
while target is halted, 2-10
U
UART, 3-11
USB
cable, 1-2
connector (P2), 3-16
debug interface, 3-19
driver installation, Windows 2000,
1-11
driver installation, Windows 98, 1-7
driver installation, Windows XP, 1-12
interface, 3-14, 3-16
monitor LED (LED10), 3-15
user
input, 2-5
output, 2-5
V
VERF flag (LED9), 2-8, 3-14
verifying USB driver installation, 1-14
VisualDSP++
documentation, xix
installation, 1-4
license, 1-4
online Help, xix
requirements, 1-3
starting, 1-16
voltage regulators, xiii
ADSP-21161N EZ-KIT Lite Evaluation System Manual
INDEX
ADSP-21161N EZ-KIT Lite Evaluation System Manual
I-7