ADSP-21369 EZ-KIT Lite®
Evaluation System Manual
Revision 1.0, August 2005
Part Number
82-000196-01
Analog Devices, Inc.
One Technology Way
Norwood, Mass. 02062-9106
a
Copyright Information
© 2005 Analog Devices, Inc., ALL RIGHTS RESERVED. This document may not be reproduced in any form without prior, express written
consent from Analog Devices, Inc.
Printed in the USA.
Limited Warranty
The EZ-KIT Lite evaluation system is warranted against defects in materials and workmanship for a period of one year from the date of purchase
from Analog Devices or from an authorized dealer.
Disclaimer
Analog Devices, Inc. reserves the right to change this product without
prior notice. Information furnished by Analog Devices is believed to be
accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use; nor for any infringement of patents or other rights of
third parties which may result from its use. No license is granted by implication or otherwise under the patent rights of Analog Devices, Inc.
Trademark and Service Mark Notice
The Analog Devices logo, VisualDSP++, the VisualDSP++ logo, SHARC,
CROSSCORE, the CROSSCORE logo, and EZ-KIT Lite are registered
trademarks of Analog Devices, Inc.
All other brand and product names are trademarks or service marks of
their respective owners.
Regulatory Compliance
The ADSP-21369 EZ-KIT Lite evaluation system has been certified to
comply with the essential requirements of the European EMC directive
89/336/EEC (inclusive 93/68/EEC) and, therefore, carries the “CE”
mark.
The ADSP-21369 EZ-KIT Lite evaluation system had been appended to
Analog Devices Development Tools Technical Construction File referenced “DSPTOOLS1” dated December 21, 1997 and was awarded CE
Certification by an appointed European Competent Body and is on file.
The EZ-KIT Lite evaluation system contains ESD
(electrostatic discharge) sensitive devices. Electrostatic charges readily accumulate on the human
body and equipment and can discharge without
detection. Permanent damage may occur on devices
subjected to high-energy discharges. Proper ESD
precautions are recommended to avoid performance
degradation or loss of functionality. Store unused
EZ-KIT Lite boards in the protective shipping
package.
CONTENTS
PREFACE
Purpose of This Manual ................................................................ xiii
Intended Audience ........................................................................ xiii
Manual Contents .......................................................................... xiii
What’s New in This Manual ........................................................... xiv
Technical or Customer Support ...................................................... xiv
Supported Processors ....................................................................... xv
Product Information ....................................................................... xv
MyAnalog.com ......................................................................... xvi
Processor Product Information .................................................. xvi
Related Documents ................................................................. xvii
Online Technical Documentation ........................................... xviii
Accessing Documentation From VisualDSP++ ...................... xix
Accessing Documentation From Windows ............................ xix
Accessing Documentation From Web ................................... xix
Printed Manuals ........................................................................ xx
VisualDSP++ Documentation Set .......................................... xx
Hardware Tools Manuals ....................................................... xx
Processor Manuals ................................................................. xx
ADSP-21369 EZ-KIT Lite Evaluation System Manual
v
CONTENTS
Data Sheets ......................................................................... xxi
Notation Conventions .................................................................. xxii
USING EZ-KIT LITE
Package Contents ......................................................................... 1-2
Default Configuration .................................................................. 1-3
Installation and Session Startup ..................................................... 1-4
Evaluation License Restrictions ..................................................... 1-6
External Memory .......................................................................... 1-7
ELVIS Interface ............................................................................ 1-8
Analog Audio ............................................................................... 1-9
LEDs and Push Buttons .............................................................. 1-10
Example Programs ...................................................................... 1-12
Background Telemetry Channel .................................................. 1-12
EZ-KIT LITE HARDWARE REFERENCE
System Architecture ...................................................................... 2-2
External Port ........................................................................... 2-3
DAI Interface .......................................................................... 2-4
DPI Interface .......................................................................... 2-5
FLAG Pins .............................................................................. 2-6
External PLL ........................................................................... 2-7
Expansion Interface ................................................................. 2-7
JTAG Emulation Port ............................................................. 2-8
Switch Settings ............................................................................. 2-8
vi
ADSP-21369 EZ-KIT Lite Evaluation System Manual
CONTENTS
Boot Mode and Clock Ratio Select Switch (SW2) ..................... 2-8
Codec Setup Switch (SW3) .................................................... 2-10
Electret Microphone Select Switch (SW4) .............................. 2-11
UART Enable Switch (SW5) .................................................. 2-11
Loop-Back Test Switches (SW6 and SW14) ............................ 2-12
Push Button Enable Switch (SW7) ......................................... 2-12
ELVIS Oscilloscope Configuration Switch (SW1) ................... 2-13
ELVIS Function Generator Configuration Switch (SW13) ...... 2-13
LEDs and Push Buttons .............................................................. 2-14
General Purpose LEDs (LED1–8) .......................................... 2-14
Power LED (LED9) ............................................................... 2-14
Reset LEDs (LED10 and LED12) .......................................... 2-15
USB Monitor LED (LED11) ................................................. 2-16
Push Buttons (SW8–11) ........................................................ 2-16
Board Reset Push Button (SW12) .......................................... 2-17
Jumpers ...................................................................................... 2-17
VCO Select Jumper (JP1) ...................................................... 2-17
ELVIS Select Jumper (JP2) .................................................... 2-19
ELVIS Voltage Selection Jumper (JP3) ................................... 2-19
ELVIS Programmable Flag Jumper (JP4) ................................ 2-20
Connectors ................................................................................. 2-20
Expansion Interface Connectors (J1–J3) ................................. 2-20
Audio In RCA Connector (P10) ............................................. 2-22
Audio Out RCA Connector (J5) ............................................ 2-22
ADSP-21369 EZ-KIT Lite Evaluation System Manual
vii
CONTENTS
Headphone Out Jack (P7) ..................................................... 2-22
Power Jack (J4) ..................................................................... 2-22
RS-232 Connector (P1) ........................................................ 2-23
SPDIF Coax Connectors (P8 and P9) .................................... 2-23
DPI Header (P3) ................................................................... 2-24
DAI Header (P4) .................................................................. 2-24
USB Connector (P5) ............................................................. 2-24
JTAG Header (P2) ................................................................ 2-25
BILL OF MATERIALS
SCHEMATICS
INDEX
viii
ADSP-21369 EZ-KIT Lite Evaluation System Manual
PREFACE
Thank you for purchasing the ADSP-21369 EZ-KIT Lite®, Analog
Devices, Inc. evaluation system for ADSP-21369 SHARC® processors.
The SHARC processors are based on a 32-bit super Harvard architecture
that includes a unique memory architecture comprised of two large
on-chip, dual-ported SRAM blocks coupled with a sophisticated IO processor, which gives a SHARC processor the bandwidth for sustained
high-speed computations. SHARC processors represents today’s de facto
standard for floating-point processing, targeted toward premium audio
applications.
The evaluation system is designed to be used in conjunction with the
VisualDSP++® development environment to test the capabilities of the
ADSP-21369 SHARC processors. The VisualDSP++ development environment gives you the ability to perform advanced application code
development and debug, such as:
• Create, compile, assemble, and link application programs written
in C++, C, and ADSP-21369 assembly
• Load, run, step, halt, and set breakpoints in application program
• Read and write data and program memory
• Read and write core and peripheral registers
• Plot memory
ADSP-21369 EZ-KIT Lite Evaluation System Manual
ix
Access to the ADSP-21369 processor from a personal computer (PC) is
achieved through a USB port or an optional JTAG emulator. The USB
interface gives unrestricted access to the ADSP-21369 processor and the
evaluation board peripherals. Analog Devices JTAG emulators offer faster
communication between the host PC and target hardware. Analog Devices
carries a wide range of in-circuit emulation products. To learn more about
Analog Devices emulators and processor development tools, go to
http://www.analog.com/dsp/tools/.
ADSP-21369 EZ-KIT Lite installation is part of the VisuL The
alDSP++ installation. The EZ-KIT Lite is a licensed product that
offers an unrestricted evaluation license for the first 90 days. For
details about evaluation license restrictions after the 90 days, refer
“Evaluation License Restrictions” on page 1-6.
ADSP-21369 EZ-KIT Lite provides example programs to demonstrate the
capabilities of the evaluation board.
The board features:
• Analog Devices ADSP-21369 processor
D
D
256-pin SBGA package
400 MHz core clock speed
• Synchronous dynamic random access memory (SDRAM)
D
1M x 32-bit x 4 Banks
• Synchronous random access memory (SRAM)
D
512 Kbit x 8-bit
• Flash memory
D
x
1M x 8-bit
ADSP-21369 EZ-KIT Lite Evaluation System Manual
Preface
•
Serial peripheral interconnect (SPI) flash memory
D
2 Mbit
• Analog audio interface
D
D
D
D
AD1835A codec
4x2 RCA phono jack for 4 channels of stereo output
2x1 RCA phono jack for 1 channel of stereo input
3.5 mm headphone jack for 1 channel stereo output
• Digital audio interface
D
D
RCA phono jack output
RCA phono jack input
• Universal asynchronous receiver/transmitter (UART)
D
D
ADM3202 RS-232 driver/receiver
DB9 female connector
• National Instruments Educational Laboratory Virtual Instrumentation Suite (ELVIS) Interface
D
D
D
LabVIEW™-based virtual instruments
Multifunction data acquisition device
Bench-top workstation and prototype board
• LEDs
D
12 LEDs: 1 power (green), 1 board reset (red), 1 USB reset
(red), 1 USB monitor (amber), and 8 general purpose
(amber)
• Push buttons
D
5 push buttons: 1 reset, 2 connected to DAI,
2 connected to the FLAG pins of the processor
ADSP-21369 EZ-KIT Lite Evaluation System Manual
xi
• Expansion interface (Type A)
D
Parallel Port, FLAG pins, DPI, DAI
• Other features
D
D
D
D
JTAG ICE 14-pin header
Test points for processor current measurement
DPI header
DAI header
The EZ-KIT Lite board has a total of 1 MB of parallel flash memory and
2 Mbit of SPI flash memory. The flash memories can store user-specific
boot code, allowing the board to run as a stand-alone unit. For more
information, see “External Memory” on page 1-7 and “Boot Mode and
Clock Ratio Select Switch (SW2)” on page 2-8. The board also has
512 KB of SRAM and 16 MB of SDRAM, which can be used at runtime.
The DAI port of the processor connects to the AD1835A audio codec, an
external phase lock loop (PLL), and the SPDIF interface. The DAI interface facilitates development of digital and analog audio signal-processing
applications. See “Analog Audio” on page 1-9 and “SPDIF Coax Connectors (P8 and P9)” on page 2-23 for more information.
The DPI port of the processor connects to the UART interface and the
SPI interface. The UART interface can connect to a standard RS-232 connection, while the SPI connects to the 2 Mbit of serial flash memory.
Additionally, the EZ-KIT Lite board provides access to all of the processor’s peripheral ports. Access is provided in the form of a three-connector
expansion interface. See “Expansion Interface” on page 2-7 for details.
xii
ADSP-21369 EZ-KIT Lite Evaluation System Manual
Preface
Purpose of This Manual
The ADSP-21369 EZ-KIT Lite Evaluation System Manual provides
instructions for installing the product hardware (board) and describes the
operation and configuration of the board components. The product software component is detailed in the VisualDSP++ Installation Quick
Reference Card. The manual provides guidelines for running your own
code on the ADSP-21369 EZ-KIT Lite. Finally, a schematic and a bill of
materials are provided as a reference for future designs.
Intended Audience
The primary audience for this manual is a programmer who is familiar
with Analog Devices processors. This manual assumes that the audience
has a working knowledge of the appropriate processor architecture and
instruction set. Programmers who are unfamiliar with Analog Devices
processors can use this manual but should supplement it with other texts
(such as the ADSP-2136x SHARC Processor Programming Reference and
ADSP-2136x SHARC Processor Hardware Reference for ADSP-21367/8/9
Processors) that describe your target architecture.
Programmers who are unfamiliar with VisualDSP++ should refer to the
VisualDSP++ online Help and the VisualDSP++ user’s or getting started
guides. For the locations of these documents, see “Related Documents”.
Manual Contents
The manual consists of:
• Chapter 1, “Using EZ-KIT Lite” on page 1-1
Provides information on the EZ-KIT Lite from a programmer’s
perspective and provides an easy-to-access memory map.
ADSP-21369 EZ-KIT Lite Evaluation System Manual
xiii
What’s New in This Manual
• Chapter 2, “EZ-KIT Lite Hardware Reference” on page 2-1
Provides information on the hardware aspects of the evaluation
system.
• Appendix A, “Bill Of Materials” on page A-1
Provides a list of components used to manufacture the EZ-KIT
Lite board.
• Appendix B, “Schematics” on page B-1
Provides the resources to allow modifications to the EZ-KIT Lite
or to use as a reference design.
appendix is not part of the online Help. The online Help
L This
viewers should go to the PDF version of the ADSP-21369 EZ-KIT
Lite Evaluation System Manual located in the Docs\EZ-KIT Lite
Manuals folder on the installation CD to see the schematics. Alternatively, the schematics can be found on the Analog Devices Web
site at http://www.analog.com/processors.
What’s New in This Manual
This is the first revision of the ADSP-21369 EZ-KIT Lite Evaluation System Manual.
Technical or Customer Support
You can reach Analog Devices, Inc. Customer Support in the following
ways:
• Visit the Embedded Processing and DSP products Web site at
http://www.analog.com/processors/technicalSupport
• E-mail tools questions to
processor.tools.support@analog.com
xiv
ADSP-21369 EZ-KIT Lite Evaluation System Manual
Preface
• E-mail processor questions to
processor.support@analog.com (World wide support)
processor.europe@analog.com (Europe support)
processor.china@analog.com (China support)
• Phone questions to 1-800-ANALOGD
• Contact your Analog Devices, Inc. local sales office or authorized
distributor
• Send questions by mail to:
Analog Devices, Inc.
One Technology Way
P.O. Box 9106
Norwood, MA 02062-9106
USA
Supported Processors
The ADSP-21369 EZ-KIT Lite evaluation system supports the Analog
Devices ADSP-21369 SHARC processors.
Product Information
You can obtain product information from the Analog Devices Web site,
from the product CD-ROM, or from the printed publications (manuals).
Analog Devices is online at http://www.analog.com. Our Web site provides information about a broad range of products—analog integrated
circuits, amplifiers, converters, and digital signal processors.
ADSP-21369 EZ-KIT Lite Evaluation System Manual
xv
Product Information
MyAnalog.com
MyAnalog.com is a free feature of the Analog Devices Web site that allows
customization of a Web page to display only the latest information on
products you are interested in. You can also choose to receive weekly
e-mail notifications containing updates to the Web pages that meet your
interests. MyAnalog.com provides access to books, application notes, data
sheets, code examples, and more.
Registration:
Visit http://www.myanalog.com to sign up. Click Register to use MyAnalog.com. Registration takes about five minutes and serves as means for you
to select the information you want to receive.
If you are already a registered user, just log on. Your user name is your
e-mail address.
Processor Product Information
For information on embedded processors and DSPs, visit our Web site at
http://www.analog.com/processors, which provides access to technical
publications, data sheets, application notes, product overviews, and product announcements.
You may also obtain additional information about Analog Devices and its
products in any of the following ways.
• E-mail questions or requests for information to
processor.support@analog.com (World wide support)
processor.europe@analog.com (Europe support)
processor.china@analog.com (China support)
• Fax questions or requests for information to
1-781-461-3010 (North America)
+49-89-76903-157 (Europe)
xvi
ADSP-21369 EZ-KIT Lite Evaluation System Manual
Preface
Related Documents
For information on product related development software and hardware,
see these publications:
Table 1. Related Processor Publications
Title
Description
ADSP-21369 SHARC Processor Datasheet
General functional description, pinout, and
timing
ADSP-2136x SHARC Processor Hardware Refer- Description of internal processor architecture,
ence for ADSP-21367/8/9 Processors
registers, and all peripheral functions
ADSP-2136x SHARC Processor Programming
Reference
Description of all allowed processor assembly
instructions
Table 2. Related VisualDSP++ Publications
VisualDSP++ User’s Guide
Detailed description of VisualDSP++ features
and usage
VisualDSP++ Assembler and Preprocessor Manual
Description of the assembler function and
commands
VisualDSP++ C/C++ Complier and Library
Manual for SHARC Processors
Description of the complier function and commands for SHARC processors
VisualDSP++ Linker and Utilities Manual
Description of the linker function and commands
VisualDSP++ Loader Manual
Description of the loader function and commands
ADSP-21369 EZ-KIT Lite Evaluation System Manual
xvii
Product Information
you plan to use the EZ-KIT Lite board in conjunction with a
L IfJTAG
emulator, also refer to the documentation that accompanies
the emulator.
All documentation is available online. Most documentation is available in
printed form.
Visit the Technical Library Web site to access all processor and tools manuals and data sheets:
http://www.analog.com/processors/resources/technicalLibrary.
Online Technical Documentation
Online documentation comprises the VisualDSP++ Help system, software
tools manuals, hardware tools manuals, processor manuals, the Dinkum
Abridged C++ library, and Flexible License Manager (FlexLM) network
license manager software documentation. You can easily search across the
entire VisualDSP++ documentation set for any topic of interest. For easy
printing, supplementary .PDF files of most manuals are provided in the
Docs folder on the VisualDSP++ installation CD.
Each documentation file type is described as follows.
xviii
File
Description
.CHM
Help system files and manuals in Help format
.HTM or
.HTML
Dinkum Abridged C++ library and FlexLM network license manager software documentation. Viewing and printing the .HTML files requires a browser, such as
Internet Explorer 4.0 (or higher).
.PDF
VisualDSP++ and processor manuals in Portable Documentation Format (PDF).
Viewing and printing the .PDF files requires a PDF reader, such as Adobe Acrobat
Reader (4.0 or higher).
ADSP-21369 EZ-KIT Lite Evaluation System Manual
Preface
If documentation is not installed on your system as part of the software
installation, you can add it from the VisualDSP++ CD at any time by running the Tools installation. Access the online documentation from the
VisualDSP++ environment, Windows® Explorer, or the Analog Devices
Web site.
Accessing Documentation From VisualDSP++
To view VisualDSP++ Help, click on the Help menu item or go to the
Windows task bar and navigate to the VisualDSP++ documentation via
the Start menu.
To view ADSP-21369 EZ-KIT Lite Help, which is part of the VisualDSP++ Help system, use the Contents or Search tab of the Help
window.
Accessing Documentation From Windows
In addition to any shortcuts you may have constructed, there are many
ways to open VisualDSP++ online Help or the supplementary documentation from Windows.
Help system files (.CHM) are located in the Help folder, and .PDF files are
located in the Docs folder of your VisualDSP++ installation CD-ROM.
The Docs folder also contains the Dinkum Abridged C++ library and the
FlexLM network license manager software documentation.
Your software installation kit includes online Help as part of the Windows® interface. These help files provide information about
VisualDSP++ and the ADSP-21369 EZ-KIT Lite evaluation system.
Accessing Documentation From Web
Download manuals at the following Web site:
http://www.analog.com/processors/resources/technicalLibrary/manuals.
ADSP-21369 EZ-KIT Lite Evaluation System Manual
xix
Product Information
Select a processor family and book title. Download archive (.ZIP) files, one
for each manual. Use any archive management software, such as WinZip,
to decompress downloaded files.
Printed Manuals
For general questions regarding literature ordering, call the Literature
Center at 1-800-ANALOGD (1-800-262-5643) and follow the prompts.
VisualDSP++ Documentation Set
To purchase VisualDSP++ manuals, call 1-603-883-2430. The manuals
may be purchased only as a kit.
If you do not have an account with Analog Devices, you are referred to
Analog Devices distributors. For information on our distributors, log onto
http://www.analog.com/salesdir/continent.asp.
Hardware Tools Manuals
To purchase EZ-KIT Lite and In-Circuit Emulator (ICE) manuals, call
1-603-883-2430. The manuals may be ordered by title or by product
number located on the back cover of each manual.
Processor Manuals
Hardware reference and instruction set reference manuals may be ordered
through the Literature Center at 1-800-ANALOGD (1-800-262-5643),
or downloaded from the Analog Devices Web site. Manuals may be
ordered by title or by product number located on the back cover of each
manual.
xx
ADSP-21369 EZ-KIT Lite Evaluation System Manual
Preface
Data Sheets
All data sheets (preliminary and production) may be downloaded from the
Analog Devices Web site. Only production (final) data sheets (Rev. 0, A,
B, C, and so on) can be obtained from the Literature Center at
1-800-ANALOGD (1-800-262-5643); they also can be downloaded from
the Web site.
To have a data sheet faxed to you, call the Analog Devices Faxback System
at 1-800-446-6212. Follow the prompts and a list of data sheet code
numbers will be faxed to you. If the data sheet you want is not listed,
check for it on the Web site.
ADSP-21369 EZ-KIT Lite Evaluation System Manual
xxi
Notation Conventions
Notation Conventions
Text conventions used in this manual are identified and described as
follows.
xxii
Example
Description
Close command
(File menu)
Titles in reference sections indicate the location of an item within the
VisualDSP++ environment’s menu system (for example, the Close
command appears on the File menu).
{this | that}
Alternative required items in syntax descriptions appear within curly
brackets and separated by vertical bars; read the example as this or
that. One or the other is required.
[this | that]
Optional items in syntax descriptions appear within brackets and separated by vertical bars; read the example as an optional this or that.
[this,…]
Optional item lists in syntax descriptions appear within brackets
delimited by commas and terminated with an ellipse; read the example
as an optional comma-separated list of this.
.SECTION
Commands, directives, keywords, and feature names are in text with
letter gothic font.
filename
Non-keyword placeholders appear in text with italic style format.
L
Note: For correct operation, ...
A Note provides supplementary information on a related topic. In the
online version of this book, the word Note appears instead of this
symbol.
a
Caution: Incorrect device operation may result if ...
Caution: Device damage may result if ...
A Caution identifies conditions or inappropriate usage of the product
that could lead to undesirable results or product damage. In the online
version of this book, the word Caution appears instead of this symbol.
[
Warning: Injury to device users may result if ...
A Warning identifies conditions or inappropriate usage of the product
that could lead to conditions that are potentially hazardous for the
devices users. In the online version of this book, the word Warning
appears instead of this symbol.
ADSP-21369 EZ-KIT Lite Evaluation System Manual
Preface
conventions, which apply only to specific chapters, may
L Additional
appear throughout this document.
ADSP-21369 EZ-KIT Lite Evaluation System Manual
xxiii
Notation Conventions
xxiv
ADSP-21369 EZ-KIT Lite Evaluation System Manual
1 USING EZ-KIT LITE
This chapter provides specific information to assist you with development
of programs for the ADSP-21369 EZ-KIT Lite evaluation system.
The information appears in the following sections.
• “Package Contents” on page 1-2
Lists the items contained in your ADSP-21369 EZ-KIT Lite
package.
• “Default Configuration” on page 1-3
Shows the default configuration of the ADSP-21369 EZ-KIT Lite.
• “Installation and Session Startup” on page 1-4
Instructs how to start a new or open an existing ADSP-21369
EZ-KIT Lite session using VisualDSP++.
• “Evaluation License Restrictions” on page 1-6
Describes the restrictions of the VisualDSP++ license shipped with
the EZ-KIT Lite.
• “External Memory” on page 1-7
Describes how to access external memory and defines the memory
map of the EZ-KIT Lite.
• “ELVIS Interface” on page 1-8
Describes the on-board National Instruments Educational Laboratory Virtual Instrumentation Suite (NI ELVIS) interface.
ADSP-21369 EZ-KIT Lite Evaluation System Manual
1-1
Package Contents
• “Analog Audio” on page 1-9·
Describes how to set up and communicate with the on-board audio
codec.
• “LEDs and Push Buttons” on page 1-10
Describes the board’s general-purpose IO pins and buttons.
• “Example Programs” on page 1-12
Provides information about the example programs included in the
ADSP-21369 EZ-KIT Lite evaluation system.
• “Background Telemetry Channel” on page 1-12
Highlights the advantages of the Background Telemetry Channel
feature of VisualDSP++.
For information on the graphical user interface, including the boot loading, target options, and other facilities of the EZ-KIT Lite system, refer to
the online Help.
For detailed information on how to program the ADSP-21369 SHARC
processor, refer to the documents referenced in “Related Documents” on
page xvii.
Package Contents
Your ADSP-21369 EZ-KIT Lite evaluation system package contains the
following items.
• ADSP-21369 EZ-KIT Lite board
• VisualDSP++ Installation Quick Reference Card
• CD containing:
1-2
D
VisualDSP++ software
D
ADSP-21369 EZ-KIT Lite debug software
ADSP-21369 EZ-KIT Lite Evaluation System Manual
Using EZ-KIT Lite
D
USB driver files
D
Example programs
D
ADSP-21369 EZ-KIT Lite Evaluation System Manual (this
document)
• Universal 7V DC power supply
• USB 2.0 cable
• 3.5 mm stereo headphones
• 6-foot RCA audio cable
• 6-foot 3.5 mm/RCA x 2 Y-cable
• Registration card (please fill out and return)
If any item is missing, contact the vendor where you purchased your
EZ-KIT Lite or contact Analog Devices, Inc.
Default Configuration
The EZ-KIT Lite evaluation system contains ESD
(electrostatic discharge) sensitive devices. Electrostatic
charges readily accumulate on the human body and
equipment and can discharge without detection. Permanent damage may occur on devices subjected to
high-energy discharges. Proper ESD precautions are
recommended to avoid performance degradation or
loss of functionality. Store unused EZ-KIT Lite boards
in the protective shipping package.
The ADSP-21369 EZ-KIT Lite board is designed to run outside your personal computer as a stand-alone unit. You do not have to open your
computer case.
ADSP-21369 EZ-KIT Lite Evaluation System Manual
1-3
Installation and Session Startup
When removing the EZ-KIT Lite board from the package, handle the
board carefully to avoid the discharge of static electricity, which may damage some components.
To connect the EZ-KIT Lite board:
1. Remove the EZ-KIT Lite board from the package. Be careful when
handling the board to avoid the discharge of static electricity,
which may damage some components.
2. Figure 1-1 shows the default jumper settings, DIP switch, connector locations, and LEDs used in installation. Confirm that your
board is set up in the default configuration before continuing.
3. Plug the provided power supply into J4 on the EZ-KIT Lite board.
Visually verify that the green power LED (LED9) is on. Also verify
that the two red reset LEDs (LED10 and LED12) go on for a moment
and then go off, and, finally, LED1 through LED8 are sequentially
blinking.
4. Connect one end of the USB cable to an available full speed USB
port on your PC and the other end to P5 on the ADSP-21369
EZ-KIT Lite board.
Installation and Session Startup
correct operation, install the software and hardware in the
L For
order presented in the VisualDSP++ Installation Quick Reference
Card.
1-4
ADSP-21369 EZ-KIT Lite Evaluation System Manual
Using EZ-KIT Lite
Figure 1-1. EZ-KIT Lite Hardware Setup
To start up an EZ-KIT Lite session in VisualDSP++:
1. Verify that the yellow USB monitor LED (LED11, located near the
USB connector) is lit. This signifies that the board is communicating properly with the host PC and is ready to run VisualDSP++.
2. From the Start menu, navigate to the VisualDSP++ environment
via the Programs menu.
If you are running VisualDSP++ for the first time, the New Session
ADSP-21369 EZ-KIT Lite Evaluation System Manual
1-5
Evaluation License Restrictions
dialog box appears on the screen (skip the rest of the procedure and
go to step 3).
If you have run VisualDSP++ previously, the last opened session
appears on the screen.
To switch to another session, via the Session List dialog box, hold
down the Ctrl key while starting VisualDSP++ (go to step 5).
3. In Debug target, select SHARC Emulators/EZKIT Lites.
In Platform, select ADSP-21369 EZ-KIT Lite via Debug Agent.
In Processor, choose the appropriate processor, ADSP-21369.
In Session name, type a new name or accept the default.
4. Click OK to return to the Session List.
5. Highlight the session and click Activate.
Evaluation License Restrictions
The ADSP-21369 EZ-KIT Lite installation is part of the VisualDSP++
installation. The EZ-KIT Lite is a licensed product that offers an unrestricted evaluation license for the first 90 days. Once the initial
unrestricted 90-day evaluation license expires:
1. VisualDSP++ allows a connection to the ADSP-21369 EZ-KIT
Lite via the USB Debug Agent interface only. Connections to simulators and emulation products are no longer allowed.
2. The linker restricts a users program to 10922 words of internal
memory for code space with no restrictions for data space.
Refer to the VisualDSP++ Installation Quick Reference Card for details.
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Using EZ-KIT Lite
External Memory
The EZ-KIT Lite contains four types of memory: parallel flash (1 MB),
SPI flash (2 Mbit), SRAM (512 Kbit), and SDRAM (128 Mbit). The
flash memories can store user-specific boot code, allowing the board run
as a stand-alone unit. For more information about selecting the boot
device for the processor, see “Boot Mode and Clock Ratio Select Switch
(SW2)” on page 2-8.
Table 1-1 provides start and end addresses of the board’s external
memories.
Table 1-1. EZ-KIT Lite Evaluation Board External Memory
Start Address
End Address
Content
0x0020 0000
0x0027 FFFF
SRAM memory (~MS0)
0x0400 0000
0x040F FFFF
Flash memory (~MS1)
0x0800 0000
0x08FF 0000
SDRAM memory (~MS2)
0x0C00 0000
0x0C00 0000
0x0CFF FFFF
0x0FFF FFFF
Unused chip select (~MS3), for non-SDRAM addresses
Unused chip select (~MS3), for SDRAM addresses
The parallel flash memory, SDRAM, and SRAM memory connect to the
external memory of the processor. To access the SRAM and flash memories, use memory addressing via the respective memory bank or use the
DMA controller.
The SDRAM memory connects to the SDRAM controller of the processor. A set of programmable timing parameters is available to configure the
SDRAM banks to support slower memory accesses. Care must be taken
when configuring the SDRAM control registers. For more information
regarding the setup of the SDRAM controller, please refer to the
ADSP-2136x SHARC Processor Hardware Reference for ADSP-21367/8/9
Processors. An example program is included in the EZ-KIT Lite installation directory to demonstrate how to set up the SDRAM interface.
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1-7
ELVIS Interface
The SPI flash memory connects to the SPI port of the processor and
designates:
•
DPI pin 5 (DPI5) as a chip select
•
DPI pin 3 (DPI3) as the SPI clock
•
DPI pin 1 (DPI1) as the MOSI
•
DPI pin 2 (DPI2) as the MISO.
By default, the DPI is setup for the SPI flash, and any required changes to
the SPI flash can be made by modifying the DPI of the processor. An
example program is included in the EZ-KIT Lite installation directory to
demonstrate how to read and write to the SPI flash memory.
The asynchronous SRAM memory and the parallel flash memory connect
to the asynchronous memory controller of the processor. Each of their
respective memory banks can be independently programmed with different timing parameters. For more information on changing wait states to
speed up or slow down the asynchronous controller and other setup information, refer to the ADSP-2136x SHARC Processor Hardware Reference for
ADSP-21367/8/9 Processors. Example programs are included in the
EZ-KIT Lite installation directory to demonstrate how to read and write
to the SRAM or flash memory.
ELVIS Interface
The ADSP-21369 EZ-KIT Lite board contains the National Instruments
Educational Laboratory Virtual Instrumentation Suite interface. The
interface features the DC voltage and current measurement modules,
oscilloscope and bode analyzer modules, function generator, arbitrary
waveform generator, and digital IO.
1-8
ADSP-21369 EZ-KIT Lite Evaluation System Manual
Using EZ-KIT Lite
The ELVIS interface is a LabVIEW-based design and prototype environment for university science and engineering laboratories. The ELVIS
interface consists of LabVIEW-based virtual instruments, a multifunction
data acquisition (DAQ) device, and a custom-designed bench-top workstation and prototype board. This combination provides a ready-to-use
suite of instruments found in most educational laboratories. Because the
interface is based on LabVIEW and provides complete data acquisition
and prototyping capabilities, the system is ideal for academic coursework
that range from lower-division classes to advanced project-based
curriculums.
For more information on ELVIS and example demonstration programs,
visit National Instruments Web site at www.ni.com.
Analog Audio
The AD1835A is a high-performance, single-chip codec featuring four stereo digital-to-analog converters (DAC) for audio output and one stereo
analog-to-digital converters (ADC) for audio input. The codec can input
and output data with a sample rate of up to 96 kHz on all channels. A
192 kHz sample rate can be used with the one of the DAC channels.
The processor is interfaced with the AD1835A via the DAI port. The DAI
interface pins can be configured to transfer serial data from the AD1835A
codec in either time-division multiplexed (TDM) or two-wire interface
mode (TWI). For more information on the AD1835A connection to the
DAI, see “DAI Interface” on page 2-4.
The master input clock (MCLK) for the AD1835A can be generated by the
on-board 12.288 MHz oscillator or can be supplied by one of the DAI
pins of the processor. Using one of the pins to generate the MCLK, as
opposed to the on-board oscillator, allows synchronization of multiple
devices in the system. This is done on the EZ-KIT Lite when data is coming from the SPDIF receiver and being output through the audio codec.
The SPDIF MCLK is routed to the AD1835A MCLK in the processor’s signal
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1-9
LEDs and Push Buttons
routing unit (SRU). It is also necessary to disable the on-board audio
oscillator from driving the audio codec and the processor’s input pin. For
instructions on how to configure the clock, refer to “Codec Setup Switch
(SW3)” on page 2-10.
The AD1835A codec can be configured as a master or as a slave, depending on the DIP switch settings. In master mode, the AD1835A drives the
serial port clock and frame sync signals to the processor. In slave mode,
the processor must generate and drive all of the serial port clock and frame
sync signals. For information on how to set the mode, refer to “Codec
Setup Switch (SW3)” on page 2-10.
The AD1835A audio codec’s internal configuration registers are configured using the SPI port of the processor. The DPI pin 4 (DPI4 register) is
used as the select for the device. For information on how to configure the
multichannel codec, refer to the codec’s datasheet, which can be found at
http://www.analog.com/en/prod/0,2877,AD1835A,00.html.
The RCA connector (P10) is used to input analog audio. When using an
electret microphone on this connector, configure the SW4 switch according
the instructions in “Electret Microphone Select Switch (SW4)” on
page 2-11. The four output channels connect to the RCA connector J5.
Channel 4 of the codec connects to the headphone jack P7. For more
information about the connectors see “Connectors” on page 2-20.
Example programs are included in the EZ-KIT Lite installation directory
to demonstrate how to configure and use the board’s analog audio
interface.
LEDs and Push Buttons
The EZ-KIT Lite has eight general-purpose user LEDs and four general-purpose push buttons.
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Using EZ-KIT Lite
Two of the general-purpose push buttons are attached to the FLAG pins of
the processor, while the other two are attached to the DAI pins. All of the
push buttons connect to the processor through a DIP switch. The DIP
switch allows processor pins, which connect to the push buttons, to be disconnected. See “Push Button Enable Switch (SW7)” on page 2-12 for
instructions on how to disable the push buttons from driving the corresponding processor pin.
The state of the push buttons, connected to the FLAG pins, can be determined by reading the FLAG register. The push buttons connected to the
DAI pins must be configured as interrupts. It is necessary to set up an
interrupt routine to determine each pin’s state. Table 1-2 shows how each
push button connects to the processor. Refer to the related example program shipped with the EZ-KIT Lite for more information.
Table 1-2. Push Button Connections
Push Button Label
Push Button Reference Designator
Processor Pin
PB1
SW8
FLAG1/~IRQ1
PB2
SW11
FLAG0/~IRQ0
PB3
SW10
DAI19
PB4
SW9
DAI20
Table 1-3 summarizes the LED connections to the processor. In order to
use the LEDs connected to the DAI or DPI, the respective registers inside
the processor must be correctly configured. For more information on how
to program the pins, refer to the ADSP-2136x SHARC Processor Hardware
Reference for ADSP-21367/8/9 Processors.
example program is included in the EZ-KIT Lite installation
L Andirectory
to demonstrate the functionality of the LEDs and push
buttons.
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1-11
Example Programs
Table 1-3. LED Connections
LED Reference Designator
Processor Pin
LED1
DPI6
LED2
DPI7
LED3
DPI8
LED4
DPI13
LED5
DPI14
LED6
DAI15
LED7
DAI16
LED8
FLAG3/~MS3/~IRQ3
Example Programs
Example programs are provided with the ADSP-21369 EZ-KIT Lite to
demonstrate various capabilities of the evaluation board. These programs
are installed with the EZ-KIT Lite software and can be found in the
\…\213xx\EZ-KITs\ADSP-21369\Examples subdirectory of the VisualDSP++ installation directory. Please refer to the readme file provided
with each example for more information.
Background Telemetry Channel
The ADSP-21369 USB debug agent supports the background telemetry
channel (BTC), which facilitates data exchange between VisualDSP++ and
the processor without interrupting processor execution.
The BTC allows the user to view a variable as it is updated or changed, all
while the processor continues to execute. For increased performance of the
BTC, including faster reading and writing, please check out our latest line
of processor emulators at http://www.analog.com/proces-
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ADSP-21369 EZ-KIT Lite Evaluation System Manual
Using EZ-KIT Lite
sors/resources/crosscore/emulators/index.html.
For more
information about the background telemetry channel, see the VisualDSP++ User’s Guide or online Help.
ADSP-21369 EZ-KIT Lite Evaluation System Manual
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Background Telemetry Channel
1-14
ADSP-21369 EZ-KIT Lite Evaluation System Manual
2 EZ-KIT LITE HARDWARE
REFERENCE
This chapter describes the hardware design of the ADSP-21369 EZ-KIT
Lite board. The following topics are covered.
• “System Architecture” on page 2-2
Describes the configuration of the ADSP-21369 board and
explains how the board components interface with the processor.
• “Switch Settings” on page 2-8
Shows the location and describes the function of the board
switches.
• “LEDs and Push Buttons” on page 2-14
Shows the location and describes the function of the board LEDs
and push buttons.
• “Jumpers” on page 2-17
Shows the location and describes the function of the board
jumpers.
• “Connectors” on page 2-20
Shows the location and gives the part number for all of the connectors on the board. Also, the manufacturer and part number
information is given for the mating parts.
ADSP-21369 EZ-KIT Lite Evaluation System Manual
2-1
System Architecture
System Architecture
This section describes the processor’s configuration on the EZ-KIT Lite
board (Figure 2-1).
4M x 32
SDRAM
1M x 8
Flash
External
Port
JTAG Port
JTAG
Header
512k x 8
SRAM
ADSP-21369
DSP
24.576 MHz
Oscillator
Expansion
Connectors
Type A
Reset PB
DPI
Conn
+7.0V
Connector
RS
232
Conn
FLAGs
0,1, and 3
DPI
DAI
SPDIF In
Phono
ADM3202
SPDIF Out
Phono
AD1835
CODEC
5
DAI
Conn
1
A5V 3.3V 1.3V
Power Regulation
2
LEDs
(8)
SPI FLASH
ELVIS
Conn
2
2
PBs (4)
Stereo In RCA
Jacks (2x1)
Stereo Out RCA
Jacks (4x2)
Headphone
Jack
Figure 2-1. System Architecture Block Diagram
The EZ-KIT Lite has been designed to demonstrate the capabilities of the
ADSP-21369 processor. The processor core is powered at 1.3V, and the
IO is powered at 3.3V.
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EZ-KIT Lite Hardware Reference
The CLKIN pin of the processor connects to a 24.576 MHz oscillator. The
core frequency of the processor is derived by multiplying the frequency at
the CLKIN pin by a value determined by the state of the processor pins
CLKCFG1 and CLKCFG0. The value at these pins is determined by the state of
the SW2 switch (see “Boot Mode and Clock Ratio Select Switch (SW2)” on
page 2-8). By default, the EZ-KIT Lite gives a core frequency of
393.216 MHz. It is possible to change the speed of the processor by
changing the value of the PMCTL register.
The SW2 switch also configures the boot mode of the processor. The
EZ-KIT Lite is capable of EPROM/flash boot and SPI boot. By default,
the EZ-KIT Lite boots from the flash memory. For information about
configuring the boot modes, see “Boot Mode and Clock Ratio Select
Switch (SW2)” on page 2-8.
External Port
The external port of the ADSP-21369 processor consists of a 24-bit
address bus, 32-bit data memory bus, and control lines. The control lines
are used to select, read, and write to external memory devices.
The external port connects to an 8-bit parallel flash memory, an 8-bit
SRAM memory, and a 32-bit SDRAM memory. See “External Memory”
on page 1-7 for more information about accessing the flash and SDRAM
memories.
All of the external port signals are available externally via the expansion
interface connectors (J3–1). The pinout of the connectors can be found in
“Schematics” on page B-1.
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2-3
System Architecture
DAI Interface
The pins of the digital application interface (DAI) connect to the signal
routing unit (SRU). The SRU is a flexible routing system, providing a
large system of signal flows within the processor. In general, the SRU
allows to route the DAI pins to different internal peripherals in various
combinations.
The DAI pins connect to the AD1835A audio codec, a 26-pin header, two
RCA connectors, the audio oscillator output, an external phase lock loop
(PLL) circuit, two LEDs, and two push buttons. Figure 2-2 illustrates the
EZ-KIT Lite’s connections to the DAI.
DAI20 (SFS45)
PB_4
DAI19 (SCLK45)
DAI18 (SD5B)
PB_3
DAI17 (SD5A)
DAI16 (SD4B)
DAI15 (SD4A)
SPDIF IN
AUDIO OSC
LED7
LED6
DAC_LRCLK
DAC1
DAC_BCLK
DAC2
DAI14 (SFS23)
DAI13 (SCLK23)
DAC_SDATA1
DAC_SDATA2
DAC3
DAC4
DAI12 (SD3B)
DAC_SDATA3
DAC_SDATA4
DAI11 (SD3A)
DAI10 (SD2B)
DAI8 (SFS1)
DAI7 (SCLK1)
ADC_LRCLK
ADC_BCLK
DAI5 (SD1A)
DAI6 (SD1B)
DAI4 (SFS0)
DAI3 (SCLK0)
DAI2 (SD0B)
DAI1 (SD0A)
Headphone
Jack
AD1835
DAI9 (SD2A)
ADC_SDATA1
ELVIS_TRIG
PLLMCLK IN
PLLMCLK OUT
SPDIF OUT
4x2
RCA
Phono
Jack
OUT
ADC
1X2
RCA
Phono
Jack IN
MCLK
DAIP17
12.288MHz
DSP
Figure 2-2. DAI Connections Block Diagram
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EZ-KIT Lite Hardware Reference
To use the DAI for a different purpose, disable any signal driving the DAI
pins with a switch (see “Codec Setup Switch (SW3)” on page 2-10). In
addition, the SW3 switch allows flexible routing of the 12.288 MHz audio
oscillator’s output signal. By default, this signal is used as the master clock
(MCLK) for the AD1835A codec.
All of the DAI signals are available externally via the expansion interface
connectors (J3–1), as well as the 0.1” spaced header P4. The pinout of
these connectors can be found in “Schematics” on page B-1.
DPI Interface
The pins of the digital peripheral interface (DPI) connect to a second signal routing unit (SRU2). The SRU2 unit, similar to the SRU, is a flexible
routing system, providing a large system of signal flows within the processor. In general, the SRU2 allows to route the DPI pins to different internal
peripherals in various combinations.
ADSP-21369
T2IN
R2OUT
ADM3202
R1OUT
DPI12 (UART CTS)
T1IN
DPI11 (UART RTS)
T2OUT
R2IN
R1IN
T1OUT
DB-9
Conn
DPI10 (UART RX)
DPI9 (UART TX)
DPI14 (LED5)
LED5
DPI13 (LED4)
DPI8 (LED3)
LED4
LED3
DPI7 (LED2)
LED2
DPI6 (LED1)
DPI5 (SPI_FLASHCS)
LED1
DPI4 (SPI_AD1835CS)
DPI3 (SPICLK)
DPI2 (MISO)
DPI1 (MOSI)
CS/
SCK
SO
SPI
FLASH
SI
CLATCH
CCLK
COUT
AD1835
CIN
Figure 2-3. DPI Connections Block Diagram
ADSP-21369 EZ-KIT Lite Evaluation System Manual
2-5
System Architecture
Figure 2-3 illustrates the EZ-KIT Lite’s connections to the DPI. The DPI
pins connect to the SPI flash memory, the SPI interface of the AD1835A
codec, a UART, a 20-pin header, and five LEDs.
To use the DPI for a different purpose, disable any signal driving the DPI
pins with a switch (see “UART Enable Switch (SW5)” on page 2-11). Any
DPI pin connected to an LED can be used without having to disconnect
the pin. You can, however, see the respective LED turn ON and OFF when
using the signal for other purposes.
All of the DPI signals are available externally via the expansion interface
connectors (J3–1), as well as the 0.1” spaced header P3. The pinout of
these connectors can be found in “Schematics” on page B-1.
FLAG Pins
The processor has four general-purpose IO flag pins. Table 2-1 describes
the flag connections.
Table 2-1. IO FLAG Pins
FLAG Pin
EZ-KIT Lite Function
FLAG0
Push button (SW2) input
FLAG1
Push button (SW2) input
FLAG2
SDRAM chip select
FLAG3
LED8
For information on how to disable the push buttons from driving the corresponding processor flag pin, see “Push Button Enable Switch (SW7)” on
page 2-12.
The FLAG signals are available externally via the expansion interface connectors (J3–1). The pinout of these connectors can be found in
“Schematics” on page B-1.
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EZ-KIT Lite Hardware Reference
External PLL
The ADSP-21369 EZ-KIT Lite contains an external phase lock loop to
help generate a faster and more stable master input clock MCLK. The PLL
uses DAI pin 3 as an input clock from the ADSP-21369 processor. The
new clock generated by PLL connects to the processor via DAI pin 2.
Example programs are included in the EZ-KIT Lite installation directory
to demonstrate how to configure and use the board’s external PLL.
Expansion Interface
The expansion interface consists of the three 90-pin connectors. Table 2-2
shows the interfaces each connector provides. For the exact pinout of these
connectors, refer to “Schematics” on page B-1. The mechanical dimensions of the connectors can be obtained from Technical or Customer
Support.
Table 2-2. Expansion Interface Connectors
Connector
Interfaces
J1
5V, ADDR[23–0], DATA[31–0]
J2
3.3V, FLAG[3–0], DAIP[20–1], DPI[14–1], SDRAM control signals
J3
5V, 3.3V, reset, parallel port control signals
Limits to the current and to the interface speed must be taken into consideration when using the expansion interface. The maximum current limit is
dependent on the capabilities of the used regulator. Additional circuitry
can also add extra loading to signals, decreasing their maximum effective
speed.
Devices does not support and is not responsible for the
[ Analog
effects of additional circuitry.
ADSP-21369 EZ-KIT Lite Evaluation System Manual
2-7
Switch Settings
JTAG Emulation Port
The JTAG emulation port allows an emulator to access the internal and
external memory of the processor through a 6-pin interface. The JTAG
emulation port of the processor also connects to the USB debugging interface. When an emulator connects to the board at P2, the USB debugging
interface is disabled. This is not the standard connection of the JTAG
interface.
For information about the standard connection of the interface, see EE-68
published on the Analog Devices Web site. For more information about
the JTAG connector, see “JTAG Header (P2)” on page 2-25. To learn
more about available emulators, go to Analog Devices Web site:
http://www.analog.com/processors/resources/crosscore/emulators/index.html.
Switch Settings
This section describes the function of the EZ-KIT Lite switches.
Figure 2-4 shows the switch locations and default settings.
Boot Mode and Clock Ratio Select Switch (SW2)
The SW2 switch sets the boot mode and clock multiplier ratio. Table 2-3
shows how to set up the boot mode using positions 1 and 2. By default,
the EZ-KIT Lite boots in external port mode from flash memory.
Table 2-4 shows how to set up the clock multiply ratio using positions 3
and 4. By default, the processor increases the clock multiply ratio by sixteen, setting the core clock to 393.216 MHz.
2-8
ADSP-21369 EZ-KIT Lite Evaluation System Manual
EZ-KIT Lite Hardware Reference
Figure 2-4. Switch Locations and Default Settings
Table 2-3. Boot Mode Configuration Switch (SW2)
BOOTCFG1 Pin (Position 1)
BOOTCFG0 Pin (Position 2)
Boot Mode
ON
ON
SPI Slave Boot
ON
OFF
Flash Boot1
OFF
ON
SPI Master Boot
OFF
OFF
Reserved
1
Bold typeface denotes the default setting.
ADSP-21369 EZ-KIT Lite Evaluation System Manual
2-9
Switch Settings
Table 2-4. Core Clock Rate Configuration
CLKCFG1 (Position 3)
CLKCFG0 (Position 4)
Core to CLKIN Ratio
ON
ON
6:1
ON
OFF
16:11
OFF
ON
32:1
OFF
OFF
Reserved
1
Bold typeface denotes the default ratio.
The core clock frequency can be increased or decreased via software by
writing to the PMCTL register. For more information on changing core
clock frequency and other setup information, refer to the ADSP-2136x
SHARC Processor Hardware Reference for ADSP-21367/8/9 Processors.
Codec Setup Switch (SW3)
The codec setup switch (SW3) can be used to change the routing of some of
the signals going to the AD1835A codec and to setup the communication
protocol of the codec.
Positions 1 and 2 determine the clock routing for the audio oscillator to
the codec and to the processor. Figure 2-5 illustrates how the switch
positions 1 and 2 connect on the board. In the default position, route the
DAI_P17 pin to DAI_P6 (in software) to clock the AD1835A.
Position 3 of the SW3 switch determines if the AD1835A device is a master
or is a slave. If the AD1835A is a master, the device’s serial interface generates the frame sync and clock signals necessary to transfer data. When
the device is a slave, the processor must generate the frame sync and clock
signals. By default, position 3 is ON, and the AD1835A generates the control signals.
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EZ-KIT Lite Hardware Reference
ADSP-21369 Processor
AD1835A Codec
DAI_P6
MCLK
DAI_P17
12.288MHz
OSC
SW3.1
SW3.2
Figure 2-5. Audio Clock Routing
Position 4 of SW3 disconnects the AD1835A’s ADC_DATA pin from the DAI
interface. This is useful when the DAI interface connects to another
device.
Electret Microphone Select Switch (SW4)
To connect an electret microphone to the audio input, place all positions
of the SW4 switch ON. The default position of the switch is all OFF. When all
of the positions are in the ON position, a DC offset of 2.5V is added to the
signal, and gain of the input amplifiers is changed from 1x to 10x.
UART Enable Switch (SW5)
The UART enable switch (SW5) disconnects UART signals from the DPI
pins of the processor. When the switch is in the OFF position, the associated DPI signal (see Table 2-5) can be used on the expansion interface.
ADSP-21369 EZ-KIT Lite Evaluation System Manual
2-11
Switch Settings
Table 2-5. UART Enable Switch (SW5)
Switch Position
EZ-KIT Lite Signal
Processor Signal
1 (OFF1)
CTS
DPI12
2 (ON)
RX
DPI10
3 (OFF)
RTS
DP11
4 (ON)
T2IN
1
tied to R2OUT
N/A
Bold typeface denotes the default setting.
Loop-Back Test Switches (SW6 and SW14)
The loop-back test switch SW6 is located at the top left side of the board.
The second loop-back test switch, SW14, is located at the top right side of
the board. These switches are used only for testing; all switch positions
should be OFF.
Push Button Enable Switch (SW7)
The push button enable switch (SW7) disconnects the push buttons from
the corresponding processor pins. This allows the signals to be used for
another purpose. Table 2-6 shows the SW7 connections. By default, all
position of the SW7 switch are ON, allowing the push buttons to function as
designed.
Table 2-6. Push Button Enable Switch (SW7)
Switch Position
Push Button Label
Push Button Reference Designator
Processor Pin
1
PB1
SW8
FLAG1/~IRQ
2
PB2
SW11
FLAG0/~IRQ0
3
PB3
SW10
DAI19
4
PB4
SW9
DAI20
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EZ-KIT Lite Hardware Reference
ELVIS Oscilloscope Configuration Switch (SW1)
The oscilloscope configuration switch (SW1) determines which audio circuit signals connect to channels A and B of the oscilloscope. The switch is
used only when the board connects to the Educational Laboratory Virtual
Instrumentation Suite (ELVIS) station (see “ELVIS Interface” on
page 1-8). Each channel must have only one signal selected at a time, as
described in Table 2-7.
Table 2-7. Oscilloscope Configuration Switch (SW1)
Channel
Switch Position
Audio Circuit Signal
A
1 (OFF1)
AMP_LEFT_IN
A
2 (OFF)
AMP_RIGHT_IN
A
3 (OFF)
LEFT_OUT
A
4 (OFF)
RIGHT_OUT
B
5 (OFF)
AMP_LEFT_IN
B
6 (OFF)
AMP_RIGHT_IN
B
7 (OFF)
LEFT_OUT
B
8 (OFF)
RIGHT_OUT
1
Bold typeface denotes the default settings.
ELVIS Function Generator Configuration Switch
(SW13)
The function generator configuration switch (SW13) controls which signals
connect to the left and right input signals of the audio interface. The SW13
switch is used only when the board connects to the ELVIS station (see
“ELVIS Interface” on page 1-8). Each channel must have only one signal
selected at a time, as described in Table 2-8.
ADSP-21369 EZ-KIT Lite Evaluation System Manual
2-13
LEDs and Push Buttons
Table 2-8. ELVIS Function Generator Configuration Switch (SW13)
Channel
Switch Position
Audio Signal
AMP_LEFT_IN
1 (ON1)
LEFT_IN
AMP_RIGHT_IN
2 (ON)
RIGHT_IN
AMP_LEFT_IN
3 (OFF)
DAC0
AMP_RIGHT_IN
4 (OFF)
DAC1
AMP_LEFT_IN
5 (OFF)
FUNCT_OUT
AMP_RIGHT_IN
6 (OFF)
FUNCT_OUT
1
Bold typeface denotes the default settings.
LEDs and Push Buttons
This section describes the functionality of the LEDs and push buttons.
Figure 2-6 shows the LED and push button locations.
General Purpose LEDs (LED1–8)
There are eight general-purpose LEDs on the board. Five LEDs connect to
the DPI interface, two LEDs connect to the DAI interface, and one LED
connects to FLAG3 of the processor. “LEDs and Push Buttons” on
page 1-10 summarizes the LED connections. In order to use the LEDs
connected to the DAI or DPI, the respective registers inside the processor
must be correctly configured. For more information on how to program
the pins, refer to the ADSP-2136x SHARC Processor Hardware Reference
for ADSP-21367/8/9 Processors.
Power LED (LED9)
When LED9 is lit (green), it indicates that power is being properly supplied
to the board.
2-14
ADSP-21369 EZ-KIT Lite Evaluation System Manual
EZ-KIT Lite Hardware Reference
Figure 2-6. LED and Push Button Locations
Reset LEDs (LED10 and LED12)
When LED10 is lit (red), the master reset of all the major ICs is active.
When LED12 is lit (red), the USB interface chip (U4) is being reset. The
USB chip is reset only on power-up, or if USB communication has not
been initialized.
ADSP-21369 EZ-KIT Lite Evaluation System Manual
2-15
LEDs and Push Buttons
USB Monitor LED (LED11)
The USB monitor LED (LED11) indicates that USB communication has
been initialized successfully, and you can connect to the processor using a
VisualDSP++ EZ-KIT Lite session. Once the USB cable is plugged into
the board, it takes approximately 15 seconds for the USB monitor LED to
light. If the LED does not light, try cycling power on the board and/or
reinstalling the USB driver (see the VisualDSP++ Installation Quick Reference Card).
VisualDSP++ is actively communicating with the EZ-KIT
L When
Lite target board, the LED can flicker, indicating communications
handshake.
Push Buttons (SW8–11)
Four push buttons (SW8–11) are provided for general-purpose user input.
Two of the push buttons connect to the FLAG pins of the processor. The
other two connect to the DAI of the processor. The push buttons are
active HIGH and, when pressed, send a High (1) to the processor. Refer to
“LEDs and Push Buttons” on page 1-10 for more information. The push
button enable switch (SW7) is capable of disconnecting the push buttons
from the corresponding processor pin (refer to “Push Button Enable
Switch (SW7)” on page 2-12 for more information).
The push buttons and corresponding processor signals summarized in
Table 2-9.
Table 2-9. Push Button Connections
Push Button Label
Push Button Reference Designator
Processor Pin
PB1
SW8
FLAG1/~IRQ
PB2
SW11
FLAG0/~IRQ0
2-16
ADSP-21369 EZ-KIT Lite Evaluation System Manual
EZ-KIT Lite Hardware Reference
Table 2-9. Push Button Connections (Cont’d)
Push Button Label
Push Button Reference Designator
Processor Pin
PB3
SW10
DAI19
PB4
SW9
DAI20
Board Reset Push Button (SW12)
The RESET push button (SW12) resets all of the ICs on the board. The only
exception is the USB interface chip (U4). The chip is not being reset when
the push button is pressed after the USB cable has been plugged in and
communication correctly initialized with the PC. After USB communication has been initialized, the only way to reset the USB is by powering
down the board.
Jumpers
Figure 2-7 shows the locations and default settings of the EZ-KIT Lite
jumpers.
VCO Select Jumper (JP1)
The voltage controlled oscillator (VCO) select jumper (JP1) configures
the frequency selection of the on-board external PLL (U39). When JP1 is
installed, the VCO output frequency is multiplied by a factor of 1.0. Conversely, when uninstalled, the VCO output frequency is multiplied by a
factor of 0.5 or divided in half. The jumper settings are shown in
Table 2-10.
ADSP-21369 EZ-KIT Lite Evaluation System Manual
2-17
Jumpers
Figure 2-7. Jumper Locations
Table 2-10. VCO Select Jumper (JP1)
JP1 Setting
Mode
OFF
VCO Output frequency x ½ (default)
ON
VCO output frequency x 1.0
2-18
ADSP-21369 EZ-KIT Lite Evaluation System Manual
EZ-KIT Lite Hardware Reference
ELVIS Select Jumper (JP2)
The ELVIS select jumper (JP2) configures the EZ-KIT Lite’s connection
to an ELVIS station (see “ELVIS Interface” on page 1-8). When JP2 is
installed, the connections to the push buttons and LED are re-directed to
the ELVIS station, instead of the processor. The jumper settings are
shown in Table 2-11.
Table 2-11. ELVIS Select Jumper (JP2)
JP2 Setting
Mode
OFF
Not connected to ELVIS (default)
ON
Connected to ELVIS
ELVIS Voltage Selection Jumper (JP3)
The ELVIS voltage selection jumper (JP3) is used to select the power
source for the EZ-KIT Lite. In a standard mode of operation, the board
receives its power from an external power supply. When JP3 is installed,
the board is powered from an ELVIS station and no external power supply
is required. The jumper settings are shown in Table 2-12.
Table 2-12. ELVIS Voltage Selection Jumper (JP3)
JP3 Setting
Mode
OFF
Powered from an external power supply (default)
ON
Powered from ELVIS
external power supply must be disconnected from the board
[ The
when
is installed. In this case, the power supply may cause
JP3
damage to the EZ-KIT Lite board and ELVIS unit.
ADSP-21369 EZ-KIT Lite Evaluation System Manual
2-19
Connectors
ELVIS Programmable Flag Jumper (JP4)
The ELVIS programmable flag jumper (JP4) connects the ADSP-21369
processor’s DAI4 pin to the ELVIS trigger pin. When JP4 is installed, DAI4
is directly connected to the ELVIS TRIG1_2 pin. Conversely, when JP4 is
uninstalled, the DAIP4 pin is disconnected and can be used for other
non-ELVIS functionality. The jumper settings are shown in Table 2-13.
Table 2-13. ELVIS Select Jumper (JP4)
JP4 Setting
Mode
OFF
DAI4 disconnected from ELVIS TRIG pin (default)
ON
DAI4 connected to ELVIS TRIG pin
Connectors
This section describes the connector functionality and provides information about mating connectors. Figure 2-8 shows the connector locations.
Expansion Interface Connectors (J1–J3)
Three board-to-board connectors (J1–3) provide signals for most of the
processor’s peripheral interfaces. The connectors are located at the bottom
of the board. For more information about the expansion interface, see
“Expansion Interface” on page 2-7. For the J1–3 connectors’ availability
and pricing, contact Samtec.
2-20
ADSP-21369 EZ-KIT Lite Evaluation System Manual
EZ-KIT Lite Hardware Reference
Figure 2-8. Connector Locations
Part Description
Manufacturer
Part Number
90 Position 0.05" Spacing,
SMT
Samtec
SFC-145-T2-F-D-A
Mating Connector
90 Position 0.05” Spacing
(Through Hole)
Samtec
TFM-145-x1 Series
ADSP-21369 EZ-KIT Lite Evaluation System Manual
2-21
Connectors
Part Description
Manufacturer
Part Number
90 Position 0.05” Spacing
(Surface Mount)
Samtec
TFM-145-x2 Series
90 Position 0.05” Spacing
(Low Cost)
Samtec
TFC-145 Series
Audio In RCA Connector (P10)
Part Description
Manufacturer
Part Number
Two channel right angle RCA jack
Switchcraft
PJRAS1X2S02
Mating Cable
Two channel RCA interconnect cable Monster Cable
BI100-1M
Audio Out RCA Connector (J5)
Part Description
Manufacturer
Part Number
Six channel right angle RCA jack
Switchcraft
PJRAS2X2S01
Mating Cable
Two channel RCA interconnect cable Monster Cable
BI100-1M
Headphone Out Jack (P7)
Part Description
Manufacturer
Part Number
3.5mm stereo jack
Shogyo
SJ-0359AM-5
Power Jack (J4)
The power connector (J4) provides all of the power necessary to operate
the EZ-KIT Lite board.
2-22
ADSP-21369 EZ-KIT Lite Evaluation System Manual
EZ-KIT Lite Hardware Reference
Part Description
Manufacturer
Part Number
2.5 mm Power Jack
Switchcraft
Digi-Key
RAPC712
SC1152-ND
Mating Power Supply (shipped with EZ-KIT Lite)
7V Power Supply
CUI Inc.
DMS070214-P6P-SZ
The power connector supplies DC power to the EZ-KIT Lite board.
Table 2-14 shows the power supply specifications.
Table 2-14. Power Supply Specifications
Terminal
Connection
Center pin
+7 VDC@2.14A
Outer Ring
GND
RS-232 Connector (P1)
Part Description
Manufacturer
Part Number
DB9, Female, Right Angle
Digi-Key
A2100-ND
Digi-Key
45-0308-0000-ND
Mating Cable
Cable DB9M to DB9F 6 feet
SPDIF Coax Connectors (P8 and P9)
Part Description
Manufacturer
Part Number
Coaxial
Switchcraft
PJRAN1X1U01
Monster Cable
BI100-1M
Mating Cable
Two channel RCA interconnect
cable
ADSP-21369 EZ-KIT Lite Evaluation System Manual
2-23
Connectors
DPI Header (P3)
The DPI connector (P3) provides access to all of the DPI signals in the
from of a .1” spacing header. When using the header to access the DPI
pins of the processor, ensure that signals, which normally drive the DPI
pins, are disabled. For more information, see “DPI Interface” on page 2-5.
Part Description
Manufacturer
Part Number
20-pin IDC Header
Sullins
S2012-10
DAI Header (P4)
The DAI connector (P4) provides access to all of the DAI signals in the
from of a .1” spacing header. When using the header to access the DAI
pins of the processor, ensure that signals, which normally drive the DAI
pins, are disabled. Refer to “Codec Setup Switch (SW3)” on page 2-10 for
more information on how to disable signals already being driven from
elsewhere on the EZ-KIT Lite.
Part Description
Manufacturer
Part Number
26-pin IDC Header
Berg
54102-T08-13
USB Connector (P5)
The USB connector (P5) allows to configure and program the processor.
Part Description
Manufacturer
Part Number
Type B USB receptacle
Mill-Max
Digi-Key
897-30-004-90-000
ED90003-ND
2-24
ADSP-21369 EZ-KIT Lite Evaluation System Manual
EZ-KIT Lite Hardware Reference
JTAG Header (P2)
The JTAG header (P2) is the connecting point for a JTAG in-circuit emulator pod. When an emulator is connected to the JTAG header, the USB
debug interface is disabled.
3 is missing to provide keying. Pin 3 in the mating connector
L Pin
should have a plug.
using an emulator with the EZ-KIT Lite board, follow the
L When
connection instructions provided with the emulator.
Part Description
Manufacturer
Part Number
14-pin IDC Header
Berg
54102-T08-07
ADSP-21369 EZ-KIT Lite Evaluation System Manual
2-25
Connectors
2-26
ADSP-21369 EZ-KIT Lite Evaluation System Manual
A BILL OF MATERIALS
The bill of materials corresponds to the board schematics on page B-1.
Please check the latest schematics on the Analog Devices website,
http://www.analog.com/Processors/Processors/DevelopmentTools/tec
hnicalLibrary/manuals/DevToolsIndex.html#Evaluation%20Kit%20Manuals.
ADSP-21369 EZ-KIT Lite Evaluation System Manual
A-1
A-2
ADSP-21369 EZ-KIT Lite Evaluation System Manual
1
1
1
1
1
1
2
1
6
7
8
9
10
11
12
1
3
5
1
2
1
2
1
4
#
Ref.
12.288MHZ SMT OSC003
TS201/21262
SN74AHC1G00 SOT23-5
SINGLE-2-INPUT-NAND
12.0MHZ THR OSC006
CRYSTAL
CY7C4201V-15AC TQFP32
64-BYTE-FIFO
SN74LV164A SOIC14
8-BIT-PARALLEL-SERIAL
SN74AHC1G02 SOT23-5
SINGLE-2 INPUT-NOR
AD8532AR SOIC8
DUAL AMP 250MA
CY7C1019BV33-15VC SOJ32
128K X 8 SRAM
MMBT4401 SOT-23
NPN TRANSISTOR 200MA
CY7C64603-128 PQFP128
USB-TX/RX MICROCONTROLLER
IDT74FCT3244APY SSOP20
3.3V-OCTAL-BUFFER
74LVC14A SOIC14
HEX-INVER-SCHMITT-TRIGGER
Description
U1
U42-43
Y1
U45
U7
U46
U19
U22
Q1
U4
U37
U40-41
Reference Designator
DIG01
TI
DIG01
CYPRESS
TI
TI
ADI
CYPRESS
FAIRCHILD
CYPRESS
IDT
TI
Manufacturer
SG-8002CA-PCC-ND
SN74AHC1G00DBVR
300-6027-ND
CY7C4201V-15AC
SN74LV164AD
SN74AHC1G02DBVR
AD8532AR
CY7C1019BV33-12VC
MMBT4401
CY7C64603-128NC
IDT74FCT3244APY
74LVC14AD
Part Number
#
1
1
1
1
1
1
2
1
1
1
1
1
1
Ref.
13
14
15
16
17
18
19
20
21
22
ADSP-21369 EZ-KIT Lite Evaluation System Manual
23
24
25
ADM708SAR SOIC8
VOLTAGE-SUPERVISOR
SN65LVDS2D SOIC8
3.3V LVDS RECEIVER
21369 AM29LV081B "U35"
21369 24LC00 “U3”
24.576MHZ SMT OSC003
TLC2932 TSSOP14
HP PHASE LOCK LOOP
SN74LVC1G08 SOT23-5
SINGLE-2-INPUT-AND-GATE
LTC1877 MSOP8
600MA ADJ SWITCHING REG
ATF2048 SOIC8
SPI-FLASH-2MB
IS61LV5128AL TSOP44
512KX8-SRAM
GTL2002 TSSOP8
LOW-VOLTAGE-TRANSLATOR
MT48LC4M32B2 TSOP86
4MX32-SDRAM-166MHZ
LT1765 SO-8
ADJUSTABLE-3A-SWITCH-REG
Description
U23
U2
U35
U3
U28
U38
U16,U18
VR2
U29
U30
U39
U36
VR1
Reference Designator
ADI
NATIONAL
AMD
MICROCHIP
DIGI-KEY
TI
TI
LINEAR TECH
ATMEL
ISSI
PHILIPS
MICROM
LINEAR TECH
Manufacturer
ADM708SAR
DS90LV018ATM
AM29LV081B-120EC
24LC00-SN
SG-8002CA-PCC-ND
TLC2932IPW
SN74LVC1G08DBVR
LTC1877EMS8
AT25F512N-10SI-2.7
IS61LV5128AL-10T
GTL2002DP
557-1096-1-ND
LT1765ES8
Part Number
Bill Of Materials
A-3
A-4
ADSP-21369 EZ-KIT Lite Evaluation System Manual
#
1
2
1
8
1
2
2
1
5
1
1
1
Ref.
26
27
28
29
30
31
32
33
34
35
36
37
RCA 4X2 CON011
RA
USB 4PIN CON009
USB
PWR 2.5MM_JACK CON005
RA
RUBBER FEET BLACK
ADSP-21369 SBGA256
SHARC
AD820 SOIC8
OP-amp
AD623 USOIC8
Instrumentation-amp
AD1835AAS MQFP52
2IN-8OUT-96KHZ-CODEC
AD8606AR SOIC8
OPAMP
ADM3202ARN SOIC16
RS232-TXRX
ADP3336ARM MSOP8
ADJ 500MA REGULATOR
ADP3339AKC-33 SOT-223
3.3V 1.5A REGULATOR
Description
J5
P5
J4
MH1-5
U44
U33-34
U5-6
U31
U8-15
U32
VR3-4
VR5
Reference Designator
SWITCHCRAFT
MILL-MAX
SWITCHCRAFT
MOUSER
ADI
ADI
ADI
ADI
ADI
ADI
ADI
ADI
Manufacturer
PJRAS4X2U01
897-30-004-90-000000
SC1152-ND12
517-SJ-5018BK
ADSP-21369KBP-ENG
AD820AR
AD623ARM-REEL
AD1835AAS
AD8606AR
ADM3202ARN
ADP3336ARM-REEL
ADP3339AKC-3.3-RL
Part Number
#
2
5
3
2
1
6
1
1
9
10
4
1
6
Ref.
38
39
40
41
42
43
44
45
46
47
48
ADSP-21369 EZ-KIT Lite Evaluation System Manual
49
50
600 100MHZ 200MA 603
0.50 BEAD
220PF 50V 10% 1206
NPO
0.1uF 50V 10% 805
CERM
0.22UF 25V 10% 805
CERM
AMBER-SMT LED001
GULL-WING
RCA RCA_1X2 CON031
RA
DB9 9PIN DB9F
RIGHT ANGLE FEMALE
DIP4 SWT018
4PIN-SMT-SWT
DIP6 SWT017
DIP8 SWT016
0.05 45X2 CON019
SMT SOCKET
SPST-MOMENTARY SWT013
6MM
RCA 1X1 CON012
BLK
Description
FER1-6
C224
C172,C210-211,C216
C77,C91-92,C118-119,
C152-154,C185-186
LED1-8,LED11
P10
P1
SW2-7
SW13
SW1,SW14
J1-3
SW8-12
P8-9
Reference Designator
MURATA
AVX
AVX
AVX
PANASONIC
SWITCHCRAFT
AMPIKEY
DIG01
DIG01
C&K
SAMTEC
PANASONIC
SWITCHCRAFT
Manufacturer
BLM11A601SPT
12061A221JAT2A
08055C104KAT
08053C224FAT
LN1461C-TR
PJRAS1X2S02
745781-4
CKN1363-ND
CKN1364-ND
CKN1365-ND
SFC-145-T2-F-D-A
EVQ-PAD04M
PJRAN1X1U01
Part Number
Bill Of Materials
A-5
A-6
ADSP-21369 EZ-KIT Lite Evaluation System Manual
1
2
1
21
3
7
57
58
59
60
61
62
3
54
1
1
53
56
5
52
2
2
51
55
#
Ref.
0.1UF 10V 10% 402
6.04K 100MW 1% 805
10UF 6.3V 10% 805
190 100MHZ 5A FER002
270 1/10W 5% 805
10UH 47 +/-20 IND001
2A SL22 DO-214AA
SCHOTTKY
68UF 25V 20% CAP003
ELEC
10uF 25V +80-20% 1210
Y5V
124K 1/10W 1% 805
1UF 16V 10% 805
X7R
2A S2A_RECT DO-214AA
SILICON RECTIFIER
Description
C3,C75-76,C168-171
R28-30
C23-24,C57-58,C84-85,
C111-114,C144-147,
C151,C162-163,C176,
C205-206,C223
FER7
R200,R202
L1
D1
CT1-2
C212,C215,C221
R188
C203-204,C207-209
D3-4
Reference Designator
AVX
DIGI-KEY
AVX
MURATA
PHYCOMP
DIG01
GENERAL SEMI
PANASONIC
MURATA
DALE
KEMET
VISHAY
Manufacturer
0402ZD104KAT2A
311-6.04KCCT-ND
080560106KAT2A
DLW5BSN191SQ2
9C08052A2700JLHFT
445-1202-2-ND
SL22
EEV-FC1E680P
GRM235Y.5V106Z025
CRCW0805-1243FT
C0805C105K4RACTU
S2A/52
Part Number
#
107
41
3
4
4
3
1
1
1
1
1
2
Ref.
63
64
65
66
67
68
69
70
71
ADSP-21369 EZ-KIT Lite Evaluation System Manual
72
73
74
1000PF 50V 5% 402
CERM
100UF 10V 10% C
TANT-LOW-ESR
0.18uF 25V 10% 805
CERM
47uF 16V 10% D
TANT-LOW-ESR
100MA CMDSH-3 SOD-323
SUPERMINI SCHOTTKY
1.5UH 45MOHM 20% IND003
2.8A
33 1/16W 5% 402
22 1/16W 5% 402
0 1/16W 5% 402
4.7K 1/16W 5% 402
10K 1/16W 5% 402
0.01UF 16V 10% 402
Description
C213-214
CT3
C218
C222
D2
L2
R6,R27,R204
R124,R133,R197,R209
R11,R107,R121,R138
R4,R180,R203
R1-3,R5,R19-23,R25-26,
R32-34,R132,R152-156,
R161-162,R173-175,
R206-208,R210-222
C4-22,C25-56,C59-74,
C78-83,C173-175,
C177-178,C183,C188,
C190-196,C201-202,
C228-245
Reference Designator
AVX
AVX
AVX
AVX
CENTRAL SEMI
TYCO
PANASONIC
PANASONIC
PANASONIC
PANASONIC
DALE
AVX
Manufacturer
04025C102JAT2A
TPSC107K010R0075
08053C184KAT2A
TPSD476K016R0080
CMDSH-3
DS6630-1R5M
ERJ-2GEJ330X
ERJ-2GEJ220X
ERJ-2GE0R00X
ERJ-2GEJ472X
CRCW0402103JRT7
0402YC103KAT2A
Part Number
Bill Of Materials
A-7
A-8
ADSP-21369 EZ-KIT Lite Evaluation System Manual
#
2
2
1
1
1
2
1
2
8
10
1
8
4
3
1
2
1
Ref.
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
25.5K 1/16W 1% 0603
200K 1/16W 1% 0603
75K 1/16W 1% 0603
10K 1/16W 1% 0603
10 1/10W 5% 0603
0 1/10W 5% 0603
1M 1/10W 5% 0603
330 1/10W 5% 0603
330PF 50V 5% 0603
4.7UF 25V 205 0805
1UF 16V 10% 0603
0.1UF 16V 10% 603
249 1/10W 1% 805
107 1/10W 1% 805
1.5K 1/10W 5% 603
210K 1/4W 1% 805
64.9K 1/10W 1% 805
Description
R150
R134,R189
R131
R125,R142,R148
R157-160
R31,R126,R181,
R184-186,R192,R223
R201
R163-164,R168-172,
R176-178
C95,C101,C107,C116,
C123,C129,C134,C142
C217,C220
C179
C187,C189
R127
R128
R199
R191,R193
R190,R194
Reference Designator
YAGEO
VISHAY
DALE
PHYCOMP
DALE
PHYCOMP
VISHAY
VISHAY
AVX
PANASONIC
PANASONIC
AVX
YAGEO
YAGEO
DIGI-KEY
VISHAY
VISHAY
Manufacturer
9C06031A2552FKHFT
CRCW06032003FRT1
CRCW06037502FRT1
9C06031A1002FKHFT
CRCW0603100JRT1
9C06031A0R00JLHFT
CRCW0603105JRT1
CRCW0603331JRT1
06035A331JAT2A
ECJ-2FB1E475M
ECJ-1VB1C105K
0603YC104KAT2A
9C08052A2490FKHFT
9C08052A1070FKHFT
P1.5KCFCT-ND
CRCW08052103FRT1
CRCW08056492FRT1
Part Number
#
1
4
2
11
20
9
8
10
8
2
2
3
4
Ref.
92
93
94
95
96
97
98
99
100
101
ADSP-21369 EZ-KIT Lite Evaluation System Manual
102
103
104
5.76K 1/10W 1% 0603
10K 1/10W 1% 0603
0.1 1/10W 1% 0603
90.9K 1/10W 1% 0603
604 1/10W 1% 0603
49.9K 1/10W 1% 0603
1.65K 1/10W 1% 0603
3.32K 1/10W 1% 0603
5.49K 1/10W 1% 0603
11K 1/10W 1% 0603
750K 1/10W 1% 0603
237 1/10W 1% 0603
1K 1/10W 5% 0603
Description
R111-112,R117-118
R145,R147,R182
R143,R149
R146,R151
R45,R54,R62,R65,R69,
R77,R90,R93
R46,R55,R63,R66,R68,
R76,R91-92,R119-120
R44,R52,R60,R64,R71,
R79,R88,R95
R36,R43,R49,R57,R74,
R82,R85,R94,R130
R37,R41-42,R48,R51,
R56,R59,R67,R72,R75,
R80,R83-84,R87,R96,
R99,R103-104,R113-114
R39-40,R50,R58,R73,
R81,R86,R97,R102,
R115,R144
R110,R116
R108-109,R122-123
R198
Reference Designator
DIGI-KEY
DIGI-KEY
YAGEO
DIGI-KEY
DIGI-KEY
DIGI-KEY
DIGI-KEY
DIGI-KEY
DIGI-KEY
DIGI-KEY
DIGI-KEY
DIGI-KEY
YAGEO
Manufacturer
311-5.76KHTR-ND
311-10.0KHTR-ND
ERJ-3RSFR10V
311-90KHTR-ND
311-604HTR-ND
311-49.9KHTR-ND
311-1.65KHTR-ND
311-3.32KHTR-ND
311-5.49KHTR-ND
311-11.0KHTR-ND
311-750KHTR-ND
311-237HTR-ND
9C06031A1001JLHFT
Part Number
Bill Of Materials
A-9
A-10
ADSP-21369 EZ-KIT Lite Evaluation System Manual
12
9
8
1
4
4
1
111
112
113
114
115
116
117
2
108
8
3
107
110
5
106
1
12
105
109
#
Ref.
0.027uF 25V 5% 0603
100 1/16W 5% 402
1.0UF 6.3V 20% 402
75.0 1/10W 1% 0603
2.74K 1/10W 1% 0603
2200PF 50V 5% 0603
680pF 50V 5% 0603
220PF 50V 5% 0603
47.5K 1/10W 1% 0603
2.21K 1/10W 1% 0603
33PF 50V 5% 0603
0.001UF 50V 5% 0603
100PF 50V 5% 0603
Description
C181
R165-167,R179
C197-200
R141
R38,R47,R53,R61,R70,
R78,R89,R98
C88,C98,C104,C110,
C120,C126,C137-138,
C219
C96,C102,C108,C115,
C122,C128,C135,
C141,C148-149,C158,C
160
C89,C97,C103,C109,
C121,C127,C136,C139
R183
R195-196
C225-227
C2,C156-157,C164-165
C94,C99,C105,C117,
C125,C131-132,C140,
C155,C161,C166-167
Reference Designator
AVX
DIGI-KEY
PANASONIC
DIGI-KEY
DIGI-KEY
06033C273JAT2A
311-100JTR-ND
ECJ-0EB0J105M
9T06031A75R0FBHF
T
311-2.74KHTR-ND
ECJ-1VB1H222K
ECJ-1VC1H681J
PANASONIC
PANASONIC
ECJ-1VC1H221J
11-47.5KHTR-ND
311-2.21KHTR-ND
ECJ-1VC1H300J
ECJ-1VC1H102J
ECJ-1VC1H101J
Part Number
PANASONIC
DIGI-KEY
DIGI-KEY
PANASONIC
PANASONIC
PANASONIC
Manufacturer
ADSP-21369 EZ-KIT Lite Evaluation System Manual
2
1
1
2
1
2
1
4
4
1
1
1
1
1
119
120
121
122
123
124
125
126
127
128
129
130
131
132
1
2
118
133
#
Ref.
3.5MM STEREO_JACK CON001
2.5A RESETABLE FUS001
IDC 13X2 IDC13X2
IDC 10X2 IDC10X2
IDC 7X2 IDC7X2
HEADER
IDC 2X2 IDC2X2
0.1x0.1
IDC 2X1 IDC2X1
2X1 TIN
ADG774A QSOP16
QUICKSWITCH-257
GREEN-SMT LED001
GULL-WING
RED-SMT LED001
GULL-WING
511 1/16W 1% 402
301 1/16W 1% 0603
232 1/16W 1% 0603
15K 1/16W 1% 0603
2.05K 1/16W 1% 402
0.27UF 16V +80/-20% 0603
Description
P7
F1
P4
P3
P2
P11
JP1-4
U24-27
LED9
LED10,LED12
R135
R105-106
R129
R140
R100-101
C180,C182
Reference Designator
SHOGYO
RAYCHEM
BERG
BERG
BERG
BERG
BERG
ADI
PANASONIC
PANASONIC
DIGI-KEY
YAGEO
YAGEO
YAGEO
YAGEO
AVX
Manufacturer
SJ-0359AM-5
SMD250-2
54102-T08-13
54102-T08-10
54102-T08-07
54102-T08-02
54101-T08-02
ADG774ABRQ
LN1361C
LN1261C
311-511LCT-ND
9C06031A3010FKHFT
9C06031A2320FKHFT
9C06031A1502FKHFT
9C04021A2051FLHF3
0603YG274ZAT2A
Part Number
Bill Of Materials
A-11
A-12
ADSP-21369 EZ-KIT Lite Evaluation System Manual
A
B
C
D
1
1
2
2
ADSP-21369 EZ-KIT Lite
Schematic
3
3
DNP = Do Not Populate
ANALOG
DEVICES
4
Board No.
C
Date
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-21369 EZ-KIT Lite
TITLE
Title
Size
20 Cotton Road
Rev
A0196-2005
1.1
Sheet
8-2-2005_13:45
D
1
of
13
A
B
U44
ADDR[0:23]
ADDR0
ADDR1
ADDR2
ADDR3
1
ADDR4
ADDR5
ADDR6
ADDR7
ADDR8
ADDR9
ADDR10
ADDR11
ADDR12
ADDR13
ADDR14
ADDR15
ADDR16
ADDR17
ADDR18
ADDR19
ADDR20
ADDR21
ADDR22
ADDR23
2
N2
SDCLK0
B2
SDCLK1
T1
SDCKE
T2
SDCAS
R2
SDRAS
R1
SDWE
P1
SDA10
SDCLK1
SDCKE
SDCAS
SDRAS
SDWE
SDA10
U19
DATA0
V19
DATA1
DATA0
U44
DATA1
U20
DATA2
V20
DATA3
T20
DATA4
T19
DATA5
R19
DATA6
R20
DATA7
P19
DATA8
P20
DATA9
N20
DATA10
N19
DATA11
M19
DATA12
M20
DATA13
MS1
MS2_FLAG2_IRQ2
MS3_FLAG3_IRQ3_LED8
FLAG1_~IRQ1_SW1
FLAG0_~IRQ0_SW2
DPI1_MOSI
DATA3
DPI2_MISO
DPI3_SPICLK
DATA4
DPI4_SPI_AD1835_CS
DATA5
DPI5_SPI_FLASH_CS
DATA6
DATA7
DPI6_LED1
DATA8
DPI7_LED2
DPI8_LED3
DATA9
DPI9_UART0_TX
DATA10
DPI10_UART0_RX
DATA11
DATA12
DPI11_UART0_RTS
DATA13
DPI12_UART0_CTS
DPI13_LED4
L19
DATA15
DPI14_LED5
K20
DATA16
J20
DATA17
H20
DATA18
H19
DATA19
DATA15
DATA16
DATA17
DATA18
DATA19
G20
DATA20
F20
DATA21
G19
DATA22
E20
DATA23
D20
DATA24
E19
DATA25
D19
DATA26
C19
DATA27
B19
DATA28
B18
DATA29
B17
DATA30
A18
DATA31
DATA20
DATA21
DATA22
DATA23
DATA24
DATA25
DATA26
DATA27
DATA28
DATA29
DATA30
RD
WE
ACK
Y7
XTAL
TCK
A2
TDI
TDI
B7
TDO
TDO
A3
TMS
TRST
TMS
B3
BOOT_CFG0
DSP_CLKIN
DPI2
A15
DPI3
B14
DPI4
B13
DPI5
A14
DPI6
A13
DPI7
B12
DPI8
A12
DPI9
A11
DPI10
B11
DPI11
A10
DPI12
B10
DPI13
A9
DPI14
DAIP2_PLLMCLK_OUT
1
DAIP3_PLLMCLK_IN
DAIP4_ELVIS_TRIG
DAIP5_ADC_DATA
DAIP6_AD1835_MCLK
DAIP7_ADC_BCLK
DAIP8_ADC_LRCLK
DAIP9_DAC_D4
DAIP10_DAC_D3
DAIP11_DAC_D2
DAIP12_DAC_D1
DAIP13_DAC_BCLK
DAIP14_DAC_LRCLK
DAIP15_LED6
DAIP16_LED7
DAIP17_AUDIO_OSC
DAIP18_SPDIF_IN
VDDINT
DAIP19_SW3
FER1
600
603
DAIP20_SW4
W9
AVDD
W10
AGND
C2
0.001UF
0603
C5
0.01UF
402
C3
0.1UF
402
2
When designing your JTAG interface
please refer to the Engineer to Engineer
Note EE-68 which can be found at
http://www.analog.com
3.3V
EMU
B5
R4
4.7K
402
BOOT_CFG0
B6
R22
10K
402
BOOT_CFG1
A4
CLK_CFG0
A5
CLK_CFG1
R20
10K
402
R21
10K
402
R19
10K
402
CLK_CFG0
SW2
1
CLK_CFG1
ADSP-21369
SBGA256
1
BOOT_CFG0
BOOT_CFG1
7
3
6
4
5
3
CLK_CFG0
4
CLK_CFG1
8
2
2
C1
0.1UF
402
DNP
DAIP1_SPDIF_OUT
ON
A17
CLKOUT
CLKOUT
A16
TRST
A6
R7
1.5K
402
DNP
BOOT_CFG1
Y8
CLKIN
R3
10K
402
B4
B16
RESET
N1
RD
P2
WR
M1
ACK
RESET
R2
10K
402
A8
DAI1
B9
DAI2
B8
DAI3
A7
DAI4
B1
DAI5
D2
DAI6
C2
DAI7
E2
DAI8
C1
DAI9
D1
DAI10
E1
DAI11
F2
DAI12
G2
DAI13
F1
DAI14
G1
DAI15
H2
DAI16
H1
DAI17
J2
DAI18
J1
DAI19
K2
DAI20
DPI1
A1
NC1
A19
NC2
A20
NC3
B20
NC4
W20
NC5
Y2
NC6
Y3
NC7
Y9
NC8
Y10
NC9
Y20
NC10
C20
NC11
Y05
NC12
Y06
NC13
Y11
NC14
Y12
NC15
3.3V
R1
10K
402
B15
ADSP-21369
SBGA256
TCK
EMU
3
DATA2
DATA14
L20
DATA14
DATA31
U1
MS0
U2
MS1
L1
MS2_FLAG2_IRQ2
M2
MS3_FLAG3_TIMEXP
L2
FLAG1_~IRQ1
K1
FLAG0_~IRQ0
MS0
D
DATA[0:31]
W19
ADDR0
W17
ADDR1
W18
ADDR2
Y17
ADDR3
W16
ADDR4
W15
ADDR5
Y16
ADDR6
Y15
ADDR7
W14
ADDR8
Y14
ADDR9
W13
ADDR10
Y13
ADDR11
W12
ADDR12
W11
ADDR13
W8
ADDR14
W7
ADDR15
W6
ADDR16
W5
ADDR17
Y4
ADDR18
W3
ADDR19
W4
ADDR20
W2
ADDR21
V1
ADDR22
V2
ADDR23
SDCLK0
C
SWT018
DIP4
SW2: BOOT/CLOCK RATIO SELECT
(Default: 1=ON, 2=OFF, 3=ON, 4=OFF)
1
2
BOOTCFG0 BOOTCFG1
BOOTMODE
ON
ON
SPI SLAVE BOOT
ON
OFF
EPROM/FLASH BOOT
OFF
ON
SPI MASTER BOOT
OFF
OFF
RESERVED
3
4
CLOCK RATIO
CLKCFG0 CLKCFG1
CORE:CLKIN
ON
ON
6:1
ON
OFF
16:1
OFF
ON
32:1
OFF
OFF
RESERVED
3
DEFAULT
NOTE: EZ-KITs with Engineering Grade 21369
silicon may be set to a CLK RATIO of 6:1.
Boot/Clk Config Switch
3.3V
DEFAULT
3.3V
DNP = Do Not Populate
R5
10K
402
C4
0.01UF
402
DSP OSC
4
R6
33
402
U28
1
ANALOG
DEVICES
OE
OUT
3
Nashua, NH 03063
4
PH: 1-800-ANALOGD
DSP_CLKIN
ADSP-21369 EZ-KIT Lite
DSP
Title
24.576MHZ
OSC003
OSC
Size
Board No.
C
Date
A
20 Cotton Road
B
C
Rev
A0196-2005
1.1
Sheet
8-19-2005_14:37
D
2
of
13
A
B
C
D
VDDINT
U44
1
2
VDDEXT
3
E3
VDDINT1
E4
VDDINT2
C7
VDDINT3
C10
VDDINT4
C13
VDDINT5
C16
VDDINT6
C17
VDDINT7
C18
VDDINT8
G17
VDDINT9
G18
VDDINT10
L3
VDDINT11
L4
VDDINT12
D7
VDDINT13
D10
VDDINT14
D13
VDDINT15
H3
VDDINT16
H4
VDDINT17
U3
VDDINT18
U8
VDDINT19
U12
VDDINT20
U15
VDDINT21
U17
VDDINT22
U18
VDDINT23
K17
VDDINT24
K18
VDDINT25
P3
VDDINT26
P4
VDDINT27
P17
VDDINT28
P18
VDDINT29
V3
VDDINT30
V8
VDDINT31
V12
VDDINT32
V15
VDDINT33
L17
VDDINT34
L18
VDDINT35
F17
VDDIO1
K4
VDDIO2
C4
VDDIO3
G4
VDDIO4
D4
VDDIO5
D6
VDDIO6
D9
VDDIO7
D12
VDDIO8
D15
VDDIO9
D17
VDDIO10
H17
VDDIO11
N4
VDDIO12
U5
VDDIO13
U7
VDDIO14
U9
VDDIO15
U11
VDDIO16
U13
VDDIO17
U14
VDDIO18
U16
VDDIO19
V13
VDDIO20
R17
VDDIO21
M17
VDDIO22
T4
VDDIO23
VDDINT
E17
GND1
E18
GND2
J3
GND3
J4
GND4
F3
GND5
F4
GND6
F18
GND7
K3
GND8
C3
GND9
C5
GND10
C6
GND11
C8
GND12
C9
GND13
C11
GND14
C12
GND15
C14
GND16
C15
GND17
G3
GND18
D3
GND19
D5
GND20
D8
GND21
D11
GND22
D14
GND23
D16
GND24
D18
GND25
H18
GND26
M3
GND27
M4
GND28
J17
GND29
J18
GND30
N3
GND31
N17
GND32
N18
GND33
U4
GND34
U6
GND35
U10
GND36
V4
GND37
V5
GND38
V6
GND39
V7
GND40
V9
GND41
V10
GND42
V11
GND43
V14
GND44
V16
GND45
V17
GND46
V18
GND47
R3
GND48
R4
GND49
R18
GND50
W1
GND51
M18
GND52
T3
GND53
T17
GND54
T18
GND55
Y1
GND56
Y18
GND57
Y19
GND58
F19
GND59
J19
GND60
K19
GND61
VDDEXT
1
C63
0.01UF
402
C56
0.01UF
402
C55
0.01UF
402
C54
0.01UF
402
C53
0.01UF
402
C52
0.01UF
402
C51
0.01UF
402
C50
0.01UF
402
C49
0.01UF
402
C59
0.01UF
402
C48
0.01UF
402
C11
0.01UF
402
C10
0.01UF
402
C9
0.01UF
402
C7
0.01UF
402
C28
0.01UF
402
C6
0.01UF
402
VDDINT
VDDEXT
C47
0.01UF
402
C46
0.01UF
402
C45
0.01UF
402
C44
0.01UF
402
C43
0.01UF
402
C42
0.01UF
402
C41
0.01UF
402
C40
0.01UF
402
C39
0.01UF
402
C60
0.01UF
402
C38
0.01UF
402
C17
0.01UF
402
C16
0.01UF
402
C15
0.01UF
402
C14
0.01UF
402
C13
0.01UF
402
C27
0.01UF
402
C12
0.01UF
402
2
VDDINT
VDDEXT
C61
0.01UF
402
C37
0.01UF
402
C36
0.01UF
402
C35
0.01UF
402
C34
0.01UF
402
C33
0.01UF
402
C32
0.01UF
402
C31
0.01UF
402
C30
0.01UF
402
C62
0.01UF
402
C22
0.01UF
402
C29
0.01UF
402
C25
0.01UF
402
C21
0.01UF
402
C20
0.01UF
402
C19
0.01UF
402
C26
0.01UF
402
C18
0.01UF
402
VDDINT
3
VDDEXT
C58
10UF
805
C57
10UF
805
C24
10UF
805
C23
10UF
805
DNP = Do Not Populate
ANALOG
DEVICES
ADSP-21369
SBGA256
4
Size
Board No.
C
Date
B
C
20 Cotton Road
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-21369 EZ-KIT Lite
DSP 2
Title
A
C8
0.01UF
402
Rev
A0196-2005
1.1
Sheet
8-2-2005_13:45
D
3
of
13
A
B
C
D
SDRAM
128Mb (1M x 32-bit x 4 Banks)
U36
ADDR[1:18]
1
DATA[0:31]
ADDR1
25
ADDR2
26
ADDR3
27
ADDR4
60
ADDR5
61
ADDR6
62
ADDR7
63
ADDR8
64
ADDR9
65
ADDR10
66
A2
A3
A4
A5
A6
A7
A8
A9
21
A11
ADDR17
22
ADDR18
23
BA0
BA1
20
MS2_FLAG2_IRQ2
CS
67
SDCKE
CKE
68
SDCLK0
CLK
17
SDWE
2
A1
A10
ADDR12
R24
10K
402
DNP
A0
24
SDA10
3.3V
2
DQ0
4
DQ1
5
DQ2
7
DQ3
8
DQ4
10
DQ5
11
DQ6
13
DQ7
74
DQ8
76
DQ9
77
DQ10
79
DQ11
80
DQ12
82
DQ13
83
DQ14
85
DQ15
31
DQ16
33
DQ17
34
DQ18
36
DQ19
37
DQ20
39
DQ21
40
DQ22
42
DQ23
45
DQ24
47
DQ25
48
DQ26
50
DQ27
51
DQ28
53
DQ29
54
DQ30
56
DQ31
WE
18
SDCAS
CAS
19
SDRAS
RAS
DQM
16
DQM0
71
DQM1
28
DQM2
R25
10K
402
59
DQM3
14
NC1
30
NC2
57
NC3
3.3V
3.3V
DATA0
DATA1
DATA2
SPI Flash
2Mb
DATA3
R26
10K
402
DATA4
R23
10K
402
U29
DATA5
DATA6
7
HOLD
Asynchronous SRAM
4Mb (512K x 8-bit)
DATA7
DATA8
DPI1_MOSI
U30
DATA10
ADDR[0:19]
DATA[0:7]
DATA11
ADDR0
DATA12
ADDR1
DATA13
ADDR2
DATA14
ADDR3
DATA15
ADDR4
DATA16
ADDR5
DATA17
ADDR6
DATA18
ADDR7
DATA19
ADDR8
DATA20
ADDR9
DATA21
ADDR10
DATA22
ADDR11
DATA23
ADDR12
DATA24
ADDR13
DATA25
ADDR14
DATA26
ADDR15
DATA27
ADDR16
DATA28
ADDR17
DATA29
ADDR18
3
A0
4
A1
5
A2
6
A3
7
A4
16
A5
17
A6
18
A7
19
A8
20
A9
26
A10
27
A11
28
A12
29
A13
30
A14
38
A15
39
A16
40
A17
41
A18
DATA30
9
D0
10
D1
13
D2
14
D3
31
D4
32
D5
35
D6
36
D7
ADDR19
25
NC/A19
DPI5_SPI_FLASH_CS
DATA1
3
WP
RESET
NC5
8
CE
37
OE
15
WE
MS0
73
NC6
RD
WE
1
VDD1
DATA3
15
VDD2
29
VDD3
VDD4
DATA5
DATA6
DATA7
Flash
8Mb (1M x 8-bit)
NC1
2
2
NC2
21
U35
NC3
ADDR[0:20]
22
DATA[0:7]
NC4
ADDR0
21
ADDR1
20
ADDR2
19
ADDR3
18
ADDR4
17
ADDR5
16
ADDR6
15
ADDR7
14
ADDR8
8
ADDR9
7
ADDR10
36
ADDR11
6
ADDR12
5
ADDR13
4
ADDR14
3
ADDR15
2
ADDR16
1
ADDR17
40
ADDR18
13
ADDR19
37
23
NC5
24
NC6
42
NC7
3.3V
43
NC8
44
NC9
VDD2
11
33
3
12
GND1
34
GND2
IS61LV5128AL
TSOP44
86
VSS4
6
VDDQ1
VSSQ1
9
12
VDDQ2
VSSQ2
35
32
VDDQ3
A0
D0
A1
D1
A2
D2
A3
D3
A4
D4
A5
D5
A6
D6
A7
D7
A10
49
ADDR20
38
46
VDDQ5
26
DATA1
27
DATA2
28
DATA3
32
DATA4
33
DATA5
34
DATA6
35
DATA7
A11
11
NC1
29
NC2
A12
A13
A14
A15
12
RY/BY
A16
A17
RESET
10
RESET
3.3V
A18
3
A19
VCC1
VSSQ4
DATA0
A9
38
VDDQ4
25
A8
VSSQ3
41
4
DATA4
72
VSS3
43
3
58
VSS2
GND
AT25F2048N
SOIC8
44
VSS1
DPI2_MISO
DATA2
NC4
70
2
SO
DATA0
1
VDD1
DATA31
8
VCC
6
SCK
5
SI
1
CS
DPI3_SPICLK
DATA9
69
3.3V
1
3.3V
NC/A20
VCC2
31
30
VSSQ5
55
52
VDDQ6
VSSQ6
75
22
MS1
78
VDDQ7
VSSQ7
81
RD
84
VDDQ8
24
VSSQ8
9
WE
MT48LC4M32B2
TSOP86
CE
OE
VSS1
WE
VSS2
39
23
AM29LV08IB-120EC
TSOP40
3.3V
3.3V
C73
0.01UF
402
C74
0.01UF
402
C65
0.01UF
402
C64
0.01UF
402
C72
0.01UF
402
C71
0.01UF
402
C66
0.01UF
402
3.3V
C67
0.01UF
402
C68
0.01UF
402
3.3V
C69
0.01UF
402
C70
0.01UF
402
DNP = Do Not Populate
ANALOG
DEVICES
4
SDRAM
IS61LV5128
AM29LV081
Size
4
PH: 1-800-ANALOGD
ADSP-21369 EZ-KIT Lite
MEMORY
Board No.
C
Date
B
Nashua, NH 03063
AT25F512N
Title
A
20 Cotton Road
C
Rev
A0196-2005
1.1
Sheet
8-19-2005_14:34
D
4
of
13
C
D
SPDIF OUT
SPDIF IN
LEFT (WHITE)
DAC4
DAC4
DAC3
DAC2
DAC1
B
ADC
A
RIGHT (RED)
3.3V
IN (P10) OUT (J5)
3.3V
OUT (P7) IN (P8) OUT (P9)
1
1
AUDIO OSC
AD1835 AUDIO
CODEC
R33
10K
402
R34
10K
402
R27
33
402
U1
U31
DAIP8_ADC_LRCLK
ALRCLK
ASDATA
38
DAIP13_DAC_BCLK
DBCLK
37
DAIP14_DAC_LRCLK
DLRCLK
41
DAIP12_DAC_D1
DSDATA1
42
DAIP11_DAC_D2
DSDATA2
ADCRN
DAIP5_ADC_DATA
DSDATA4
3.3V
9
OUTRP1
8
OUTRN1
7
OUTLP1
6
OUTLN1
OUTRN1
DAC1
OUTLP1
CIN
50
DPI2_MISO
COUT
51
DPI3_SPICLK
CCLK
4
5
DAIP17_AUDIO_OSC
MASTER_SLAVE
ADC_DATA
SW3: CODEC SETUP SWITCH
(Default: 1=OFF, 2=ON, 3=ON, 4=ON)
Connects or disconnects the audio oscillator
1-2
depending on how the system is setup.
See users manual for more information.
OUTLN1
15
OUTRP2
14
OUTRN2
13
OUTLP2
12
OUTLN2
OUTRP2
OUTRN2
DAC2
OUTLP2
3
OUTLN2
28
OUTRP3
27
OUTRN3
26
OUTLP3
25
OUTLN3
3
6
DAIP6_AD1835_MCLK
OUTRP1
MCLK
DPI1_MOSI
3
ADCRP
47
DAIP6_AD1835_MCLK
7
SWT018
DIP4
DSDATA3
44
DAIP9_DAC_D4
R32
10K
402
ADC
ADCLP
43
DAIP10_DAC_D3
2
12.288MHZ
OSC003
8
2
4
49
ADC_DATA
ON
46
ADCLN
3
20
ADCLN
21
ADCLP
22
ADCRN
23
ADCRP
ABCLK
2
45
DAIP7_ADC_BCLK
SW3
1
3
OUT
1
1
OE
OUTRP3
OUTRN3
4
DAC3
OUTLP3
OFF = AD1835 is SLAVE
ON = AD1835 is MASTER
2
Disconnects ADC_DATA signal from
driving the corresponding DAI signal.
Useful if using this DAI pin for another purpose.
OUTLN3
2
DPI4_SPI_AD1835_CS
CLATCH
34
OUTRP4
33
OUTRN4
32
OUTLP4
31
OUTLN4
36
MASTER_SLAVE
~M/S
R29
6.04K
805
OUTRP4
OUTRN4
DAC4
OUTLP4
OUTLN4
6
5V
4
RESET
3.3V
PD/RST
FILTD
FILTR
17
18
7
ODVDD
AVDD1
AVDD2
1
DVDD1
AVDD3
AUDIO_VREF_ADC
5
AD8606AR
SOIC8
A5V
48
U8
R28
6.04K
805
11
19
C84
10UF
805
29
C75
0.1UF
402
C85
10UF
805
C76
0.1UF
402
R30
6.04K
805
39
DVDD2
5
AGND1
10
AGND2
16
AGND3
24
AGND4
30
AGND5
35
AGND6
40
DGND1
52
DGND2
3
2
U8
1
3
AUDIO_VREF_DAC
AGND
Loopback Test Switch
(Default= All OFF)
For Test Purposes Only
3
AD8606AR
SOIC8
SW14
1
1
AIN_AMP_LEFT
ON
AD1835AAS
MQFP52
2
15
3
14
4
13
5
12
6
11
7
10
8
9
2
AIN_AMP_RIGHT
3
AGND
4
5
6
7
3.3V
5V
5V_B
A5V
A5V
A5V
8
3.3V
16
AOUT3_LEFT
AOUT3_RIGHT
AOUT4_LEFT
AOUT4_RIGHT
AOUT1_LEFT
AOUT1_RIGHT
AOUT2_LEFT
AOUT2_RIGHT
SWT016
DIP8
FER2
600
603
C78
0.01UF
402
C79
0.01UF
402
C80
0.01UF
402
C81
0.01UF
402
C82
0.01UF
402
R31
0
0603
C83
0.01UF
402
C77
0.22UF
805
DNP = Do Not Populate
ANALOG
DEVICES
4
OSC
AD1835
AD1835
AGND
AGND
AGND
AD1835
AD8606
Board No.
C
Date
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-21369 EZ-KIT Lite
ANALOG AUDIO
Title
Size
20 Cotton Road
Rev
A0196-2005
1.1
Sheet
8-2-2005_13:45
D
5
of
13
A
B
C
D
1
1
R67
5.49K
0603
R39
11K
0603
R48
5.49K
0603
C117
100PF
0603
R36
3.32K
0603
R50
11K
0603
OUTLN1
C99
100PF
0603
R49
3.32K
0603
OUTLN2
C116
330PF
0603
DAC1 LEFT
2
C90
DNP
0603
C101
330PF
0603
U9
1
DAC2 LEFT
3
R37
5.49K
0603
C115
680PF
0603 R64
1.65K
0603
AD8606AR
SOIC8
R65
604
0603
J5
4X2
CON011
C111
10UF
805
OUTLP1
AOUT1_LEFT
R38
2.74K
0603
C89
220PF
0603
AUDIO_VREF_DAC
C100
DNP
0603
1
3
R51
5.49K
0603
C102
680PF
0603 R52
1.65K
0603
AD8606AR
SOIC8
R54
604
0603
J5
4X2
CON011
C113
10UF
805
OUTLP2
2
AOUT2_LEFT
R53
2.74K
0603
3
C88
2200PF
0603
U10
2
R66
49.9K
0603
C103
220PF
0603
AUDIO_VREF_DAC
5
6
R55
49.9K
0603
C104
2200PF
0603
2
2
AGND
R42
5.49K
0603
R40
11K
0603
R43
3.32K
0603
AGND
R56
5.49K
0603
C94
100PF
0603
R58
11K
0603
OUTRN1
C105
100PF
0603
OUTRN2
C95
330PF
0603
DAC1 RIGHT
C93
DNP
0603
3
6
C107
330PF
0603
U9
7
DAC2 RIGHT
5
R41
5.49K
0603
C96
680PF
0603 R44
1.65K
0603
AD8606AR
SOIC8
R45
604
0603
J5
4X2
CON011
C112
10UF
805
OUTRP1
AOUT1_RIGHT
R47
2.74K
0603
AUDIO_VREF_DAC
A5V
R57
3.32K
0603
C97
220PF
0603
R46
49.9K
0603
7
5
R59
5.49K
0603
C108
680PF
0603 R60
1.65K
0603
AD8606AR
SOIC8
R62
604
0603
1
AOUT2_RIGHT
R61
2.74K
0603
AUDIO_VREF_DAC
C109
220PF
0603
3
J5
4X2
CON011
C114
10UF
805
OUTRP2
3
C98
2200PF
0603
C106
DNP
0603
U10
6
4
6
C110
2200PF
0603
R63
49.9K
0603
A5V
AGND
C91
0.22UF
805
AGND
C92
0.22UF
805
DNP = Do Not Populate
ANALOG
DEVICES
4
AGND
AGND
AD8606
AD8606
Board No.
C
Date
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-21369 EZ-KIT Lite
AUDIO OUT 1
Title
Size
20 Cotton Road
Rev
A0196-2005
1.1
Sheet
8-2-2005_13:45
D
6
of
13
A
B
R75
5.49K
0603
1
R73
11K
0603
C
R84
5.49K
0603
C125
100PF
0603
R74
3.32K
0603
D
R86
11K
0603
OUTLN3
1
C132
100PF
0603
R85
3.32K
0603
OUTLN4
C123
330PF
0603
C124
DNP
0603
DAC3 LEFT
C134
330PF
0603
U11
2
1
DAC4 LEFT
3
R72
5.49K
0603
C122
680PF
0603 R71
1.65K
0603
AD8606AR
SOIC8
R69
604
0603
J5
4X2
CON011
C144
10UF
805
OUTLP3
AOUT3_LEFT
U12
2
C133
DNP
0603
1
3
R87
5.49K
0603
C135
680PF
0603 R88
1.65K
0603
AD8606AR
SOIC8
R90
604
0603
J5
4X2
CON011
C147
10UF
805
OUTLP4
8
AOUT4_LEFT
11
AOUT4_LEFT_HP
R70
2.74K
0603
C121
220PF
0603
AUDIO_VREF_DAC
R89
2.74K
0603
9
C120
2200PF
0603
R68
49.9K
0603
C136
220PF
0603
AUDIO_VREF_DAC
12
R91
49.9K
0603
C137
2200PF
0603
2
2
AGND
R83
5.49K
0603
R81
11K
0603
R82
3.32K
0603
AGND
R96
5.49K
0603
C131
100PF
0603
R97
11K
0603
OUTRN3
OUTRN4
C129
330PF
0603
C130
DNP
0603
DAC3 RIGHT
6
C142
330PF
0603
U11
7
DAC4 RIGHT
5
R80
5.49K
0603
3
R94
3.32K
0603
C140
100PF
0603
C128
680PF
0603 R79
1.65K
0603
AD8606AR
SOIC8
R77
604
0603
J5
4X2
CON011
C145
10UF
805
OUTRP3
AOUT3_RIGHT
C143
DNP
0603
U12
6
7
5
R99
5.49K
0603
C141
680PF
0603 R95
1.65K
0603
AD8606AR
SOIC8
R93
604
0603
J5
4X2
CON011
C146
10UF
805
OUTRP4
7
AOUT4_RIGHT
3
10
AOUT4_RIGHT_HP
R78
2.74K
0603
AUDIO_VREF_DAC
A5V
R98
2.74K
0603
9
C126
2200PF
0603
R76
49.9K
0603
AUDIO_VREF_DAC
C139
220PF
0603
AGND
A5V
C118
0.22UF
805
C127
220PF
0603
12
C138
2200PF
0603
R92
49.9K
0603
AGND
C119
0.22UF
805
DNP = Do Not Populate
ANALOG
DEVICES
4
AGND
AGND
AD8606
AD8606
Board No.
C
Date
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-21369 EZ-KIT Lite
AUDIO OUT 2
Title
Size
20 Cotton Road
Rev
A0196-2005
1.1
Sheet
8-2-2005_13:45
D
7
of
13
A
B
C
D
R105
301
0603
VREF_MIC_L
AIN_AMP_LEFT
P10
RCA_1X2
CON031
FER4
600
603
2
C162
10UF
805
R102
11K
0603
R103
5.49K
0603
R104
5.49K
0603
AIN_LEFT
3
C148
680PF
0603
C166
100PF
0603
1
C149
680PF
0603
1
R122
237
0603
U13
2
AGND
2
1
1
ADCLN
AGND
AUDIO_VREF_ADC
3
C164
0.001UF
0603
ADC LEFT
2
HEADPHONE OUT
6
4
7
5
5
AOUT4_LEFT_HP
1
AD8532AR
SOIC8
R123
237
0603
U13
3
CT1
68UF
CAP003
U19
7
AGND
AUDIO_VREF_ADC
P7
DAC4
C167
100PF
0603
DNP
C150
120PF
0603
6
AD8532AR
SOIC8
C165
0.001UF
0603
R118
5.76K
0603
R116
750K
0603
3
AOUT4_RIGHT_HP
AD8606AR
SOIC8
R117
5.76K
0603
CT2
68UF
CAP003
U19
CON001
R119
49.9K
0603
ADCLP
R120
49.9K
0603
5
AD8606AR
SOIC8
AGND
A5V
AGND
2
2
C151
10UF
805
R106
301
0603
VREF_MIC_R
AIN_AMP_RIGHT
P10
RCA_1X2
CON031
FER3
600
603
1
C163
10UF
805
R115
11K
0603
R114
5.49K
0603
AGND
R113
5.49K
0603
AD8606
AIN_RIGHT
3
C160
680PF
0603
C161
100PF
0603
2
C158
680PF
0603
R109
237
0603
U15
AGND
2
1
ADCRN
AGND
AUDIO_VREF_ADC
AD8606AR
SOIC8
AGND
7
3
6
4
5
AIN_RIGHT
AIN_LEFT
VREF_MIC_L
VREF_MIC_R
SWT018
DIP4
R108
237
0603
U15
ON
AUDIO_VREF_ADC
ADC RIGHT
8
2
4
AUDIO_VREF_ADC
SW4
1
3
C156
0.001UF
0603
7
A5V
3
2
6
R101
2.05K
402
AD8606AR
SOIC8
C155
100PF
0603
DNP
C159
120PF
0603
R110
750K
0603
AUDIO_VREF_ADC
C157
0.001UF
0603
R111
5.76K
0603
3
1
R112
5.76K
0603
A5V
1
3
3
A5V
ELECTRET MICROPHONE ENABLE SWITCH
(Default = All OFF)
R100
2.05K
402
U14
WHEN USING AN ELECTRET MICROPHONE
PLACE ALL SWITCHES IN ON POSITION
R121
0
402
ADCRP
5
AD8606AR
SOIC8
AGND
U14
6
R107
0
402
7
5
C154
0.22UF
805
C153
0.22UF
805
C152
0.22UF
805
AD8606AR
SOIC8
4
DNP = Do Not Populate
ANALOG
DEVICES
AGND
AGND
AGND
AGND
AD8532
AD8606
AD8606
Title
Size
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-21369 EZ-KIT Lite
AUDIO IN & HEADPHONE OUT
Board No.
C
Date
20 Cotton Road
Rev
A0196-2005
1.1
Sheet
8-2-2005_13:45
D
8
of
13
A
B
C
D
3.3V
3.3V
3.3V
C173
0.01UF
402
C169
0.1UF
402
1
R140
15K
0603
P8
RCA
CON012
1X1
SPDIF
COAX
INPUT
C170
0.1UF
402
4
C2+
5
C2-
C168
0.1UF
402
SPDIF_COAX_IN
1
P1
2
V+
ADM3202
C185
0.22UF
805
2
U32
1
C1+
3
C1-
1
6
6
V-
2
7
1
DPI10_UART0_RX
DAIP18_SPDIF_IN
2
7
12
3
6
DPI11_UART0_RTS
4
5
ON
DPI12_UART0_CTS
R124
22
402
10
4
R125
10K
0603
8
VCC
7
ROUT
6
NC3
5
GND
8
3
1
RIN2
RIN+
3
NC1
4
NC2
SW5
1
2
C186
0.22UF
805
DPI9_UART0_TX
U2
1
R141
75.0
0603
11
T1IN
T1OUT
T2IN
T2OUT
14
3
7
13
R1OUT
R1IN
9
8
R2OUT
R2IN
ADM3202ARN
SOIC16
SWT018
DIP4
SN65LVDS2D
SOIC8
TX_OUT
8
RX_IN
4
9
5
C171
0.1UF
402
DB9F
9PIN
UART Enable Switch
SERIAL PORT
(UART 0)
3.3V
3.3V
3.3V
5V_B
2
2
C175
0.01UF
402
R137
210
402
DNP
R136
210
402
DNP
R134
200K
0603
U39
1
R138
0
402
ADM3485E
R135
511
402
2
3
DAIP2_PLLMCLK_OUT
4
DAIP3_PLLMCLK_IN
R139
330
402
DNP
5V_PLL
8
GREF
7
DREF
6
D1
5
D2
GND
SREF
S1
S2
SHORTING
JUMPER
DEFAULT=NOT INSTALLED
R133
22
402
5V_PLL
R132
10K VCO Selection Jumper
402
U38
C183
0.01UF
402
GTL2002
TSSOP8
JP1
5
FIN_B
VCO_OUT
3
1
2
IDC2X1
4
FIN_A
1
DAIP1_SPDIF_OUT
C172
0.1UF
805
U16
P9
RCA
CON012
1X1
R127
249
805
4
SPDIF_COAX_OUT 2
2
SN74LVC1G08
SOT23-5
3
1
5V_B
SPDIF
COAX
OUT
1
4
2
SN74LVC1G08
SOT23-5
DNP
3.3V
R131
75K
0603
6
PFD_OUT
VCO_IN
R128
107
805
U17
8
NC
2
SELECT
AGND2
12
1
LOGIC_VDD
VCO_VDD
9
PFD_INH
7
LOGIC_GND
13
BIAS
10
VCO_INH
11
VCO_GND
R129
232
0603
14
R130
3.32K
0603
3
C180
0.27UF
0603
TLC2932
TSSOP14
C181
0.027UF
0603
3.3V
5V_PLL
5V_B
5V_B
5V_PLL
5V_B
5V_PLL
C182
0.27UF
0603
AGND2
AGND2
C174
0.01UF
402
FER5
600
603
C184
0.01UF
402
DNP
R126
0
0603
SN74LVC1G08
C176
10UF
805
C177
0.01UF
402
C178
0.01UF
402
AGND2
C179
1UF
0603
SN74LVC1G08
Loopback Test Switch
(Default= All OFF)
For Test Purposes Only
AGND2
TLC2932
TLC2932
AGND2
AGND2
TLC2932
TLC2932
DNP = Do Not Populate
SW6
ON
7
3
6
4
5
3
4
8
2
2
RX_IN
1
1
SPDIF_COAX_IN
4
ANALOG
DEVICES
SPDIF_COAX_OUT
TX_OUT
SWT018
DIP4
Title
Size
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-21369 EZ-KIT Lite
EXTERNAL PLL, SPDIF, & RS-232
Board No.
C
Date
20 Cotton Road
Rev
A0196-2005
1.1
Sheet
8-2-2005_13:45
D
9
of
13
A
B
C
D
TP13
VDDINT_SHUNT
VDDINT
A5V
R146
90.9K
0603
JP4
1
JP2
1
U5
ELVIS_SELECT
1
2
ELVIS_TRIGGER_S
IDC2X1
IDC2X1
3
IN+
2
IN8
RG+
1
RG-
R143
0.1
0603
1
DAIP4_ELVIS_TRIG
2
7
V+
4
VOUT
REF
U33
2
R145
10K
0603
6
6
SHORTING
JUMPER
DEFAULT=NOT INSTALLED
ACH0+
SHORTING
JUMPER
DEFAULT=NOT INSTALLED
3
AD820
SOIC8
5
AD623
USOIC8
R142
10K
0603
C192
0.01UF
402
ELVIS Programmable Flag Jumper
ELVIS Select Jumper
A5V
R144
11K
0603
C187
0.1UF
603
C190
0.01UF
402
ELVIS_5V
P11
1
2
3
4
AGND
ELVIS_PWR
SW13
IDC2X2
P6
IDC2X1
ELVIS Voltage Selection Jumper
RS_P2
RS_P0
WS_P4_1
WS_P2_1
WS_P0_1
ELVIS_5V
A5V
ELVIS_TRIGGER_S
U6
RG-
3
ACH1+
3
AD820
SOIC8
C188
0.01UF
402
ACH4+
ACH3+
R148
10K
0603
ACH1+
ACH0+
A5V
R150
25.5K
0603
FUNC_OUT
C189
0.1UF
603
C191
0.01UF
402
AGND
DAC0
AIN_AMP_LEFT
AIN_AMP_RIGHT
2
SWT017
DIP6
RS_P3
RS_P1
Function Generator Switch
WS_P5_1
WS_P3_1
WS_P1_1
ELVIS_5V
AS_P3_1
SW1
1
ACH3+
ACH4+
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
8
AD623
USOIC8
R149
0.1
0603
6
7
7
1
RG+
2
R147
10K
0603
8
6
6
8
IN-
7
V+
4
V6
OUT
5
REF
5
5
2
IN+
FUNC_OUT
4
3
U34
9
3
VDDEXT
4
2
VDDEXT_SHUNT
DAC1
ON
TP14
DAC0
1
R151
90.9K
0603
10
6
2
-15_P_1
-15_P_2
GND1
GND2
GND3
GND4
RS_P[7]
RS_P[5]
RS_P[3]
RS_P[1]
GND6
KEY1
KEY3
WS_P[7]_1
WS_P[5]_1
WS_P[3]_1
WS_P[1]_1
GND8
ID7
ID5
ID3
ID1
GND10
AS_P[7]_1
AS_P[5]_1
AS_P[3]_1
AS_P[1]_1
+5V2
WFTRIG
STARTSCAN
EXTSRTOBE
TRIG2
SOURCE1_1
GPCRT1_OUT
GPCTR0_GATE
FREQ_OUT
GND12
VL_1
AIGND1
ACH15_1
ACH14_1
ACH13_1
ACH12
AIGND3
ACH11
ACH10
ACH9
ACH8
NC2
KEY5
KEY7
NC3
FM_1
AM_1
+5V3
GND15
NC6
ZM_1
NC7
DAC1_2
GND16
VDCB_1
3
5
SHORTING
JUMPER
DEFAULT=NOT INSTALLED
+15_P_1
+15_P_2
+5_P_1
+5_P_2
+5_P_3
GND5
RS_P[6]
RS_P[4]
RS_P[2]
RS_P[0]
GND7
KEY2
KEY4
WS_P[6]_1
WS_P[4]_1
WS_P[2]_1
WS_P[0]_1
GND9
ID6
ID4
ID2
ID0
GND11
NC1
AS_P[6]_1
AS_P[4]_1
AS_P[2]_1
AS_P[0]_1
PB_PRES_1
UPDATE
CONVERT
SCANCLK
TRIG1_2
GATE1_1
GPCTR0_SOURCE
GPCTR0_OUT_1
GND13
VH_1
AIGND2
ACH7_1
ACH6_1
ACH5_1
ACH4
AIGND4
ACH3
ACH2
ACH1
ACH0
AISENSE_1
KEY6
KEY8
NC4
FG_SYNC_1
FG_SIG_1
GND14
NC5
ZL_1
ZH_1
NC8
DAC0_2
GND17
VDCA_1
B01
B02
B03
B04
B05
B06
B07
B08
B09
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
11
4
A01
A02
A03
A04
A05
A06
A07
A08
A09
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
2
3
DSP CORE CURRENT
2
AIN_RIGHT
2
JP3
1
AGND
ON 12
1
AIN_LEFT
2X2
1
AIN_AMP_LEFT
AIN_AMP_RIGHT
AOUT1_LEFT
AOUT1_RIGHT
SWT016
DIP8
3
Oscilloscope Select Switch
DAC1
PCI32B
AGND
DSP IO CURRENT
AGND
ELVIS CONNECTOR
NI ELVIS ID 31 (0001 1111)
DNP = Do Not Populate
ANALOG
DEVICES
4
Board No.
C
Date
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-21369 EZ-KIT Lite
ELVIS INTERFACE
Title
Size
20 Cotton Road
Rev
A0196-2005
1.1
Sheet
8-2-2005_13:45
D
10
of
13
A
B
C
D
3.3V
R175
10K
402
LABEL "PB1"
R179
100
402
5
1
R157
10
0603
U40
SW8
SWT013
SPST-MOMENTARY
3.3V
6
RS_P0
1
74LVC14A
SOIC14
C197
1.0UF
402
RESET
LED10
RED-SMT
LED001
R174
10K
402
LABEL "PB2"
R165
100
402
R158
10
0603
U40
11
SW11
SWT013
SPST-MOMENTARY
R162
10K
402
U23
RS_P1
1
74LVC14A
SOIC14
SW12
SWT013
SPST-MOMENTARY
ON
1
1
1
SOFT_RESET
SW7
8
7
3
6
4
5
2
2
FLAG1_~IRQ1_SW1
4
PFI
RESET
RESET
8
RESET_TO_USB
7
RESET
5
PFO
U18
4
ADM708SAR
SOIC8
2
AS_P3_1
MR
SN74LVC1G08
SOT23-5
FLAG0_~IRQ0_SW2
3
DAIP19_SW3
4
DAIP20_SW4
SWT018
DIP4
R173
10K
402
2
R178
330
0603
R154
10K
402
RESET
10
C198
1.0UF
402
LABEL "PB3"
R152
10K
402
2
Push Button Enable Switch
R166
100
402
R159
10
0603
U40
9
SW10
SWT013
SPST-MOMENTARY
8
RS_P2
74LVC14A
SOIC14
C199
1.0UF
402
U24
WS_P0_1
3.3V
LABEL "PB4"
DPI6_LED1
R161
10K
402
WS_P1_1
R167
100
402
R160
10
0603
U40
13
SW9
SWT013
SPST-MOMENTARY
DPI7_LED2
WS_P2_1
12
RS_P3
R153
10K
402
74LVC14A
SOIC14
C200
1.0UF
402
DPI8_LED3
WS_P3_1
DPI13_LED4
2
3
5
6
11
10
14
13
1
ELVIS_SELECT
15
I0A
4
YA
I1A
I0B
7
YB
I1B
I0C
U37
9
YC
2
I1C
I0D
4
12
YD
I1D
6
8
S
1Y1
1A2
1Y2
1A3
1Y3
1A4
1Y4
11
2A1
13
2A2
15
2A3
17
2A4
E
3
ADG774A
QSOP16
U25
18
1A1
16
14
12
9
2Y1
3.3V
7
3
2Y2
5
2Y3
3
2Y4
3.3V
WS_P4_1
DPI14_LED5
WS_P5_1
DAIP15_LED6
R155
10K
402
R156
10K
402
U40
1
DAIP16_LED7
U40
2
74LVC14A
SOIC14
MS3_FLAG3_IRQ3_LED8
3
2
I0A
3
I1A
5
I0B
6
I1B
11
I0C
10
I1C
14
I0D
13
I1D
YA
YB
4
1
OE1
19
OE2
7
LED8
AMBER-SMT
LED001
LED7
AMBER-SMT
LED001
LED6
AMBER-SMT
LED001
LED5
AMBER-SMT
LED001
LED4
AMBER-SMT
LED001
LED3
AMBER-SMT
LED001
LED2
AMBER-SMT
LED001
POWER
LED9
GREEN-SMT
LED001
LED1
AMBER-SMT
LED001
IDT74FCT3244APY
SSOP20
9
YC
12
YD
R164
330
0603
R163
330
0603
R176
330
0603
R177
330
0603
R172
330
0603
R171
330
0603
R170
330
0603
R169
330
0603
R168
330
0603
4
1
S
15
E
74LVC14A
SOIC14
3.3V
ADG774A
QSOP16
DNP = Do Not Populate
4
C193
0.01UF
402
C202
0.01UF
402
C195
0.01UF
402
C196
0.01UF
402
C194
0.01UF
402
ANALOG
DEVICES
C201
0.01UF
402
Title
Size
74LVC14A
ADM708
IDT74FCT3244
ADG774A
ADG774A
Date
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-21369 EZ-KIT Lite
PUSHBUTTONS, LEDS, & RESET
Board No.
C
SN74LVC1G08
20 Cotton Road
Rev
A0196-2005
1.1
Sheet
8-2-2005_13:45
D
11
of
13
A
B
C
D
5V
EXPANSION INTERFACE (TYPE A)
VDDEXT
3.3V
VDDINT
3.3V
5V
VDDINT_SHUNT
DATA[0:31]
1
1
ADDR[0:23]
3.3V
J1
J2
J3
2
1
2
1
2
1
4
3
4
3
4
3
ADDR1
6
5
ADDR0
6
5
6
5
ADDR3
8
7
ADDR2
8
7
8
7
ADDR5
10
9
ADDR4
10
9
10
9
ADDR7
12
11
ADDR6
12
11
12
11
ADDR9
ADDR11
14
13
16
SDCLK1
SDCAS
SDCKE
ADDR8
15
14
ADDR10
SDWE
SDA10
SDRAS
13
16
14
15
16
DPI3_SPICLK
15
DPI5_SPI_FLASH_CS
18
17
ADDR12
18
17
18
17
ADDR15
20
19
ADDR14
20
19
20
19
ADDR19
ADDR21
ADDR23
22
21
24
ADDR16
23
26
ADDR18
25
ADDR20
26
29
32
31
32
34
33
34
36
35
36
35
38
37
38
37
DATA1
40
39
DATA0
40
DATA3
42
41
DATA2
DATA5
44
43
DATA4
DATA7
46
45
DATA9
48
47
DATA11
50
49
DATA10
DATA13
52
51
DATA12
DATA19
DATA21
56
58
60
29
31
32
31
33
34
33
36
35
38
37
39
40
39
42
41
42
41
44
43
44
43
DATA6
46
45
46
45
DATA8
48
47
48
47
50
49
50
49
52
51
52
51
62
61
DATA22
64
63
DATA24
DATA31
65
68
3
DAIP12_DAC_D1
DAIP14_DAC_LRCLK
DAIP16_LED7
DAIP18_SPDIF_IN
DATA28
69
72
DAIP10_DAC_D3
DATA26
67
70
DAIP8_ADC_LRCLK
DATA20
DATA25
DATA29
DAIP6_AD1835_MCLK
DATA18
59
66
DAIP4_ELVIS_TRIG
DATA16
DATA23
DATA27
DAIP2_PLLMCLK_OUT
DATA14
57
DAIP20_SW4
DATA30
FLAG1_~IRQ1_SW1
71
74
73
76
75
78
77
80
79
82
81
84
83
86
85
88
87
90
89
25
DPI13_LED4
30
MS3_FLAG3_IRQ3_LED8
55
DPI11_UART0_RTS
27
DPI2_MISO
DPI4_SPI_AD1835_CS
DPI6_LED1
DPI8_LED3
DPI10_UART0_RX
DPI12_UART0_CTS
DPI14_LED5
45X2
CON019
54
53
56
55
58
57
60
59
62
61
64
63
66
65
68
67
70
69
72
71
74
73
76
75
78
77
80
79
82
81
84
83
86
85
88
87
90
89
RESET
FLAG0_~IRQ0_SW2
MS2_FLAG2_IRQ2
DAIP1_SPDIF_OUT
DAIP3_PLLMCLK_IN
54
DAIP5_ADC_DATA
56
DAIP7_ADC_BCLK
58
DAIP9_DAC_D4
60
DAIP11_DAC_D2
DAIP13_DAC_BCLK
DAIP15_LED6
DPI3_SPICLK
DPI5_SPI_FLASH_CS
MS0
MS1
MS2_FLAG2_IRQ2
DPI7_LED2
DPI9_UART0_TX
DPI11_UART0_RTS
DPI13_LED4
45X2
CON019
MS3_FLAG3_IRQ3_LED8
ACK
DAIP1_SPDIF_OUT
53
DAIP3_PLLMCLK_IN
55
DAIP5_ADC_DATA
57
DAIP7_ADC_BCLK
59
DAIP9_DAC_D4
63
DAIP11_DAC_D2
65
DAIP13_DAC_BCLK
72
DPI1_MOSI
67
DAIP15_LED6
69
DAIP17_AUDIO_OSC
DAIP19_SW3
71
74
73
76
75
78
77
80
79
82
81
84
83
86
85
88
87
90
89
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
DPI2_MISO
DPI4_SPI_AD1835_CS
DPI6_LED1
DPI8_LED3
DPI10_UART0_RX
DPI12_UART0_CTS
DPI14_LED5
2
3.3V
61
70
FLAG0_~IRQ0_SW2
2
IDC10X2
10X2
64
68
DAIP19_SW3
P3
1
CLKOUT
62
66
DAIP17_AUDIO_OSC
DPI9_UART0_TX
23
28
FLAG1_~IRQ1_SW1
53
26
RESET
DPI7_LED2
21
24
25
30
54
ADDR22
22
23
29
DATA17
30
24
27
DATA15
27
21
28
2
28
22
DPI1_MOSI
13
ADDR13
ADDR17
DPI
HEADER
RD
DAI
HEADER
P4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
DAIP2_PLLMCLK_OUT
DAIP4_ELVIS_TRIG
DAIP6_AD1835_MCLK
DAIP8_ADC_LRCLK
DAIP10_DAC_D3
DAIP12_DAC_D1
DAIP14_DAC_LRCLK
DAIP16_LED7
DAIP18_SPDIF_IN
DAIP20_SW4
IDC13X2
13X2
WE
3
45X2
CON019
3.3V
R180
4.7K
402
JTAG
HEADER
P2
EMULATOR_SELECT
4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
EMULATOR_EMU
All USB interface circuitry is considered proprietary and has
been omitted from this schematic.
DNP = Do Not Populate
ANALOG
DEVICES
EMULATOR_TMS
EMULATOR_TCK
EMULATOR_TRST
EMULATOR_TDI
When designing your JTAG interface please refer to the
Engineer to Engineer Note EE-68 which can be found at
http://www.analog.com
IDC7X2
7X2
Size
Board No.
C
Date
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-21369 EZ-KIT Lite
EXPANSION INTERFACE
Title
EMULATOR_TDO
20 Cotton Road
Rev
A0196-2005
1.1
Sheet
8-2-2005_13:45
D
12
of
13
A
B
C
D
UNREG_IN
POWER IN
5V
F1
2.5A
FUS001
D3
2A
DO-214AA
1
FER7
CHOKE_COIL
4
3
1
2
1
C214
1000PF
402
C215
10UF
1210
UNREG_IN
VR3
7
IN1
8
IN2
J4
2
5V_B
UNREG_IN
C216
0.1UF
805
3
7.5V_POWER
CON005
2.5MM_JACK
6
SD
R192
0
0603
1
OUT1
2
OUT2
3
OUT3
5
FB
GND
4 ADP3336ARM
MSOP8
VR4
7
IN1
8
IN2
6
SD
R193
210K
805
C207
1UF
805
C206
10UF
805
C208
1UF
805
C213
1000PF
402
1
1
OUT1
2
OUT2
3
OUT3
5
FB
GND
4 ADP3336ARM
MSOP8
R191
210K
805
C204
1UF
805
C205
10UF
805
C209
1UF
805
R194
64.9K
805
R190
64.9K
805
SHGND
MH1
MH2
MH3
MH5
MH4
2
2
R185
0
0603
UNREG_IN
3.3V
R187
DNP
0603
VDDINT_SHUNT
TP1
TP12
UNREG_IN
R181
0
0603
VR5
L1
10UH
IND001
VR2
6
VIN
C221
10UF
1210
VDDEXT_SHUNT
3
SYNC_MODE
1
RUN
SW
4
GND
PLL_LPF
GND
1
5
2
ITH
2
OUTPUT1
4
OUTPUT2
INPUT
7
R188
124K
805
8
C225
33PF
0603
C212
10UF
1210
C211
0.1UF
805
ADP3339AKC-33
SOT-223
C203
1UF
805
C210
0.1UF
805
3
VFB
LTC1877
MSOP8
R189
200K
0603
C224
220PF
1206
C222
47UF
D
3
C223
10UF
805
3
GND Test Points are scattered on PCB for Test Measurement Purposes.
LABEL "GND" ON ALL TPs
TP11 TP10 TP9
D2
CMDSH-3
100MA
SOD-323
ELVIS_PWR
TP8
TP7
TP6
TP5
TP4
TP3
TP2
UNREG_IN
VR1
2
VIN
R184
0
0603
5
SHDN
SW
8
SYNC
FB
4
GND
C220
4.7UF
0805
LT1765
SO-8
4
C218
0.18UF
805
1
BOOST
L2
1.5UH
IND003
D4
2A
DO-214AA
R186
0
0603
3
R183
47.5K
0603
6
7
VC
C219
2200PF
0603
D1
SL22
2A
DO-214AA
R182
10K
0603
DNP = Do Not Populate
ANALOG
DEVICES
CT3
100UF
C
C217
4.7UF
0805
Board No.
C
Date
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-21369 EZ-KIT Lite
POWER
Title
Size
20 Cotton Road
Rev
A0196-2005
1.1
Sheet
8-2-2005_13:45
D
13
of
13
I
INDEX
A
AD1835A, CAD and DAC
ADC_DATA pin, 2-11
configuration registers, 1-10
master clock (MCLK), 2-5, 2-10
master/slave modes, 1-10, 2-10
setup switch (SW3), 2-10
SPI interface, 2-6
ADSP-21369 processors
ADDRx pins, 2-7
async memory controller, 1-8
CLKCFGx pins, 2-3
core clock, 2-8
core frequency, 2-3
core voltage, 2-2
DAIPx/DATAx pins, 2-7
DAIx pins, 1-12, 2-12, 2-17, 2-20, 2-24
DPIx pins, 1-12, 2-7, 2-12
external port, 2-3, 2-8
FLAGx/~IRQx pins, 1-11, 1-12, 2-7, 2-12,
2-14, 2-16
IO voltage, 2-2
peripheral ports, xii
SDRAM controller, 1-7
signal routing units (SRUs), 1-9
SPI port, 1-8, 1-10
analog audio interface, xi, 1-9
analog-to-digital converter (ADC), See
AD1854A
architecture, of this EZ-KIT Lite, 2-2
audio
codecs, See AD1835A, CAD and DAC
in RCA connector (P10), 2-22
interface, See analog audio interface
oscillator, 2-4, 2-10
out RCA connector (J5), 2-22
audio signals
AMP_LEFT_IN, 2-13
AMP_RIGHT_IN, 2-13
DAC1-0, 2-14
FUNCT_OUT, 2-14
LEFT_IN, 2-14
LEFT_OUT, 2-13
RIGHT_IN, 2-14
RIGHT_OUT, 2-13
B
background telemetry channel (BTC), 1-12
bill of materials, A-1
boot
code, 1-7
configuration pins (BOOTCFG1-0), 2-9
modes, 2-3, 2-8
C
CLKCFG1-0 pins, 2-10
CLKIN pin, 2-3
clock
multiplier ratio, 2-8
routing signals, 2-10
codec setup switch (SW7), 2-10
ADSP-21369 EZ-KIT Lite Evaluation System Manual
I-1
INDEX
configuration, of this EZ-KIT Lite, 1-4
connectors
diagram of locations, 2-20
J1-3 (expansion), 2-3, 2-5, 2-6, 2-7, 2-20
J4 (power), 1-4, 2-22
J5 (audio out RCA), 1-10, 2-22
P10 (audio in RCA), 1-10, 2-22
P1 (RS-232), xi, 2-23
P2 (JTAG), 2-8, 2-25
P3 (DPI header), 2-24
P4 (DAI header), 2-24
P5 (USB), 1-4, 2-24
P7 (headphone out), 1-10, 2-22
P8-9 (SPDIF coax), 2-23
contents, of EZ-KIT Lite package, 1-2
core
frequency, 2-3
to CLKIN ratio, 2-10
current limit, 2-7
customer support, xiv
D
DAI, See digital audio interface
data acquisition (DAQ) device, 1-9
data IO rate, 1-9
DB9 (female) connector, xi, 2-23
default configuration, of this EZ-KIT Lite, 1-3
digital audio interface (DAI)
connectors, 1-11, 1-12, 2-4, 2-14
disabling, 2-5, 2-11
header (P4), xii, 2-4, 2-24
transferring data from codec, 1-9
digital peripheral interface (DPI)
connectors, 1-12, 2-5, 2-14
disabling, 2-6
DPI2-1 (MOSI-0) pins, 1-8
DPI3 (SPI clock) pin, 1-8
DPI4 (SPI select) pin, 1-10
DPI5 (chip select) pin, 1-8
header (P3), xii, 2-6, 2-24
I-2
digital-to-analog converter (DAC), See
AD1835A, CAD and DAC
DIP switch (SW7), 1-4, 1-11, 2-12, 2-16
DMA controller, 1-7
E
electret microphone, 1-10, 2-11
ELVIS (Educational Laboratory Virtual
Instrumentation Suite)
interface, xi, 1-8
programmable flag jumper (JP4), 2-20
select jumper (JP2), 2-19
trigger pins, 2-20
voltage select jumper (JP3), 2-19
EPROM/flash boot mode, 2-3
example programs, 1-12
expansion interface, xii, 2-3, 2-5, 2-6, 2-7, 2-20
external
memory, 1-7
PLL, See phase lock loop
port, ADSP-21369 processors, 2-3, 2-8
F
features, of this EZ-KIT Lite, x
FLAG
See also ADSP-21369 processors
pins, 2-6
register, 1-11
flash memory
boot mode (default), 2-8, 2-9
start/end addresses, 1-7
via external port, 1-7, 2-3
frame sync signals, 1-10, 2-10
frequency, See core frequency
G
general-purpose input/output, 1-10, 2-6, 2-14,
2-16
ADSP-21369 EZ-KIT Lite Evaluation System Manual
INDEX
H
headphone out jack (P7), xi, 2-22
Help, online, xix
master input clock (MCLK), 1-9
~MS2-0, memory select pins, 1-7
~MS3, memory select pin, 1-7, 1-12
I
N
installation, of this EZ-KIT Lite, 1-4
interrupts, configuring push buttons as, 1-11
IO voltage, 2-2
notation conventions, xxii
O
oscilloscope config switch (SW1), 2-13
J
JTAG
emulation port, 2-8
header (P2), xii, 2-25
jumpers
diagram of locations, 2-17
JP1 (VCO select), 2-17
JP2 (ELVIS select), 2-19
JP3 (voltage select), 2-19
JP4 (ELVIS programmable flag), 2-20
JP6 (ELVIS voltage), 2-19
L
LabVIEW virtual instruments, xi, 1-9
LEDs
connections, 1-11
diagram of locations, 2-14
LED10 (reset), 1-4, 2-15
LED11 (USB monitor), 1-5, 2-16
LED12 (USB reset), 1-4, 2-15
LED1-7 (FLAGx IO), 1-12, 2-14
LED8 (FLAG3), 1-12, 2-6, 2-14
LED9 (power), 1-4, 2-14
license restrictions, 1-6
loop-back test switches (SW6, SW14), 2-12
M
master clock (MCLK), 1-9
P
package contents, 1-2
parallel flash memory, See flash memory
parallel port (PP) control signals, 2-7
phase lock loop (PLL), xii, 2-4, 2-17
PMCTLx register, 2-3
power
connector (J4), 2-22
LED (LED9), 2-14
specifications, 2-23
supply, 2-19, 2-23
push buttons
connections, 1-11
diagram of locations, 2-14
enable switch (SW7), 1-4, 1-11, 2-12, 2-16
reference designators, See switches by name
(SWx)
R
RCA
cables, 1-3
connectors, xi, 1-10, 2-4
registration, of this product, 1-3
reset
processor, 2-15
push button (SW12), 2-17
restrictions, license, 1-6
RS-232 connector (P1), xi, 2-23
ADSP-21369 EZ-KIT Lite Evaluation System Manual
I-3
INDEX
S
SDRAM
chip select pin (FLAG8), 2-6
configuration, 1-7
control signals, 2-7
via external port, 2-3
serial peripheral interconnect (SPI)
flash memory, xi, xii, 1-7, 1-8, 2-6
master/slave boot modes, 2-3, 2-9
session startup, 1-4
signal routing units
SRU2 (DPI interface), 2-5
SRU (DAI interface), 2-4
spacing headers, 2-24
SPDIF
input/output, xii
receiver, 1-9
SPI
master/slave boot modes, 2-9
SRAM
async memory controller, 1-8
configuration, 1-7
via external port, 2-3
stereo IO, xi
SW12 (reset) push button, 2-17
SW13 (ELVIS station) switch, 2-13
SW14 (test) switch, 2-12
SW1 (oscilloscope) switch, 2-13
SW2 (boot mode select) switch, 2-3, 2-6, 2-8
SW3 (AD1835A codec) switch, 2-5, 2-10
SW4 (microphone) switch, 1-10, 2-11
SW6 (test) switch, 2-12
SW7 (push buttons enable) DIP switch, 1-4,
1-11, 2-12, 2-16
I-4
SW8-11 (general input) push buttons, 2-16
synchronous dynamic random access memory,
See SDRAM
synchronous random access memory, See SRAM
system architecture, of this EZ-KIT Lite, 2-2
T
technical/customer support, xiv
test switches (SW6, SW14), 2-12
time-division multiplexed (TDM), 1-9
two-wire interface (TWI), 1-9
U
universal asynchronous receiver/transmitter
(UART)
enable switch (SW5), 2-11
interface, xi, 2-6
USB
cable, 1-3, 2-16, 2-17
connector (P5), 2-24
debug interface, 2-8, 2-25
interface chip (U34), 2-15, 2-17
monitor LED (LED11), 1-5
V
VisualDSP++
documentation, xx
online Help, xix
voltage, 2-17
voltage controlled oscillator (VCO) select
jumper (JP1), 2-17
ADSP-21369 EZ-KIT Lite Evaluation System Manual