FEATURES
FUNCTIONAL BLOCK DIAGRAM
VPSI
ENBL
TEMP
SENSOR
TEMP
DET
DET
TADJ
GAIN
BIAS
VPSO
SLOPE
DET
I
V
VSET
I
V
VOUT
DET
CLPF
INHI
CMIP
APPLICATIONS
10783-001
INLO
CMOP
Figure 1.
2.4
6
2.2
5
2.0
4
GENERAL DESCRIPTION
1.8
3
1.6
2
1.4
1
1.2
0
1.0
–1
0.8
–2
0.6
–3
0.4
–4
The AD8318-EP is a demodulating logarithmic amplifier,
capable of accurately converting an RF input signal to a
corresponding decibel-scaled output voltage. It employs the
progressive compression technique over a cascaded amplifier
chain, each stage of which is equipped with a detector cell.
The device is used in measurement or controller mode. The
AD8318-EP maintains accurate log conformance for signals of
1 MHz to 6 GHz and provides useful operation to 8 GHz. The
input range is typically 60 dB (re: 50 Ω) with error less than
±1 dB. The AD8318-EP has a 10 ns response time that enables
RF burst detection to beyond 45 MHz. The device provides
unprecedented logarithmic intercept stability vs. ambient
temperature conditions. A 2 mV/°C slope temperature sensor
output is also provided for additional system monitoring.
A single supply of 5 V is required. Current consumption is
typically 68 mA. Power consumption decreases to <1.5 mW
when the device is disabled.
The AD8318-EP can be configured to provide a control voltage
to a VGA, such as a power amplifier or a measurement output,
from Pin VOUT. Because the output can be used for controller
applications, wideband noise is minimal.
In this mode, the setpoint control voltage is applied to VSET.
The feedback loop through an RF amplifier is closed via VOUT,
the output of which regulates the amplifier output to a magnitude
corresponding to VSET. The AD8318-EP provides 0 V to 4.9 V
output capability at the VOUT pin, suitable for controller
VOUT (V)
RF transmitter PA setpoint control and level monitoring
RSSI measurement in base stations, WLAN, WiMAX, and
radars
0.2
ERROR (dB)
Wide bandwidth: 1 MHz to 8 GHz
High accuracy: ±1.0 dB over 55 dB range (f < 5.8 GHz)
Stability over temperature: ±0.5 dB
Low noise measurement/controller output (VOUT)
Pulse response time: 10 ns/12 ns (fall/rise)
Integrated temperature sensor
Small footprint LFCSP
Power-down feature: <1.5 mW at 5 V
Single-supply operation: 5 V @ 68 mA
Fabricated using high speed SiGe process
–5
0
–65 –60 –55 –50 –45 –40 –35 –30 –25 –20 –15 –10 –5
PIN (dBm)
0
5
–6
10
10783-052
Enhanced Product
1 MHz to 8 GHz, 70 dB
Logarithmic Detector/Controller
AD8318-EP
Figure 2. Typical Logarithmic Response and Error vs. Input Amplitude at 5.8 GHz
applications. As a measurement device, Pin VOUT is externally
connected to VSET to produce an output voltage, VOUT, which
is a decreasing linear-in-dB function of the RF input signal
amplitude.
The logarithmic slope is nominally −25 mV/dB but can be
adjusted by scaling the feedback voltage from VOUT to the
VSET interface. The intercept is 20 dBm (re: 50 Ω, CW input)
using the INHI input. These parameters are very stable against
supply and temperature variations.
The AD8318-EP is fabricated on a SiGe bipolar IC process and
is available in a 4 mm × 4 mm, 16-lead LFCSP. Performance is
specified over a temperature range of –55oC to +105oC.
Additional application and technical information can be found
in the AD8318 data sheet.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2012 Analog Devices, Inc. All rights reserved.
AD8318-EP
Enhanced Product
TABLE OF CONTENTS
Features .............................................................................................. 1
ESD Caution...................................................................................6
Applications ....................................................................................... 1
Pin Configuration and Function Descriptions..............................7
General Description ......................................................................... 1
Typical Performance Characteristics ..............................................8
Functional Block Diagram .............................................................. 1
Outline Dimensions ....................................................................... 11
Revision History ............................................................................... 2
Ordering Guide .......................................................................... 11
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 6
REVISION HISTORY
7/12—Revision 0: Initial Version
Rev. 0 | Page 2 of 12
Enhanced Product
AD8318-EP
SPECIFICATIONS
VPOS = 5 V, CLPF = 220 pF, TA = 25°C, 52.3 Ω termination resistor at INHI, unless otherwise noted.
Table 1.
Parameter
SIGNAL INPUT INTERFACE
Specified Frequency Range
DC Common-Mode Voltage
MEASUREMENT MODE
f = 900 MHz
Input Impedance
±3 dB Dynamic Range
±1 dB Dynamic Range
Maximum Input Level
Minimum Input Level
Slope
Intercept
Output Voltage—High Power In
Output Voltage—Low Power In
Temperature Sensitivity
f = 1.9 GHz
Input Impedance
±3 dB Dynamic Range
±1 dB Dynamic Range
Maximum Input Level
Minimum Input Level
Slope
Intercept
Output Voltage—High Power In
Output Voltage—Low Power In
Temperature Sensitivity
f = 2.2 GHz
Input Impedance
±3 dB Dynamic Range
±1 dB Dynamic Range
Maximum Input Level
Minimum Input Level
Slope
Intercept
Output Voltage—High Power In
Output Voltage—Low Power In
Temperature Sensitivity
Test Conditions/Comments
INHI (Pin 14) and INLO (Pin 15)
Min
Typ
Max
Unit
8
VPOS – 1.8
GHz
V
957||0.71
65
63
57
−1
−58
−24.5
22
0.78
1.52
Ω||pF
dB
dB
dB
dBm
dBm
mV/dB
dBm
V
V
0.001
VOUT (Pin 6) shorted to VSET (Pin 7), sinusoidal
input signal
RTADJ = 500 Ω
TA = 25°C
−55°C < TA < +105°C
TA = 25°C
±1 dB error
±1 dB error
PIN = −10 dBm
PIN = −40 dBm
PIN = −10 dBm
25°C ≤ TA ≤ 105°C
−55°C ≤ TA ≤ +25°C
RTADJ = 500 Ω
−26
19.5
0.7
1.42
TA = 25°C
−55°C < TA < +105°C
TA = 25°C
±1 dB error
±1 dB error
PIN = −10 dBm
PIN = −35 dBm
PIN = –10 dBm
25°C ≤ TA ≤ 105°C
−55°C ≤ TA ≤ +25°C
RTADJ = 500 Ω
−27
17
0.63
1.2
TA = 25°C
−55°C < TA < +105°C
TA = 25°C
±1 dB error
±1 dB error
PIN = −10 dBm
PIN = −35 dBm
PIN = −10 dBm
25°C ≤ TA ≤ 105°C
−55°C ≤ TA ≤ +25°C
Rev. 0 | Page 3 of 12
−28
15
0.63
1.2
−23
24
0.86
1.62
0.0071
0.0031
dB/°C
dB/°C
523||0.68
65
63
57
−2
−59
−24.4
20.4
0.73
1.35
Ω||pF
dB
dB
dB
dBm
dBm
mV/dB
dBm
V
V
−22
24
0.83
1.5
0.0056
0.0004
dB/°C
dB/°C
391||0.66
65
62
58
−2
−60
−24.4
19.6
0.73
1.34
Ω||pF
dB
dB
dB
dBm
dBm
mV/dB
dBm
V
V
0.0052
0.0034
−21.5
25
0.84
1.5
dB/°C
dB/°C
AD8318-EP
Parameter
f = 3.6 GHz
Input Impedance
±3 dB Dynamic Range
±1 dB Dynamic Range
Maximum Input Level
Minimum Input Level
Slope
Intercept
Output Voltage—High Power In
Output Voltage—Low Power In
Temperature Sensitivity
f = 5.8 GHz
Input Impedance
±3 dB Dynamic Range
±1 dB Dynamic Range
Maximum Input Level
Minimum Input Level
Slope
Intercept
Output Voltage—High Power In
Output Voltage—Low Power In
Temperature Sensitivity
f = 8.0 GHz
±3 dB Dynamic Range
Maximum Input Level
Minimum Input Level
Slope
Intercept
Output Voltage—High Power In
Output Voltage—Low Power In
Temperature Sensitivity
OUTPUT INTERFACE
Voltage Swing
Output Current Drive
Small Signal Bandwidth
Video Bandwidth (or Envelope Bandwidth)
Output Noise
Fall Time
Rise Time
Enhanced Product
Test Conditions/Comments
RTADJ = 51 Ω
TA = 25°C
−55°C < TA < +105°C
TA = 25°C
±1 dB error
±1 dB error
PIN = −10 dBm
PIN = −40 dBm
PIN = −10 dBm
25°C ≤ TA ≤ 105°C
−55°C ≤ TA ≤ +25°C
RTADJ = 1000 Ω
TA = 25°C
−55°C < TA < +105°C
TA = 25°C
±1 dB error
±1 dB error
PIN = −10 dBm
PIN = −40 dBm
PIN = −10 dBm
25°C ≤ TA ≤ 105°C
−55°C ≤ TA ≤ +25°C
RTADJ = 500 Ω
TA = 25°C
−55°C < TA < +105°C
±3 dB error
±3 dB error
PIN = −10 dBm
PIN = −40 dBm
PIN = −10 dBm
25°C ≤ TA ≤ 105°C
−55°C ≤ TA ≤ +25°C
VOUT (Pin 6)
VSET = 0 V; PIN = −10 dBm, no load 1
VSET = 2.1 V; PIN = −10 dBm, no load1
VSET = 1.5 V; PIN = −50 dBm
PIN = −10 dBm; from CLPF to VOUT
PIN = 2.2 GHz; −10 dBm, fNOISE = 100 kHz, CLPF = 220 pF
PIN = Off to −10 dBm, 90% to 10%
PIN = −10 dBm to off, 10% to 90%
Rev. 0 | Page 4 of 12
Min
Typ
Max
Unit
119||0.7
70
61
58
−2
–60
−24.3
19.8
0.717
1.46
Ω||pF
dB
dB
dB
dBm
dBm
mV/dB
dBm
V
V
0.0012
0.009
dB/°C
dB/°C
33||0.59
70
62
57
Ω||pF
dB
dB
dB
−1
−58
−24.3
25
0.86
1.59
dBm
dBm
mV/dB
dBm
V
V
0.019
0.0096
dB/°C
dB/°C
60
58
3
−55
−23
37
1.06
1.78
dB
dB
dBm
dBm
mV/dB
dBm
V
V
0.032
0.0078
dB/°C
dB/°C
4.9
25
60
60
45
90
10
12
V
mV
mA
MHz
MHz
nV/√Hz
ns
ns
Enhanced Product
Parameter
VSET INTERFACE
Nominal Input Range
Logarithmic Scale Factor
Bias Current Source
TEMPERATURE REFERENCE
Output Voltage
Temperature Slope
Current Source/Sink
POWER-DOWN INTERFACE
Logic Level to Enable Device
ENBL Current When Enabled
ENBL Current When Disabled
POWER INTERFACE
Supply Voltage
Quiescent Current
vs. Temperature
Supply Current when Disabled
vs. Temperature
1
2
AD8318-EP
Test Conditions/Comments
VSET (Pin 7)
PIN = 0 dBm; measurement mode 2
PIN = −65 dBm; measurement mode2
PIN = −10 dBm; VSET = 2.1 V
TEMP (Pin 13)
TA = 25°C, RLOAD = 10 kΩ
−55°C ≤ TA ≤ +105°C, RLOAD = 10 kΩ
TA = 25°C
ENBL (Pin 16)
Min
Controller mode.
Gain = 1. For other gains, see the AD8318 data sheet.
Rev. 0 | Page 5 of 12
Max
0.5
2.1
−0.04
2.5
0.57
0.6
2
10/0.1
4.5
50
5
68
150
260
350
Unit
V
dB/mV
μA
0.63
1.7
<1
15
ENBL = 5 V
ENBL = 0 V; sourcing
VPSI (Pin 3 and Pin 4), VPSO (Pin 9)
ENBL = 5 V
−55°C ≤ TA ≤ +105°C
ENBL = 0 V, total currents for VPSI and VPSO
−55°C ≤ TA ≤ +105°C
Typ
V
mV/°C
mA
V
μA
μA
5.5
82
V
mA
μA/°C
μA
μA
AD8318-EP
Enhanced Product
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter
Supply Voltage: Pin VPSO, Pin VPSI
ENBL, VSET Voltage
Input Power (Single-Ended, re: 50 Ω)
Internal Power Dissipation
θJA 1
Maximum Junction Temperature
Operating Temperature Range
Storage Temperature Range
1
Rating
5.7 V
0 to VPOS
12 dBm
0.73 W
55°C/W
130°C
−55°C to +105°C
−65°C to +150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
With package die paddle soldered to thermal pads with vias connecting
to inner and bottom layers.
Rev. 0 | Page 6 of 12
Enhanced Product
AD8318-EP
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
12
11
10
9
CMIP CMIP TADJ VPSO
13
TEMP
14
INHI
15
INLO
CMOP 8
VSET 7
AD8318-EP
ENBL
CLPF 5
CMIP CMIP
1
2
VPSI
VPSI
3
4
NOTES
1. THE EXPOSED PADDLE IS INTERNALLY
CONNECTED TO CMIP (SOLDER TO GROUND).
10783-002
16
VOUT 6
Figure 3. Pin Configuration
Table 3. Pin Function Descriptions
Pin No.
1, 2, 11, 12
3, 4
5
6
7
8
9
10
13
14
15
16
Mnemonic
CMIP
VPSI
CLPF
VOUT
VSET
CMOP
VPSO
TADJ
TEMP
INHI
INLO
ENBL
Paddle
Description
Device Common (Input System Ground).
Positive Supply Voltage (Input System): 4.5 V to 5.5 V. Voltage on Pin 3, Pin 4, and Pin 9 should be equal.
Loop Filter Capacitor.
Measurement and Controller Output.
Setpoint Input for Controller Mode or Feedback Input for Measurement Mode.
Device Common (Output System Ground).
Positive Supply Voltage (Output System): 4.5 V to 5.5 V. Voltage on Pin 3, Pin 4, and Pin 9 should be equal.
Temperature Compensation Adjustment.
Temperature Sensor Output.
RF Input. Nominal input range: −60 dBm to 0 dBm (re: 50 Ω), ac-coupled.
RF Common for INHI. AC-coupled RF common.
Device Enable. Connect to VPSI for normal operation. Connect pin to ground for disable mode.
The Exposed Paddle is Internally Connected to CMIP (Solder to Ground).
Rev. 0 | Page 7 of 12
AD8318-EP
Enhanced Product
TYPICAL PERFORMANCE CHARACTERISTICS
2.4
6
5
2.2
5
2.0
4
2.0
4
1.8
3
1.8
3
1.6
2
1.6
2
1.4
1
1.4
1
1.2
0
1.2
0
1.0
–1
1.0
–1
0.8
–2
0.8
–2
0.6
–3
0.6
–3
0.4
–4
0.4
–4
0.2
–5
0.2
–5
–25
–15
–5
5
15
PIN (dBm)
–35
–25
–15
–5
5
15
VOUT (V)
Figure 7. VOUT and Log Conformance vs. Input Amplitude at 3.6 GHz,
Typical Device, RTADJ = 51 Ω
6
2.4
6
2.2
5
2.2
5
2.0
4
2.0
4
1.8
3
1.8
3
1.6
2
1.6
2
1.4
1
1.4
1
1.2
0
1.2
0
1.0
–1
1.0
–1
0.8
–2
0.8
–2
0.6
–3
0.6
–3
0.4
–4
0.4
–4
0.2
–5
0.2
–5
0
–65
–6
–55
–45
–35
–25
–15
–5
5
VOUT (V)
ERROR (dB)
2.4
0
–65
10783-005
VOUT (V)
–45
PIN (dBm)
Figure 4. VOUT and Log Conformance vs. Input Amplitude at 900 MHz,
Typical Device
15
PIN (dBm)
–6
–55
–45
–35
–25
–15
–5
5
15
PIN (dBm)
Figure 5. VOUT and Log Conformance vs. Input Amplitude at 1.9 GHz,
Typical Device
Figure 8. VOUT and Log Conformance vs. Input Amplitude at 5.8 GHz,
Typical Device, RTADJ = 1000 Ω
6
2.4
6
2.2
5
2.2
5
2.0
4
2.0
4
1.8
3
1.8
3
1.6
2
1.6
2
1.4
1
1.4
1
1.2
0
1.2
0
1.0
–1
1.0
–1
0.8
–2
0.8
–2
0.6
–3
0.6
–3
0.4
–4
0.4
–4
0.2
–5
0.2
–5
0
–65
–6
–55
–45
–35
–25
–15
–5
5
15
PIN (dBm)
VOUT (V)
ERROR (dB)
2.4
10783-006
VOUT (V)
–6
–55
10783-007
–35
ERROR (dB)
–45
10783-008
–55
0
–65
Figure 6. VOUT and Log Conformance vs. Input Amplitude at 2.2 GHz,
Typical Device
0
–65
ERROR (dB)
–6
–6
–55
–45
–35
–25
–15
–5
5
15
PIN (dBm)
Figure 9. VOUT and Log Conformance vs. Input Amplitude at 8 GHz,
Typical Device
Rev. 0 | Page 8 of 12
10783-009
0
–65
ERROR (dB)
6
2.2
ERROR (dB)
2.4
10783-004
VOUT (V)
VPOS = 5 V; TA = +25°C, −55°C, +105°C; CLPF = 220 pF; RTADJ = 500 Ω; unless otherwise noted. Colors: +25°C  Black; −55°C  Blue;
+105°C  Red.
Enhanced Product
AD8318-EP
6
5
5
4
4
3
3
2
2
–1
–2
–3
–3
–4
–4
–5
–5
–55
–45
–35
–25
–15
–5
5
15
PIN (dBm)
Figure 10. Distribution of Error over Temperature After Ambient
Normalization vs. Input Amplitude at 900 MHz for at Least 70 Devices
–6
–65
5
4
4
3
3
2
2
ERROR (dB)
6
5
0
–1
–3
–4
–4
–5
–5
–35
–25
–15
–5
5
15
PIN (dBm)
Figure 11. Distribution of Error at Temperature After Ambient
Normalization vs. Input Amplitude at 1900 MHz for at Least 70 Devices
–6
–65
5
4
4
3
3
2
2
ERROR (dB)
6
–1
–3
–4
–4
–5
–5
–25
PIN (dBm)
–15
–5
5
15
–6
–65
10783-012
–35
–45
–35
–25
–15
–5
5
15
0
–2
–45
–55
–1
–3
–55
15
1
–2
–6
–65
5
Figure 14. Distribution of Error at Temperature After Ambient
Normalization vs. Input Amplitude at 5.8 GHz for at Least 70 Devices,
RTADJ = 1000 Ω
5
0
–5
PIN (dBm)
6
1
–15
0
–2
–45
–25
–1
–3
–55
–35
1
–2
–6
–65
–45
Figure 13. Distribution of Error at Temperature After Ambient
Normalization vs. Input Amplitude at 3.6 GHz for at Least 70 Devices,
RTADJ = 51 Ω
6
1
–55
PIN (dBm)
10783-011
ERROR (dB)
0
–1
–2
–6
–65
ERROR (dB)
1
10783-014
0
–55
–45
–35
–25
PIN (dBm)
Figure 12. Distribution of Error at Temperature After Ambient
Normalization vs. Input Amplitude at 2.2 GHz for at Least 70 Devices
–15
–5
5
15
10783-115
1
10783-013
ERROR (dB)
6
10783-010
ERROR (dB)
VPOS = 5 V; TA = +25°C, −55°C, +105°C; CLPF = 220 pF; RTADJ = 500 Ω; unless otherwise noted. Colors: +25°C  Black; −55°C  Blue;
+105°C  Red.
Figure 15. Distribution of Error at Temperature After Ambient
Normalization vs. Input Amplitude at 8 GHz for at Least 70 Devices
Rev. 0 | Page 9 of 12
AD8318-EP
Enhanced Product
VPOS = 5 V; TA = +25°C, −55°C, +105°C; CLPF = 220 pF; RTADJ = 500 Ω; unless otherwise noted. Colors: +25°C  Black; −55°C  Blue;
+105°C  Red.
j1
j2
j0.5
10k
NOISE SPECTRAL DENSITY (nV/ Hz)
RF OFF
j0.2
0.2
0.5
1
2
0.1GHz
8GHz
5.8GHz
0.9GHz
–j0.2
1.9GHz
3.6GHz
2.2GHz
–j0.5
1k
–40dBm
–20dBm
100
–10dBm
0dBm
10783-015
–j2
START FREQUENCY = 0.1GHz
STOP FREQUENCY = 8GHz
–j1
10
1
3
10
30
100
300
1k
3k
10k
FREQUENCY (kHz)
Figure 19. Noise Spectral Density of Output; CLPF = Open
Figure 16. Input Impedance vs. Frequency; No Termination Resistor on
INHI, ZO = 50 Ω
0.07
1k
0.05
INCREASING VENBL
0.03
0.02
0.01
1.5
1.6
1.7
1.8
VENBL (V)
10
10783-016
0
1.4
100
1
3
10
100
300
1k
3k
10k
Figure 20. Noise Spectral Density of Output Buffer (from CLPF to VOUT);
CLPF = 0.1 μF
Figure 17. Supply Current vs. Enable Voltage
2.2
VOUT
VOUT (V)
200mV/VERTICAL
DIVISION
PULSED RF INPUT 0.1GHz,
–10dBm
GND
1.6
1.8
1.2
1.6
0.8
1.4
0.4
1.2
0
1.0
–0.4
0.8
–0.8
0.6
–1.2
0.4
–1.6
0.2
–65
10783-017
2.0
+25°C
–40°C
+85°C
2.0
20ns PER HORIZONTAL DIVISION
30
FREQUENCY (kHz)
–55
–45
–35
–25
–15
–5
5
–2.0
15
PIN (dBm)
Figure 18. VOUT Pulse Response Time; Pulsed RF Input 0.1 GHz, –10 dBm;
CLPF = Open
Rev. 0 | Page 10 of 12
Figure 21. Output Voltage Stability vs. Supply Voltage at 1.9 GHz
When VP Varies by 10%, Multiple Devices
ERROR (dB)
DECREASING V ENBL
10783-020
0.04
10783-019
NOISE SPECTRAL DENSITY (nV/ Hz)
0.06
SUPPLY CURRENT (A)
–60dBm
10783-018
0
Enhanced Product
AD8318-EP
OUTLINE DIMENSIONS
PIN 1
INDICATOR
0.35
0.30
0.25
0.65
BSC
PIN 1
INDICATOR
16
13
1
12
EXPOSED
PAD
2.25
2.10 SQ
1.95
9
TOP VIEW
0.80
0.75
0.70
0.70
0.60
0.50
4
8
0.25 MIN
BOTTOM VIEW
0.05 MAX
0.02 NOM
COPLANARITY
0.08
0.20 REF
SEATING
PLANE
5
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
COMPLIANT TO JEDEC STANDARDS MO-220-WGGC.
111908-A
4.10
4.00 SQ
3.90
Figure 22. 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ]
4 mm × 4 mm Body, Very Very Thin Quad
(CP-16-23)
Dimensions shown in millimeters
ORDERING GUIDE
Model 1, 2
AD8318SCPZ-EP-RL7
AD8318SCPZ-EP-R2
AD8318SCPZ-EP-WP
AD8318-EP-EVALZ
1
2
Temperature
Range
−55°C to +105°C
−55°C to +105°C
−55°C to +105°C
Package Description
16-Lead Lead Frame Chip Scale Package [LFCSP_WQ]
16-Lead Lead Frame Chip Scale Package [LFCSP_WQ]
16-Lead Lead Frame Chip Scale Package [LFCSP_WQ]
Evaluation Board
Z = RoHS Compliant Part.
WP = waffle pack.
Rev. 0 | Page 11 of 12
Package Option
CP-16-23
CP-16-23
CP-16-23
Ordering
Quantity
1,500
250
64
AD8318-EP
Enhanced Product
NOTES
©2012 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D10783-0-7/12(0)
Rev. 0 | Page 12 of 12