Evaluation Board for 12-/10-Bit, 8 Channel
Parallel ADCs with a Sequencer
EVAL-AD7938CB/EVAL-AD7939CB/EVAL-AD7938-6CB
FEATURES
On-board components for this evaluation board include:
Full featured evaluation boards for the AD7938, AD7939,
and AD7938-6 devices
Evaluation control board (EVAL-CONTROL-BRD2) compatible
Standalone capability
On-board analog buffering and voltage reference
On-board single-ended-to-differential conversion
Various linking options
PC software for control and data analysis when used with
EVAL-CONTROL-BRD2
•
One AD780, which is a pin-programmable +2.5 V or +3 V
ultra high precision band gap reference
•
One AD713 quad op amp
•
One AD8022 dual op amp
•
Six AD8021 single op amps
•
Two AD8138 differential amplifiers
•
One P174FCT digital buffer
GENERAL DESCRIPTION
Various link options are provided in Table 1.
This data sheet describes the evaluation boards used to test the
AD7938, AD7939, and AD7938-6 devices. These devices are 12and 10-bit, high speed, low power successive approximation
ADCs. These parts operate from a single 2.7 V to 5.25 V power
supply and feature throughput rates of up to 1.5 MSPS.
This evaluation board has a 96-way connector, which is
compatible with the EVAL-CONTROL-BRD2, which is also
available from Analog Devices, Inc. External sockets are
provided for various signals, including the VREF input, analog
inputs, and digital inputs and outputs. Note that the EVALCONTROL-BRD2 operates with all Analog Devices evaluation
boards with part numbers ending in the letters CB.
The AD7938/AD7939 and AD7938-6 device data sheets should
be used in conjunction with this data sheet.
FUNCTIONAL BLOCK DIAGRAM
S/E TO DIFF
CONVERSION USING
AD8138
BIPOLAR
SINGLE-ENDED
INPUT
S/E TO DIFF
CONVERSION USING
AD8138
VDD
VDRIVE
SINGLE-ENDED
INPUT BUFFERING
UNIPOLAR SINGLE ENDED INPUTS
AD7938/AD7939/
AD7938-6
VIN0
EIGHT SINGLE-ENDED
INPUTS OR FOUR
DIFFERENTIAL/PSEUDO
DIFFERENTIAL PAIRS
DB0 TO
DB11
DATA BUS
VIN1
CONTROL LINES
CLKIN
RD
WR
VIN8
VREF
EXTERNAL
VREF
CS
CONVST
BUSY
EXTERNAL CONNECTORS
POWER
SUPPLY
CIRCUITS
06213-001
BIPOLAR
SINGLE-ENDED
INPUT
EXTERNAL SUPPLY
UNIPOLAR
OUTPUT
96-WAY EDGE CONNECTOR
BIPOLAR INPUT
OPTIONAL BIAS-UP
CIRCUITRY FOR
SE/PDIFF
OPERATION
Figure 1.
Rev. 0
Evaluation boards are only intended for device evaluation and not for production purposes.
Evaluation boards as supplied “as is” and without warranties of any kind, express, implied, or
statutory including, but not limited to, any implied warranty of merchantability or fitness for a
particular purpose. No license is granted by implication or otherwise under any patents or other
intellectual property by application or use of evaluation boards. Information furnished by Analog
Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use, nor for any infringements of patents or other rights of third parties that may result
from its use. Analog Devices reserves the right to change devices or specifications at any time
without notice. Trademarks and registered trademarks are the property of their respective owners.
Evaluation boards are not authorized to be used in life support devices or systems.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2006 Analog Devices, Inc. All rights reserved.
EVAL-AD7938CB/EVAL-AD7939CB/EVAL-AD7938-6CB
TABLE OF CONTENTS
Features .............................................................................................. 1
Sockets ......................................................................................... 16
General Description ......................................................................... 1
Evaluation Board Software............................................................ 17
Functional Block Diagram .............................................................. 1
Installing the Software ............................................................... 17
Revision History ............................................................................... 2
Software Overview ..................................................................... 17
Evaluation Board Hardware ............................................................ 3
Checking the EVAL-CONTROL-BRD2.................................. 19
Initial Setup Conditions .............................................................. 8
Using the Software ..................................................................... 19
Differential Mode ......................................................................... 8
Taking Samples ........................................................................... 20
Single-Ended Mode.................................................................... 10
Software Configuration Files: ................................................... 20
Pseudo Differential Mode ......................................................... 12
Evaluation Board Schematics and Artwork................................ 21
Using the Bias Up Circuit.......................................................... 12
Ordering Information.................................................................... 26
Standalone Mode........................................................................ 13
Bill of Materials........................................................................... 26
Interfacing the Evaluation Boards............................................ 15
Ordering Guide .......................................................................... 27
Test Points.................................................................................... 16
ESD Caution................................................................................ 27
Connectors .................................................................................. 16
REVISION HISTORY
10/06—Revision 0: Initial Version
Rev. 0 | Page 2 of 28
EVAL-AD7938CB/EVAL-AD7939CB/EVAL-AD7938-6CB
EVALUATION BOARD HARDWARE
Before applying power and signals to the evaluation board, ensure that all links are properly set per the required operating mode.
The evaluation board has over 60 available link options. These options must be set for the required operating configuration. The
functions of the options are outlined in Table 1.
Table 1. Link Option Functions
Link No.
LK1
LK2
LK3
LK4
LK5
LK6
LK7
LK8
LK9
LK10
LK11
LK12
LK13
LK14
Function
Selects the source of the VDD +5 V supply used to supply the AD8138 differential amplifiers.
In Position A, the VDD is supplied from the EVAL-CONTROL-BRD2.
In Position B, the VDD must be supplied from an external source via the power connector J3.
This link option selects the source of the VSS −5 V supply used to supply the AD8138 differential amplifiers.
In Position A, the VSS is supplied from the EVAL-CONTROL-BRD2.
In Position B, the VSS must be supplied from an external source via the power connector J3.
This link option selects the source of the VDD supply for the AD7938/AD7939/AD7938-6.
In Position A, VDD is supplied from the EVAL-CONTROL-BRD2.
In Position B, VDD must be supplied from an external source via J2.
This link option selects the source of the VDRIVE supply for the digital interface.
In Position A, VDRIVE is tied to VDD.
In Position B, VDRIVE is supplied via the EVAL-CONTROL-BRD2.
In Position C, VDRIVE must be supplied from an external source via J4.
This link selects the source of the WR input to the ADC.
In Position A, WR is supplied by the EVAL-CONTROL-BRD2.
In Position B, WR must be supplied from an external source via P16.
This link selects where the BUSY output from the ADC appears.
In Position A, the BUSY output may be read by the EVAL-CONTROL-BRD2.
In Position B, the BUSY may be read via the external socket, P15.
This link selects the source of the CONVST input to the ADC.
In Position A, CONVST is supplied by the EVAL-CONTROL-BRD2.
In Position B, CONVST must be supplied from an external source via P14.
This link selects the source of the RD input to the ADC.
In Position A, RD is supplied by the EVAL-CONTROL-BRD2.
In Position B, RD must be supplied from an external source via P13.
This link selects the source of the CS input to the ADC.
In Position A, CS is supplied by the EVAL-CONTROL-BRD2.
In Position B, CS must be supplied from an external source via P12.
This link selects the state of the W/B input.
In Position A, W/B is tied low.
In Position B, W/B is tied high.
This link selects the source of the CLKIN input to the ADC.
In Position A, CLKIN is supplied by the EVAL-CONTROL-BRD2.
In Position B, CLKIN must be supplied from an external source via P11.
If an external reference is being used, place this link in Position A.
If an internal reference is being used, place this link in Position B.
This link selects the input to the VIN4 pin on the ADC.
In Position A, the input is coming from Pin VIN4, either in singled-ended mode or as one channel of a differential pair.
In Position B, the input to the ADC is tied to ground.
This link selects the input to VIN0 pin on the ADC.
In Position A, the input is coming from Pin VIN0, either in singled-ended mode or as one channel of a differential pair.
In Position B, the input to the ADC is tied to ground.
Rev. 0 | Page 3 of 28
EVAL-AD7938CB/EVAL-AD7939CB/EVAL-AD7938-6CB
Link No.
LK15
LK16
LK17
LK18
LK19
LK20
LK21
LK22
LK23
LK24
LK25
LK26
LK27
Function
This link selects the input to VIN1 on the ADC.
In Position A, the input is coming from VIN1, either in singled-ended mode or as one channel of a differential pair.
In Position B, the input to the ADC is tied to ground.
This link selects the input to VIN2 on the ADC
In Position A, the input is coming from VIN2, either in singled-ended mode or as one channel of a differential pair.
In Position B, the input to the ADC is tied to ground.
This link selects the analog input to be applied to the buffer, U8, which is used when operating in single-ended mode and
when using VIN3 to VIN7.
If the single-ended input applied to VIN3 to VIN7 is unipolar, this link should be in Position A, and the analog input should be
applied at P10 with LK33 in Position B.
If the single-ended input applied to VIN3 to VIN7 is bipolar, this link should be in Position B and the analog input should be
biased up using the bias circuit by applying it to P18.
This link option adds a 50 Ω termination to AGND at the VIN3 to VIN7 socket (P10) for the single-ended input.
This link should be inserted if a 50 Ω termination is required on the analog input.
This link is used to choose between a single-ended analog input or a fully differential pair.
If the analog input applied to VIN2 to VIN6 is a single-ended analog input, then LK19 should be in Position B as this input is
applied to the op amp buffer.
If the analog input applied to VIN2 through VIN6 is part of a differential pair with VIN3 through VIN7, then LK19 should be in
Position A as this input is applied to the AD8138 differential amplifier (U7).
This link selects the analog input to be applied to the buffer, U6, which is used when operating in single-ended mode or
pseudo differential mode and when using VIN2 through VIN6.
If the single-ended input applied to VIN2 through VIN6 is unipolar, this link should be in Position A, and the analog input should
be applied at P7 with LK19 in Position B.
If the single-ended input applied to VIN2 is bipolar, this link should be in Position B and the analog input should be biased up
using the bias circuit by applying it to P18.
This link selects the analog input to be applied to the buffer, U5, which is used when operating in single-ended mode and
when using VIN1 through VIN5.
If the single-ended input applied to VIN1 through VIN5 is unipolar, this link should be in Position A, and the analog input should
be applied at P3 with LK34 in Position A.
If the single-ended input applied to VIN1 is bipolar, this link should be in Position B and the analog input should be biased up
using the bias circuit by applying it to P18.
This link option adds a 50 Ω termination to AGND at the VIN1 through VIN5 socket (P3) for the single-ended input.
This link should be inserted if a 50 Ω termination is required on the analog input.
This link option adds a 50 Ω termination to AGND at the VIN2 through VIN6 socket (P7) for the single-ended input.
This link should be inserted if a 50 Ω termination is required on the analog input.
This link selects the input to the input of the AD8138 differential amplifier (U4).
If the user applies a fully differential signal to VIN0 and VIN1 or VIN4 and VIN5, and only requires buffering of this signal before its
applied to the ADC, then LK24 should be in Position A.
When applying a single-ended input to VIN0 through VIN4 requiring the use of the AD8138 to perform single-ended-todifferential conversion, this link should be in Position B. In this case, no input is applied to VIN1 through VIN5.
This link selects the input to the input of the AD8138 differential amplifier (U7).
If the user applies a fully differential signal to VIN2 and VIN3 or VIN6 and VIN7, and only requires buffering of this signal before its
applied to the ADC, then Link 16 should be in Position A.
When applying a single-ended input to VIN2 through VIN6 requiring the use of the AD8138 to perform single-ended-todifferential conversion, this link should be in Position B. In this case, no input is applied to VIN3.
This link option adds a 50 Ω termination to AGND at the VIN1 through VIN5 socket (P1) for the single-ended input.
This link should be inserted if a 50 Ω termination is required on the analog input.
This link is used to choose between a single-ended analog input or a fully differential pair.
If the analog input applied to VIN0 through VIN4 is a single-ended analog input then LK27 should be in Position A as this input is
applied to the op amp buffer.
If the analog input applied to VIN0 through VIN4 is part of a differential pair with VIN1 through VIN5, then LK27 should be in
Position B as this input is applied to the AD8138 differential amplifier (U4).
Rev. 0 | Page 4 of 28
EVAL-AD7938CB/EVAL-AD7939CB/EVAL-AD7938-6CB
Link No.
LK28
LK29
Function
This link selects the analog input to be applied to the buffer, U2, which is used when operating in single-ended mode or
pseudo differential mode and when using VIN0 through VIN4.
If the single-ended input applied to VIN0 through VIN4 is unipolar, this link should be in Position A, and the analog input should
be applied at P1 with LK27 in Position A.
If the single-ended input applied to VIN0 is bipolar, this link should be in Position B and the analog input should be biased up
using the bias circuit by applying it to P18.
This link option selects the source of the VIN0 through VIN4 analog input to be applied to the ADC.
In Position A, a single-ended, buffered signal is applied to VIN0 through VIN4.
In Position B, VIN0 through VIN4 is supplied from the positive output of the AD8138 (U4) differential amplifier to provide half a
differential pair with VIN1 through VIN5.
In Position C, an external VIN0 through VIN4 is applied to the ADC via P4.
LK30
In Position D, VIN0 through VIN4 is tied to AGND. Do this when VIN0 through VIN4 is not being used and when power supplies are
first applied to the board.
This link option selects the source of the VIN1 through VIN5 analog input to be applied to the ADC.
In Position A, a single-ended, buffered signal is applied to VIN1 through VIN5.
In Position B, VIN1 through VIN5 is supplied from the negative output of the AD8138 (U4) differential amplifier to provide half a
differential pair with VIN0 through VIN4.
In Position C, an external VIN1 through VIN5 is applied to the ADC via P5.
LK31
In Position D, VIN1 through VIN5 is tied to AGND. Do this when VIN1 through VIN5 is not being used and when power supplies are
first applied to the board.
This link option selects the source of the VIN2 through VIN6 analog input to be applied to the ADC.
In Position A, a single-ended, buffered signal is applied to VIN2 through VIN6.
In Position B, VIN2 through VIN6 is supplied from the positive output of the AD8138 (U7) differential amplifier to provide half a
differential pair with VIN3 through VIN7.
In Position C, an external VIN2 through VIN6 is applied to the ADC via P6.
LK32
In Position D, VIN2 through VIN6 is tied to AGND. Do this when VIN2 through VIN6 is not being used and when power supplies are
first applied to the board.
This link option selects the source of the VIN3 through VIN7 analog input to be applied to the ADC.
In Position A, a single-ended, buffered signal is applied to VIN3 through VIN7.
In Position B, VIN3 through VIN7 is supplied from the negative output of the AD8138 (U7) differential amplifier to provide half a
differential pair with VIN2 through VIN6.
In Position C, an external VIN3 through VIN7 is applied to the ADC via P9.
LK33
LK34
LK35
LK36
In Position D, VIN3 through VIN7 is tied to AGND. Do this when VIN3 through VIN7 is not being used and when power supplies are
first applied to the board.
This link is used to choose between a single-ended analog input or a fully differential pair.
If the analog input applied to VIN3 through VIN7 is part of a differential pair with VIN2 through VIN6, then LK33 should be in
Position A as this input is applied to the AD8138 differential amplifier.
If the analog input applied to VIN3 through VIN7 is a single-ended analog input then LK33 should be in Position B as this input is
applied to the op amp buffer.
This link is used to choose between a single-ended analog input or a fully differential pair.
If the analog input applied to VIN1 through VIN5 is a single-ended analog input then LK34 should be in Position A as this input is
applied to the op amp buffer.
If the analog input applied to VIN1 through VIN5 is part of a differential pair with VIN0, then LK34 should be in Position B as this
input is applied to the AD8138 differential amplifier.
This link selects the input to the VOCM pin (common-mode input) of the AD8138 differential amplifier (U7).
When in Position A, an external common-mode input must be applied via P8.
When in Position B, VREF is applied to the VOCM pin of the AD8138 (U7).
When in Position C, VREF/2 is applied to the VOCM pin of the AD8138 (U7).
This link selects the input to the VOCM pin (common-mode input) of the AD8138 differential amplifier (U4).
When in Position A, an external common-mode input must be applied via P2.
When in Position B, VREF is applied to the VOCM pin of the AD8138 (U4).
When in Position C, VREF/2 is applied to the VOCM pin of the AD8138 (U4).
Rev. 0 | Page 5 of 28
EVAL-AD7938CB/EVAL-AD7939CB/EVAL-AD7938-6CB
Link No.
LK37
LK38
LK39
LK40
LK41
LK42
LK43
LK44
LK45
LK46
LK53
LK54
LK55
LK56
LK57
LK58
LK59
Function
This link selects the input to VIN3 pin on the ADC.
In Position A, the input is coming from VIN3, either in singled-ended mode or as one channel of a differential pair.
In Position B, the input to the ADC is tied to ground.
This link selects whether the signal is applied to VIN0 or VIN4.
In Position A, the signal is applied to VIN0.
In Position B, the signal is applied to VIN4.
This link selects the input to VIN5 on the ADC.
In Position A, the input is coming from VIN5, either in singled-ended mode or as one channel of a differential pair.
In Position B, the input to the ADC is tied to ground.
This link selects the input to VIN6 pin on the ADC.
In Position A, the input is coming from VIN6, either in single-ended mode or as one channel of a differential pair.
In Position B, the input to the ADC is tied to ground.
This link selects the input to VIN7 pin on the ADC.
In Position A, the input is coming from VIN7, either in single-ended mode or as one channel of a differential pair.
In Position B, the input to the ADC is tied to ground.
This link selects whether the signal is applied to VIN1 or VIN5.
In Position A, the signal is applied to VIN1.
In Position B, the signal is applied to VIN5.
This link selects whether the signal is applied to VIN2 or VIN6.
In Position A, the signal is applied to VIN2.
In Position B, the signal is applied to VIN6.
This link selects whether the signal is applied to VIN3 or VIN7.
In Position A, the signal is applied to VIN3.
In Position B, the signal is applied to VIN7.
This link option adds a 50 Ω termination to AGND at the COM1 socket (P2) for the input to VOCM pin (common-mode input) of
the AD8138 differential amplifier (U4).
This link should be inserted if a 50 Ω termination is required on the input to VOCM pin (common-mode input) of the AD8138
differential amplifier (U4) with LK36 in Position A.
This link option adds a 50 Ω termination to AGND at the COM2 socket (P2) for the input to VOCM pin (common-mode input) of
the AD8138 differential amplifier (U4).
This link should be inserted if a 50 Ω termination is required on the input to VOCM pin (common-mode input) of the AD8138
differential amplifier (U4) with LK35 in Position A.
Always insert.
Always insert.
In Position A, REF is buffered to supply VREF to the common-mode voltage of the differential amplifier and to the bias up
circuit.
In Position B, REF is divided down by two, and then buffered to supply VREF/2 to the common-mode voltage of the AD8138
differential amplifier.
When VREF/2 is not used, insert LK56 to ensure that the inputs to U13-C are not floating.
This link chooses the source of an external reference input.
In Position A, an external reference should be applied via P17.
In Position B, the VOUT of the AD780 reference chip is applied to the VREF circuit.
In Position C, three-quarters of the AD780 VOUT is applied to the VREF circuit. The resistors R35 and R52 can be changed if the
user requires an alternative reference input.
This link determines whether the output of the AD780 reference chip is applied directly to LK57 or if it is divided down before
being applied to LK57.
In Position A, the output of the AD780 is applied to LK57.
In Position B, the output of the AD780 is divided down before being applied to LK57.
This link option controls the program pin of the AD780 reference.
When this pin is inserted, the AD780 output voltage is set to 3 V.
When this pin is removed, the AD780 output voltage is set to 2.5 V.
Rev. 0 | Page 6 of 28
EVAL-AD7938CB/EVAL-AD7939CB/EVAL-AD7938-6CB
Link No.
LK60
Function
This link option determines the source of the VCC (+5 V) digital supply.
When inserted, VCC is supplied via the EVAL-CONTROL-BRD2.
When removed, VCC must be supplied to the external connector, J5.
LK61
This link selects the dc voltage to be applied to the bias up circuit, which is used when a single-ended, bipolar signal needs to
be converted to a unipolar signal.
In Position A, VREF is applied to the bias up circuit.
In Position B, the dc input to the bias up circuit is tied to AGND. Do this if the bias up circuit is not being used.
LK62
This link selects which portion of the VREF input is applied to the bias up circuit. The choice depends on the nature of the user's
analog input signal.
In Position A, one-fourth of the reference is applied to the bias up circuit
LK63
LK64
LK65
LK66
In Position B, one-half of the reference is applied to the bias up circuit. If the bias up circuit is not used, then this link can be
removed.
This link option adds a 50 Ω termination to AGND if a 50 Ω termination is required on the analog input.
This link option selects the source of the +12 V power supply.
In Position A, the +12 V is supplied by the EVAL-CONTROL-BRD2.
In Position B, the +12 V must be supplied from an external source via J6.
This link option selects the source of the −12 V power supply.
In Position A, the −12 V is supplied via the EVAL-CONTROL-BRD2.
In Position B, the −12 V must be supplied from an external source via J6.
When the reference output of the AD780 is not being divided down, this link should be inserted so that the input of U10 is not
floating.
Rev. 0 | Page 7 of 28
EVAL-AD7938CB/EVAL-AD7939CB/EVAL-AD7938-6CB
INITIAL SETUP CONDITIONS
This evaluation board can be operated in different modes. For
example, the evaluation board can be operated with the EVALCONTROL-BRD2 or it can be used it as a standalone board.
The board can either be setup to accept eight single-ended inputs,
four differential inputs, four pseudo differential inputs, or seven
pseudo differential inputs. The link settings for the different modes
of operation are detailed in Table 2 through Table 6.
The AD7938/AD7939/AD7938-6 can accept four fully
differential analog input pairs. These can either be applied as
two pairs to P1, P3 and P7, P10 or single-ended-to-differential
conversion can be performed on a single-ended input applied to
P1 and P7.
DIFFERENTIAL MODE
The link positions described in Table 2 are required for
operating the evaluation board in differential mode.
Table 2 outlines the default positions of all links when the board
is shipped. All the links are set so that all power supplies and
control signals are supplied by the EVAL-CONTROL-BRD2.
Initially, all analog inputs are tied to ground to ensure that they
are not floating on power up. Change these link positions
depending upon which analog inputs are used.
Table 2. Differential Mode — Powered and Controlled by the EVAL-CONTROL-BRD2
Link No.
LK1
LK2
LK3
LK4
LK5
LK6
LK7
LK8
LK9
LK10
LK11
LK12
LK13
Position
A
A
A
B
A
A
A
A
A
B
A
A
A
LK14
A
LK15
A
LK16
A
LK17
LK18
B
Inserted
LK19
LK20
LK21
LK22
A
B
B
Inserted
LK23
Inserted
LK24
B
LK25
B
LK26
Inserted
LK27
LK28
B
B
Function
VDD for the AD8138 amplifiers is supplied by the EVAL-CONTROL-BRD2.
VSS for the AD8138 amplifiers is supplied by the EVAL-CONTROL-BRD2.
VDD for the AD7938/AD7939/AD7938-6 ADCs is supplied by the EVAL-CONTROL-BRD2.
VDRIVE is supplied by the EVAL-CONTROL-BRD2.
WB is supplied by the EVAL-CONTROL-BRD2.
BUSY is read by the EVAL-CONTROL-BRD2.
CONVST is supplied by the EVAL-CONTROL-BRD2.
RD is supplied by the EVAL-CONTROL-BRD2.
CS is supplied by the EVAL-CONTROL-BRD2.
ADC is set up to operate in word mode.
CLKIN is supplied by the EVAL-CONTROL-BRD2.
An external reference is supplied to the VOUT pin from the AD780.
With LK13 in position A, a single-ended input or half a differential input is applied to VIN4. If VIN4 is not used, ground
VIN4 by installing LK13 in Position B.
With LK14 in position A, a single-ended input or half a differential input is applied to VIN0. If VIN0 is not used, ground
VIN0 by installing LK14 in Position B.
With LK15 in position A, a single-ended input or half a differential input is applied to VIN1. If VIN1 is not used, ground
VIN1 by installing LK15 in Position B.
With LK16 in position A, a single-ended input or half a differential input is applied to VIN2. If VIN2 is not used, ground
VIN2 by installing LK13 in Position B.
LK16 should be in Position B if VIN2 is not in use.
The input to U8 is tied to Vbiased, so it is not floating.
On power-up, the inputs to the op amps are tied to ground so they are not floating. Once a signal is applied to P10,
LK18 can be removed if a 50 Ω termination is not required.
If either a single-ended input or half a differential input is applied to VIN2 through VIN6 (P7).
The input to U6 is tied to Vbiased, so it is not floating.
The input to U5 is tied to Vbiased, so it is not floating.
On power-up, the inputs to the op amps are tied to ground so they are not floating. Once a signal is applied to P3,
LK22 can be removed if a 50 Ω termination is not required.
On power-up, the inputs to the op amps are tied to ground so they are not floating. Once a signal is applied to P7,
LK23 can be removed if a 50 Ω termination is not required.
If single-ended-to-differential conversion is being performed on a single-ended input applied to VIN0 through VIN4
(P1). This link should be placed in Position A if half a differential input is applied to P3.
If single-ended-to-differential conversion is being performed on a single-ended input applied to VIN2 through VIN6
(P7). This link should be placed in Position A if half a differential input is applied to P10.
On power-up, the inputs to the op amps are tied to ground so they are not floating. Once a signal is applied to P1,
LK26 can be removed if a 50 Ω termination is not required.
If either a single-ended input or half a differential input is applied to VIN0 through VIN4 (P1).
The input to U3 is tied to Vbiased, so it is not floating.
Rev. 0 | Page 8 of 28
EVAL-AD7938CB/EVAL-AD7939CB/EVAL-AD7938-6CB
Link No.
LK29
Position
D
LK30
D
LK31
D
LK32
D
LK33
Removed
LK34
Removed
LK35
LK36
LK37
B
B
A
LK38
LK39
A and B
A
LK40
A
LK41
A
LK42
LK43
LK44
LK45
A and B
A and B
A and B
Removed
LK46
Removed
LK53
LK54
LK55
LK56
LK57
LK58
LK59
LK60
LK61
LK62
LK63
LK64
LK65
LK66
Inserted
Inserted
A and B
Inserted
B
A
Removed
Inserted
B
Removed
Inserted
A
A
Inserted
Function
On power-up, the analog input applied to VIN0 and/or VIN4 of the ADC is tied to AGND so that it is not floating. Once
an analog input signal is applied to P1, VIN0 through VIN4 of the ADC should be connected to the positive output of
the AD8138 amplifier by placing LK29 in Position B.
On power-up, the analog input applied to VIN1 and/or VIN5 of the ADC is tied to AGND so that it is not floating. Once
an analog input signal is applied to P3, VIN1 through VIN5 of the ADC should be connected to the positive output of
the AD8138 amplifier by placing LK30 in Position B.
On power-up, the analog input applied to VIN2 and/or VIN6 of the ADC is tied to AGND so that it is not floating. Once
an analog input signal is applied to P7, VIN2 through VIN6 of the ADC should be connected to the positive output of
the AD8138 amplifier by placing LK31 in Position B.
On power-up, the analog input applied to VIN3 and/or VIN7 of the ADC is tied to AGND so that it is not floating. Once
an analog input signal is applied to P10, VIN3 through VIN7 of the ADC should be connected to the positive output of
the AD8138 amplifier by placing LK32 in Position B.
If single-ended-to-differential conversion is being performed on a single-ended input applied to VIN2 through VIN6
(P7).This link should be placed in Position A if half a differential input is applied to P10.
If single-ended-to-differential conversion is being performed on a single-ended input applied to VIN0 through VIN4
(P1). This link should be placed in Position B if half a differential input is applied to P3.
VREF is applied to the VOCM pin of the AD8138 differential amplifier to set up the common-mode voltage.
VREF is applied to the VOCM pin of the AD8138 differential amplifier to set up the common-mode voltage.
With LK37 in position A, a single-ended input or half a differential input is applied to VIN3. If VIN3 is not used, ground
VIN3 by installing LK37 in Position B.
Both A and B are inserted in LK38 when applying half a differential input signal to VIN0 and VIN4.
With LK39 in position A, a single-ended input or half a differential input is applied to VIN5. If VIN5 is not used, ground
VIN5 by installing LK39 in Position B.
With LK40 in position A, a single-ended input or half a differential input is applied to VIN6. If VIN6 is not used, ground
VIN6 by installing LK40 in Position B.
With LK41 in position A, a single-ended input or half a differential input is applied to VIN7. If VIN7 is not used, ground
VIN4 by installing LK41 in Position B.
Both A and B are inserted in LK42 when applying half a differential input signal to VIN1 and VIN5.
Both A and B are inserted in LK43 when applying half a differential input signal to VIN2 and VIN6.
Both A and B are inserted in LK44 when applying half a differential input signal to VIN3 and VIN7.
This link should be inserted if a 50 Ω termination is required on the input to VOCM pin (common-mode input) of the
AD8138 differential amplifier (U4) with LK36 in Position A.
This link should be inserted if a 50 Ω termination is required on the input to VOCM pin (common-mode input) of the
AD8138 differential amplifier (U7) with LK35 in Position A.
Always insert.
Always insert.
The inputs to U13-A-and-U13-B are not floating.
The input to U13-C is not floating.
VREF is supplied by the VOUT pin from the AD780.
The output of the AD780 supplies the reference to the ADC.
The output of the AD780 is 2.5 V.
VCC is supplied by the EVAL-CONTROL-BRD2.
DC input to the bias up circuit is tied to AGND .as it is not used in this mode.
Bias up circuit not used in this mode.
Analog input to the bias up circuit is tied to AGND as it is not used in this mode.
+12 V is supplied by the EVAL-CONTROL-BRD2.
−12 V is supplied by the EVAL-CONTROL-BRD2.
The output of the AD780 is not divided down so the input to U10 is tied to AGND.
Rev. 0 | Page 9 of 28
EVAL-AD7938CB/EVAL-AD7939CB/EVAL-AD7938-6CB
SINGLE-ENDED MODE
The AD7938/AD7939/AD7938-6 can operate with eight single-ended analog inputs. To operate the evaluation board in single-ended
mode, change the link positions as shown in Table 3. Initially, all analog inputs are tied to ground to ensure that they are not floating on
power up. Change the link positions depending on which analog inputs the links are using.
Table 3. Single-Ended Mode — Powered and Controlled by the EVAL-CONTROL-BRD2
Link No.
LK1
LK2
LK3
LK4
LK5
LK6
LK7
LK8
LK9
LK10
LK11
LK12
LK13
Position
A
A
A
B
A
A
A
A
A
B
A
A
A
LK14
A
LK15
A
LK16
A
LK17
LK18
A
Inserted
LK19
LK20
LK21
LK22
B
A
A
Inserted
LK23
Inserted
LK24
LK25
LK26
B
B
Inserted
LK27
LK28
LK29
A
A
D
LK30
D
LK31
D
LK32
D
LK33
LK34
B
A
Function
VDD for the AD8138 amplifiers is supplied by the EVAL-CONTROL-BRD2.
VSS for the AD8138 amplifiers is supplied by the EVAL-CONTROL-BRD2.
VDD for the AD7938/AD7939/AD7938-6 ADC is supplied by the EVAL-CONTROL-BRD2.
VDRIVE is supplied by the EVAL-CONTROL-BRD2.
WR is supplied by the EVAL-CONTROL-BRD2.
BUSY is read by the EVAL-CONTROL-BRD2.
CONVST is supplied by the EVAL-CONTROL-BRD2.
RD is supplied by the EVAL-CONTROL-BRD2.
CS is supplied by the EVAL-CONTROL-BRD2.
ADC is set up to operate in word mode.
CLKIN is supplied by the EVAL-CONTROL-BRD2.
An external reference is supplied to the VOUT pin from the AD780.
With LK13 in position A, a single-ended input or half a differential input is applied to VIN4. If VIN4 is not used,
ground VIN4 by installing LK13 in Position B.
With LK14 in position A, a single-ended input or half a differential input is applied to VIN0. If VIN0 is not used,
ground VIN0 by installing LK14 in Position B.
With LK15 in position A, a single-ended input or half a differential input is applied to VIN1. If VIN1 is not used,
ground VIN1 by installing LK15 in Position B.
With LK16 in position A, a single-ended input or half a differential input is applied to VIN2. If VIN2 is not used,
ground VIN2 by installing LK16 in Position B.
A single-ended, unipolar input must be supplied to VIN3 through VIN7 (P10) and is buffered by U8.
On power-up, the inputs to the op amps are tied to ground so they are not floating. Once a signal is applied to
P10, LK18 can be removed if a 50 Ω termination is not required.
The analog input signal applied to P7 is applied to the single buffer (U6).
A single-ended, unipolar input must be supplied to VIN2 through VIN6 (P7) and is buffered by U6.
A single-ended, unipolar input must be supplied to VIN1 through VIN5 (P3) and is buffered by U5.
On power-up, the inputs to the op amps are tied to ground so they are not floating. Once a signal is applied to
P3, LK22 can be removed if a 50 Ω termination is not required.
On power- up, the inputs to the op amps are tied to ground so they are not floating. Once a signal is applied to
P7, LK23 can be removed if a 50 Ω termination is not required.
The negative input to the AD8138 is tied to AGND.
The negative input to the AD8138 is tied to AGND.
On power-up, the inputs to the op amps are tied to ground so they are not floating. Once a signal is applied to
P1, LK26 can be removed if a 50 Ω termination is not required.
The analog input signal applied to P1 is applied to the single buffer (U3).
A single-ended, unipolar input must be supplied to VIN0 through VIN4 (P1) and is buffered by U3.
On power-up, the analog input applied to VIN0 and/or VIN4 of the ADC is tied to AGND so that it is not floating.
Once an analog input signal is applied to P1, VIN0 through VIN4 of the ADC should be connected to the positive
output of the AD8138 amplifier by placing LK29 in Position A.
On power-up, the analog input applied to VIN1 and/or VIN5 of the ADC is tied to AGND so that it is not floating.
Once an analog input signal is applied to P3, VIN1 through VIN5 of the ADC should be connected to the positive
output of the AD8138 amplifier by placing LK30 in Position A.
On power-up, the analog input applied to VIN2 and/or VIN6 of the ADC is tied to AGND so that it is not floating.
Once an analog input signal is applied to P7, VIN2 through VIN6 of the ADC should be connected to the positive
output of the AD8138 amplifier by placing LK31 in Position A.
On power-up, the analog input applied to VIN3 and/or VIN7 of the ADC is tied to AGND so that it is not floating.
Once an analog input signal is applied to P10, VIN3 through VIN7 of the ADC should be connected to the positive
output of the AD8138 amplifier by placing LK32 in Position A.
The analog input signal applied to P10 is applied to a single buffer (U8).
The analog input signal applied to P3 is applied to the single buffer (U5).
Rev. 0 | Page 10 of 28
EVAL-AD7938CB/EVAL-AD7939CB/EVAL-AD7938-6CB
Link No.
LK35
LK36
LK37
Position
A
A
A
LK38
LK39
A and B
A
LK40
A
LK41
A
LK42
LK43
LK44
LK45
A and B
A and B
A and B
Inserted
LK46
Inserted
LK53
LK54
LK55
LK56
LK57
LK58
LK59
LK60
LK61
LK62
LK63
LK64
LK65
LK66
Inserted
Inserted
A and B
Inserted
B
A
Removed
Inserted
B
Removed
Inserted
A
A
Inserted
Function
Since the AD8138 is not being used, tie the common-mode voltage to ground with LK46 inserted.
Since the AD8138 is not being used, tie the common-mode voltage to ground with LK45 inserted.
With LK37 in position A, a single-ended input or half a differential input is applied to VIN3. If VIN3 is not used,
ground VIN3 by installing LK37 in Position B.
Both A and B are inserted in LK38 when applying a single-ended input signal to VIN0 and VIN4.
With LK39 in position A, a single-ended input or half a differential input is applied to VIN5. If VIN5 is not used,
ground VIN5 by installing LK39 in Position B.
With LK40 in position A, a single-ended input or half a differential input is applied to VIN6. If VIN6 is not used,
ground VIN6 by installing LK40 in Position B.
With LK41 in position A, a single-ended input or half a differential input is applied to VIN7. If VIN7 is not used,
ground VIN7 by installing LK41 in Position B.
Both A and B are inserted in LK42 when applying a single-ended input signal to VIN1 and VIN5.
Both A and B are inserted in LK43 when applying a single-ended input signal to VIN2 and VIN6.
Both A and B are inserted in LK44 when applying a single-ended input signal to VIN3 and VIN7.
This link should be inserted if a 50 Ω termination is required on the input to the VOCM pin (common-mode input)
of the AD8138 differential amplifier (U4) with LK36 in Position A.
This link should be inserted if a 50 Ω termination is required on the input to the VOCM pin (common-mode input)
of the AD8138 differential amplifier (U7) with LK35 in Position A.
Always insert.
Always insert.
The inputs to U13-A and U13-B are not floating.
The input to U13-C is not floating.
VREF is supplied by the VOUT pin from the AD780.
The output of the AD780 supplies the reference to the ADC.
The output of the AD780 is 2.5 V.
VCC is supplied by the EVAL-CONTROL-BRD2.
DC input to the bias up circuit is tied to AGND as it is not used in this mode.
Bias up circuit not used in this mode.
Analog input to the bias up circuit is tied to AGND as it is not used in this mode.
+12 V is supplied by the EVAL-CONTROL-BRD2.
−12 V is supplied by the EVAL-CONTROL-BRD2.
The output of the AD780 is not divided down so the input to U10 is tied to AGND.
Rev. 0 | Page 11 of 28
EVAL-AD7938CB/EVAL-AD7939CB/EVAL-AD7938-6CB
PSEUDO DIFFERENTIAL MODE
The AD7938/AD7939/AD7938-6 can accept four pseudo differential analog input pairs. To operate the evaluation board in pseudo
differential mode, change the link positions as shown in Table 4. All other links are per Table 2.
Table 4. Pseudo Differential Mode — Powered and Controlled by the EVAL-CONTROL-BRD2
Link No.
LK1
Position
Removed
LK2
Removed
LK17
LK19
A
B
LK20
A
LK21
LK27
A
A
LK28
A
LK29
D
LK30
D
LK31
D
LK32
D
LK33
LK34
LK35
LK36
LK45
B
A
A
B
Inserted
LK46
Inserted
Function
No power supply is connected to +V of the AD8138 differential amplifiers as they are not used in pseudo
differential mode.
No power supply is connected to −V of the AD8138 differential amplifiers as they are not used in pseudo
differential mode.
If the dc portion of the pseudo differential input is to be buffered before being applied to VIN3 through VIN7.
The ac portion of the pseudo differential input applied to P7 is connected to the buffer U6 before being applied
to VIN2 through VIN6 of the ADC.
The ac portion of the pseudo differential input applied to P7 is connected to the buffer U6 before being applied
to VIN2 through VIN6 of the ADC.
If the dc portion of the pseudo differential input is to be buffered before being applied to VIN1 through VIN5.
The ac portion of the pseudo differential input applied to P1 is connected to the buffer U3 before being applied
to VIN0 through VIN4 of the ADC.
The ac portion of the pseudo differential input applied to P1 is connected to the buffer U3 before being applied
to VIN0 through VN4 of the ADC.
On power-up, the analog input applied to VIN0 and/or VIN4 of the ADC is tied to AGND so that it is not floating.
Once an analog input signal is applied to P1, VIN0 through VIN4 of the ADC should be connected to the positive
output of the AD8138 amplifier by placing LK29 in Position A.
On power-up, the analog input applied to VIN1 and/or VIN5 of the ADC is tied to AGND so that it is not floating.
Following power-up, keep these inputs tied to AGND. Another option is to apply an external dc voltage either
directly to P5 or to P3 and buffer it before it is applied to VIN1 through VIN5 in Position B or Position C.
On power-up, the analog input applied to VIN2 and/or VIN6 of the ADC is tied to AGND so that it is not floating.
Once an analog input signal is applied to P7, connect VIN2 through VIN6 of the ADCs to the positive output of the
AD8138 amplifier by placing LK31 in Position A.
On power-up, the analog input applied to VIN3 and/or VIN7 of the ADC is tied to AGND so that it is not floating.
Following power-up, either keep tied to AGND, or apply an external dc voltage either directly to P9 or to P10 and
buffer it before it is applied to VIN3 through VIN7 in Position B or Position C.
If the dc portion of the pseudo differential input is to be buffered before being applied to VIN3 through VIN7.
If the dc portion of the pseudo differential input is to be buffered before being applied to VIN1 through VIN5.
The AD8138 is not being used so the common-mode voltage needs to be tied to ground with LK46 inserted.
The AD8138 is not being used so the common-mode voltage needs to be tied to ground with LK45 inserted.
This link should be inserted if a 50 Ω termination is required on the input to the VOCM pin (common-mode input)
of the AD8138 differential amplifier (U4) with LK36 in Position A.
This link should be inserted if a 50 Ω termination is required on the input to the VOCM pin (common-mode input)
of the AD8138 differential amplifier (U7) with LK35 in Position A.
USING THE BIAS UP CIRCUIT
The bias up circuit can be used to bias up single-ended, bipolar signals to an appropriate dc voltage to make them unipolar to comply with
the input requirements of the ADC. See Table 5 below for links changes. All other links remain as shown in Table 3.
Table 5. Using the Bias Up Circuit in Single-ended or Pseudo Differential Mode
Link No.
LK17
Position
B
LK20
B
LK21
B
LK28
B
LK61
LK62
LK63
A
A or B
Removed
Function
While operating in single-ended mode, when applying a bipolar input signal to the bias up circuit, it is applied
to the buffer U8 via LK17.
While operating in single-ended mode, when applying a bipolar input signal to the bias up circuit, it is applied
to the buffer U8 via LK20.
While operating in single-ended mode, when applying a bipolar input signal to the bias up circuit, it is applied
to the buffer U8 via LK21.
While operating in single-ended mode, when applying a bipolar input signal to the bias up circuit, it is applied
to the buffer U8 via LK28.
VREF is applied to the bias up circuit to setup the dc bias voltage.
Depending on what bias voltage is required.
Bias up circuit is used.
Rev. 0 | Page 12 of 28
EVAL-AD7938CB/EVAL-AD7939CB/EVAL-AD7938-6CB
STANDALONE MODE
The evaluation board can be operated as a standalone evaluation board. It is necessary to supply all power supplies and control signals.
The link options listed in Table 6 are for standalone operation with single-ended unipolar inputs. Change the links appropriately for
differential or pseudo differential inputs and if the bias up circuit is to be used. Any unused ADC analog input should be tied to AGND.
To write to or read from the ADC data bus in standalone mode, use the 96-way connector, the pinout of which is shown in Table 7.
Table 6. Standalone Mode with Single-Ended, Unipolar Inputs
Link No.
LK1
LK2
LK3
LK4
LK5
LK6
LK7
LK8
LK9
LK10
LK11
LK12
LK13
Position
A
A
B
A or B
B
B
B
B
B
B
B
A
A
LK14
A
LK15
A
LK16
A
LK17
LK18
A
Inserted
LK19
LK20
LK21
LK22
B
A
A
Inserted
LK23
Inserted
LK24
LK25
LK26
B
B
Inserted
LK27
LK28
LK29
A
A
D
LK30
D
Function
VDD for the AD8138 amplifiers is supplied by the EVAL-CONTROL-BRD2.
VSS for the AD8138 amplifiers is supplied by the EVAL-CONTROL-BRD2.
An external supply is required to power the ADC via J2 (VDD_EXT.)
VDRIVE is taken from VDD or an external VDRIVE should be applied via J3 (VDRIVE).
The WR control input should be applied via P16.
The BUSY output should be read via P15.
The CONVST control input should be applied via P14.
The RD control input should be applied via P13.
The CS control input should be applied via P12.
ADC is set up to operate in WORD mode.
The CLKIN should be applied via P11.
VREF is supplied by the AD780 reference chip.
With LK13 in position A, a single-ended input or half a differential input is applied to VIN4. If VIN4 is not used,
ground VIN4 by installing LK13 in Position B.
With LK14 in position A, a single-ended input or half a differential input is applied to VIN0. If VIN0 is not used,
ground VIN0 by installing LK14 in Position B.
With LK15 in position A, a single-ended input or half a differential input is applied to VIN1. If VIN1 is not used,
ground VIN1 by installing LK15 in Position B.
With LK16 in position A, a single-ended input or half a differential input is applied to VIN2. If VIN2 is not used,
ground VIN2 by installing LK16 in Position B.
A single-ended unipolar input is applied to the U8 buffer.
On power-up, the inputs to the op amps are tied to ground so they are not floating. Once a signal is applied to
P10, LK18 can be removed if a 50 Ω termination is not required.
The single-ended, unipolar, analog input applied to P7 is connected to the U6 buffer.
A single-ended, unipolar input is applied to the U6 buffer.
A single-ended, unipolar input is applied to the U5 buffer.
On power-up, the inputs to the op amps are tied to ground so they are not floating. Once a signal is applied to P3,
LK22 can be removed if a 50 Ω termination is not required.
On power-up, the inputs to the op amps are tied to ground so they are not floating. Once a signal is applied to P7,
LK23 can be removed if a 50 Ω termination is not required.
The negative input to the AD8138 is tied to AGND as it is not used.
The negative input to the AD8138 is tied to AGND as it is not used.
On power-up, the inputs to the op amps are tied to ground so they are not floating. Once a signal is applied to P1,
LK26 can be removed if a 50 Ω termination is not required.
The single-ended, unipolar, analog input applied to P1 is connected to the U3 buffer.
A single-ended, unipolar input is applied to the U3 buffer.
On power-up, the analog input applied to VIN0 and/or VIN4 of the ADC is tied to AGND so that it is not floating.
Once an analog input signal is applied to P1, VIN0 through VIN4 of the ADC should be connected to the positive
output of the AD8138 amplifier by placing LK29 in Position A. Alternatively, the user can apply an analog input
signal directly to P4, in this case LK29 should be in Position C.
On power-up, the analog input applied to VIN1 and/or VIN5 of the ADC is tied to AGND so that it is not floating.
Once an analog input signal is applied to P3, VIN1 through VIN5 of the ADC should be connected to the positive
output of the AD8138 amplifier by placing LK30 in Position A. Alternatively, the user can apply an analog input
signal directly to P5, in this case LK30 should be in Position C.
Rev. 0 | Page 13 of 28
EVAL-AD7938CB/EVAL-AD7939CB/EVAL-AD7938-6CB
Link No.
LK31
Position
D
LK32
D
LK33
LK34
LK35
LK36
LK37
B
A
A
B
A
LK38
LK39
A and B
A
LK40
A
LK41
A
LK42
LK43
LK44
LK45
A and B
A and B
A and B
Inserted
LK46
Inserted
LK53
LK54
LK55
LK56
LK57
LK58
LK59
LK60
LK61
LK62
LK63
LK64
LK65
Inserted
Inserted
A and B
Inserted
A or B
Remove
B
B
Function
On power-up, the analog input applied to VIN2 and/or VIN6 of the ADC is tied to AGND so that it is not floating.
Once an analog input signal is applied to P7, VIN2 through VIN6 of the ADC should be connected to the positive
output of the AD8138 amplifier by placing LK31 in Position A. Alternatively, the user can apply an analog input
signal directly to P6, in this case LK31 should be in Position C.
On power-up, the analog input applied to VIN3 and/or VIN7 of the ADC is tied to AGND so that it is not floating.
Once an analog input signal is applied to P10, VIN3 through VIN7 of the ADC should be connected to the positive
output of the AD8138 amplifier by placing LK32 in Position A. Alternatively, the user can apply an analog input
signal directly to P9, in this case LK32 should be in Position C.
The single-ended, unipolar, analog input applied to P10 is connected to the buffer (U8).
The analog input signal applied to P3 is applied to the single buffer (U5).
The AD8138 is not being used so the common-mode voltage needs to be tied to ground, with LK46 inserted.
The AD8138 is not being used so the common-mode voltage needs to be tied to ground, with LK45 inserted.
With LK37 in position A, a single-ended input or half a differential input is applied to VIN3. If VIN3 is not used,
ground VIN3 by installing LK37 in Position B.
Both A and B are inserted in LK38 when applying a single-ended input signal to VIN0 and VIN4.
With LK39 in position A, a single-ended input or half a differential input is applied to VIN5. If VIN5 is not used,
ground VIN5 by installing LK39 in Position B.
With LK40 in position A, a single-ended input or half a differential input is applied to VIN6. If VIN6 is not used,
ground VIN6 by installing LK40 in Position B.
With LK41 in position A, a single-ended input or half a differential input is applied to VIN7. If VIN7 is not used,
ground VIN7 by installing LK41 in Position B.
Both A and B are inserted in LK42 when applying a single-ended input signal to VIN1 and VIN5
Both A and B are inserted in LK43 when applying a single-ended input signal to VIN2 and VIN6
Both A and B are inserted in LK44 when applying a single-ended input signal to VIN3 and VIN7
This link should be inserted if a 50 Ω termination is required on the input to VOCM (common-mode input) of the
AD8138 differential amplifier (U4) with LK36 in Position A.
This link should be inserted if a 50 Ω termination is required on the input to VOCM (common-mode input) of the
AD8138 differential amplifier (U7) with LK35 in Position A.
Always insert.
Always insert.
Bias up circuit is not used.
The inputs to U13-C are not floating.
The user should apply an external reference via P17 or the reference is supplied by the AD780.
See Table 1.
See Table 1.
An external 5 V supply for VCC should be applied via J5.
See Table 1.
See Table 1.
See Table 1.
An external +12 V supply should be applied via J6 to supply the op amps and the voltage reference.
An external −12 V supply should be applied via J6 to supply the op amps and the voltage reference
Rev. 0 | Page 14 of 28
EVAL-AD7938CB/EVAL-AD7939CB/EVAL-AD7938-6CB
INTERFACING THE EVALUATION BOARDS
Interfacing the EVAL-CONTROL-BRD2 to the evaluation
board is accomplished via a 96-way connector, J1.Plug the 96way connector on the evaluation board directly into the 96-way
connector on the EVAL-CONTROL-BRD2.
When interfacing the EVAL-AD7938CB/EVAL-AD7939CB/
EVAL-AD7938-6CB evaluation boards directly to the EVALCONTROL-BRD2, all supplies and control signals are provided
with the EVAL-CONTROL-BRD2.
The 96-way connector is powered from a 12 V ac transformer.
Suitable transformers are available from Analog Devices as an
accessory under the following part numbers.
Due to the nature of the DSP interface on the EVAL-CONTROLBRD2, sampling rates greater than 800 kSPS are not supported
when interfacing this evaluation board directly to EVALCONTROL-BRD2.
EVAL-110VAC-US (for use in the U.S. or Japan)
•
EVAL-220VAC-UK (for use in the U.K.)
•
EVAL-220VAC-EU (For use in Europe)
Figure 2 shows the pinout for the 96-way connector. Table 7 and
Table 8 list the pin designations and descriptions.
1
8
16
24
32
8
16
24
32
A
B
C
These transformers are also available from Digikey (U.S.) and
Campbell Collins (U.K.).
1
Connection between the EVAL-CONTROL-BRD2 and the serial
port of a PC is via a standard Centronics printer port cable, which
is provided as part of the EVAL-CONTROL-BRD2 kit.
Figure 2. Pin Configuration for the 96-Way Connector J1
Table 7. Pin Designations (unused pins omitted for clarity)
Table 8. Pin Descriptions
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Pin
D0 to
D11
Row A
DGND
SCLK0
+5 V
RD
DGND
DGND
FL0
DGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
−12 V
AVSS
AVDD
Row B
D0
D1
DGND
D2
D3
D4
+5 V
D5
D6
D7
DGND
D8
D9
D10
DGND
D11
DGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AVSS
AVDD
Row C
DGND
SCLK0
+5 V
WR
CS
DGND
SCLK0
+5 VD
RD
WR
CS
FL0
DGND
IRQ2
DGND
AGND
AGND
AGND
AGND
AGND
AGND
IRQ2
DGND
AGND
AVDD
AVSS
AGND
+12 V
AVSS
AVDD
06213-002
•
±12 V
Rev. 0 | Page 15 of 28
Description
Data Bit 0 to Data Bit 11. Three state TTL I/O pins used
to read conversion data and to write data to the
internal registers of the ADC. D11 is the MSB and D0
the LSB for the AD7938 and D2 the LSB for the AD7939.
Serial Clock. This continuous clock is connected to the
CLKIN pin of the ADCs via LK11.
Digital +5 V Supply. This is used to provide a digital
supply to the board for the digital logic.
Read. This is an active low logic input connected to the
RD pin of the ADCs via LK8.
Write. This is an active low logic input connected to the
WR pin of the ADCs via LK5.
Chip Select. This is an active low logic input connected
to the CS pin of the ADCs via LK9.
Flag Zero. This logic input is connected to the CONVST
input of the ADCs via LK7.
Interrupt Request 2. This is a logic output and is
connected to the BUSY output of the ADCs.
Digital Ground. These lines are connected to the digital
ground plane on the evaluation board. This allows the
user to provide a digital power supply via the
connector along with other digital signals.
Analog Ground. These lines are connected to the
analog ground plane on the evaluation board.
Analog +5 V Supply. These lines are connected to the
AVDD supply line on the evaluation board via LK1 to
provide +5 V to the AD8138 differential amplifiers.
They are also connected to the VDD supply of the
ADCs via LK3.
Analog −5 V Supply. These lines are connected to the
AVSS supply line on the evaluation board via LK2 to
supply −5 V to the AD8138 differential amplifiers.
±12 V Supply. These lines are connected to the ±12 V
supply lines on the evaluation board via LK64 and LK65 to
supply the AD713, the AD8021, AD8022, and the AD780.
EVAL-AD7938CB/EVAL-AD7939CB/EVAL-AD7938-6CB
TEST POINTS
SOCKETS
There are 13 test points on the inputs to the ADCs on the
evaluation board. These test points enable easy access to the
signals for probing, evaluation, and debugging.
There are 18 SMB input sockets relevant to the operation of the
ADCs on this evaluation board. All of these sockets are used for
applying an externally generated signal to the evaluation board.
When operating the board with the EVAL-CONTROL-BRD2,
the only necessary external sockets are used to supply the
analog inputs to the ADC (that is, P1, P3, P7, and P10). All of
the other sockets are optional. If not used, their signals are
supplied by the EVAL-CONTROL-BRD2. Most of these sockets
are used when operating the board as a standalone unit, as all
the signals required are supplied from external sources. The
functions of these sockets are outlined in Table 10.
CONNECTORS
There are six connectors on the EVAL-AD7938CB/EVALAD7939CB/EVAL-AD7938-6CB evaluation board as outlined
in Table 9.
Table 9. Connector Functions
Connector
J1
J2
J3
J4
J5
J6
Function
96-way connector for the digital interface and
power supply connections.
External VDD power connector for the ADC.
External AVDD, AVSS, and AGND power connector.
External VDRIVE power connector.
External digital +5 V power connector.
External +12 V, −12 V, and AGND power connector.
Table 10. Socket Functions
Socket
P1
P2
P3
P4
P5
P6
P7
P8
P9
P10
P11
P12
P13
P14
P15
P16
P17
P18
Function
VIN0 through VIN4. Subminiature BNC socket for either a single-ended unipolar analog input to be applied to the VIN0 through VIN4
input of the ADC in single-ended mode; or for a bipolar single-ended analog input to be applied to the AD8138 for single-endedto-differential conversion in differential mode; or for half a differential signal to be applied to the AD8138 for differential signal
buffering.
COM1. Subminiature BNC socket for the dc analog input to VOCM on the AD8138 differential amplifier.
VIN1 through VIN5. Subminiature BNC socket for either a single-ended unipolar analog input to be applied to the VIN1 through VIN5
input of the ADC in single-ended mode; or for half a differential signal to be applied to the AD8138 for differential signal
buffering.
Ext_VIN0 through VIN4. Subminiature BNC socket for a signal to be applied directly to VIN0 through VIN4 input of the ADC.
Ext_ VIN1 through VIN5. Subminiature BNC socket for a signal to be applied directly to VIN1 through VIN5 input of the ADC.
Ext_VIN2 through VIN6. Subminiature BNC socket for a signal to be applied directly to VIN2 through VIN6 input of the ADC.
VIN2 through V VIN5. Subminiature BNC socket for either a single-ended unipolar analog input to be applied to the VIN2 through
VIN5 input of the ADC in single-ended mode; or for a bipolar single-ended analog input to be applied to the AD8138 for singleended-to-differential conversion in differential mode; or for half a differential signal to be applied to the AD8138 for differential
signal buffering.
COM2. Subminiature BNC socket for the dc analog input to VOCM on the AD8138 differential amplifier.
Ext_VIN3 through VIN7. Subminiature BNC socket for a signal to be applied directly to VIN3 through VIN7 input of the ADC.
VIN3 through VIN7. Subminiature BNC socket for either a single-ended unipolar analog input to be applied to the VIN3 input of the
ADC in single-ended mode; or for half a differential signal to be applied to the AD8138 for differential signal buffering.
CLKIN. Subminiature BNC socket for an external clock input.
CS. Subminiature BNC socket for an external CS input.
RD. Subminiature BNC socket for an external RD input.
CONVST. Subminiature BNC socket for an external CONVST input.
Busy. Subminiature BNC socket for reading the Busy output.
WR. Subminiature BNC socket for an external WR input.
VREF. Subminiature BNC socket for an external VREF input.
VIN S.E. Subminiature BNC socket for the bipolar single-ended or pseudo differential analog input to the bias-up circuit.
Rev. 0 | Page 16 of 28
EVAL-AD7938CB/EVAL-AD7939CB/EVAL-AD7938-6CB
EVALUATION BOARD SOFTWARE
Control Buttons
INSTALLING THE SOFTWARE
Install the evaluation board software before connecting the
evaluation board to the USB port of the PC. This ensures the
evaluation board is correctly recognized when connected to the PC.
Use control buttons to take samples (Sample), reset the board
(Reset), exit the program (Exit), and open the Load
Configuration Window to load a configuration file (Device
Select). The Control Reg button accesses the on-chip registers.
Use the drop-down menus to change between the different
modes, such as, single-ended and differential. However, use the
Control Reg button to access the on-chip sequence and shadow
registers.
1.
Start the Windows operating system and insert the CD-ROM.
Menu Bar
The installation software launches automatically. If it does
not, use Windows Explorer to locate the file setup.exe on
the CD-ROM. Select this file to start the installation
procedure.
The menu bar consists of the File, Config, Channel, and About
menus.
The EVAL-AD7938CB/EVAL-AD7939CB/AD7938-6CB
evaluation kit includes self-installing software on CD-ROM.
The software is compatible with Microsoft® Windows® 95 or
higher.
2.
At the prompt, select a destination directory, which is
C:\Program Files\Analog Devices\AD7938 by default.
Once the directory is selected, the installation procedure
copies the files into the relevant directories on the hard
drive. The installation program creates a program group
called Analog Devices with subgroup AD7938 in the Start
menu of the taskbar.
The File menu offers the following selections:
•
Load Raw Data. Select this option to load data saved by
the software during a previous session.
•
Save Raw Data. Select this option to save the current set of
sample data points. The data can be reloaded to the EVALCONTROL-BRD2 software later or can be used by other
programs for further analysis.
•
Save Binary Data. Select this option to save the current
set of sample data points. The data is saved in binary
format as a text file. This method is useful for such tasks as
examining code flicker and looking for stuck bits.
•
Exit. Select this option to quit the program.
This program also installs electronic versions of the evaluation
board data sheet and the ADC data sheets, as well as the EVALCONTROL-BRD2 data sheet.
SOFTWARE OVERVIEW
The Main Screen
The Main Screen, shown in Figure 3, allows you to read a predetermined number of samples from the evaluation board and
display them in both the time and frequency domain. This
screen can be divided into three sections.
The upper portion of the screen contains the:
•
Control buttons
•
Menu bar
•
Busy status indicators
•
Selection windows.
The Config drop-down menu sets up certain operating
conditions in the ADC control register, such as power
management, output coding, internal or external reference, and
the analog input range.
The Channel drop-down menu allows the choice of analog
input type (single-ended, differential, or pseudo differential).
The About drop-down menu provides information about the
version of the software.
Frequency, Num Samples, Codes/Volts, and Busy Status
Options
The Frequency window displays the speed at which the part is
running. This can be changed. Note than when using the
sequencer, the parts run at the speed chosen, however, this
speed is divided down by the number of channels selected at
any one time.
The Num Samples window allows you to change the sampling
frequency and the number of samples to upload.
The Codes/Volts button determines whether the data is
displayed in volts or codes.
The Busy Status indicates when the evaluation board is busy.
Rev. 0 | Page 17 of 28
06213-003
EVAL-AD7938CB/EVAL-AD7939CB/EVAL-AD7938-6CB
Figure 3. Main Screen
The middle portion of the screen is a Digital Storage
Oscilloscope (DSO) for displaying either a Waveform, a
Histogram or an FFT. Samples are uploaded from the EVALCONTROL-BRD2 are displayed here. Samples can be displayed
either as integer values or as voltages. Zoom options are
available to the bottom left of the graph. The area to the right of
the graphs contains information about the samples taken (Min,
Max, Spread, Mean, and Std. Dev)
The lower portion of the screen is also a DSO for displaying
either a Waveform, a Histogram or an FFT. Use the FFT
(default) option if you are concerned with examining the ADCs
performance in the frequency domain. The Histogram gives an
indication of the ADCs performance in response to dc inputs.
Change the option displayed by clicking on one of the other
(Waveform, Histogram or FFT buttons). The right side of the
lower portion of this screen contains information about the
samples taken.
Load Configuration Screen
The Load Configuration Screen, shown in Figure 4, allows you
to load the required configuration file for the evaluation board.
The configuration file provides the software with detailed
information about the evaluation board and the part connected
to the EVAL-CONTROL-BRD2, such as the number of bits, the
maximum sampling rate, output coding, maximum sampling
rate, and power supply requirements.
The configuration files also indicate to the software the name of
the DSP program file to download to the EVAL-CONTROLBRD2. The Load Configuration Screen allows you to choose the
sampling frequency and the number of samples to take.
Rev. 0 | Page 18 of 28
06213-004
EVAL-AD7938CB/EVAL-AD7939CB/EVAL-AD7938-6CB
06213-005
Figure 4. Load Configuration Screen
Figure 5. Control Register Screen
Window (see Figure 4). Notice that the available
configuration files are listed. The configuration files are textbased files containing formation about the evaluation board to
be tested. The information includes the part name, number of
samples to be taken, default and maximum sampling
frequency, and power supply settings. The configuration file
also contains the name of the DSP program file to be
downloaded to the EVAL-CONTROL BRD2.
To use the sequencer register function, first write to the control
register. To do this, click on the Control Reg button to display
the control register panel, as shown in Figure 5.
CHECKING THE EVAL-CONTROL-BRD2
The EVAL-CONTROL-BRD2 and the evaluation board should
be connected together as described in the Interfacing the
Evaluation Boards section.
At this stage, the red LED on the EVAL-CONTROL-BRD2
should be flashing. This indicates that that EVAL-CONTROLBRD2 is functional and ready to receive instructions.
2.
Note that the software should be installed before the printer
port cable is connected between the EVAL-CONTROL BRD2
and the PC. This ensures that the printer port has been
initialized properly.
USING THE SOFTWARE
Once the software is installed and running:
1.
Click on the Device Select control button on the Main
Screen (see Figure 3) to display the Load Configuration
Rev. 0 | Page 19 of 28
Select the relevant configuration file and click OK.
The EVAL-CONTROL BRD2 is reset and the DSP
program is downloaded. When the download has been
completed, the power supply settings indicated in the
configuration file are set (you may hear some of the relays
clicking). The selection windows, such as Num Samples,
have been set to the default values specified by the
configuration file. These selections can now be changed.
EVAL-AD7938CB/EVAL-AD7939CB/EVAL-AD7938-6CB
What follows is a typical Software Configuration File (*.cfg).
TAKING SAMPLES
To instruct the EVAL-CONTROL BRD2 to take the required
number of samples at the required frequency, follow these steps
using the Main Screen shown in Figure 3:
1.
Samples are uploaded and displayed. An FFT and
histogram are also calculated and displayed.
Click Continuous to continue taking samples.
3.
Click EXIT to stop the process.
partname:AD7938
programname:ad7938.PRG
samplefrequency:100000
maxsamplefrequency:1000000
samples:2048
Click Sample.
2.
[EVAL-CONTROL BOARD]
SOFTWARE CONFIGURATION FILES:
Software configuration files provide the EVAL-CONTROLBRD2 with information on how the software and hardware
should perform. These files contain formation, such as the
name of the DSP program to download, the default and
maximum sample frequencies, the number of samples to take,
and the power supply settings to use.
+/−15 V:on
dvdd:5:on
avdd:5:on
bus:on
;options 2scomp, binary
dataformat:binary
numberofbits:12
inputVmax:2.5
inputVmin:0
[endofconfig]
Rev. 0 | Page 20 of 28
EVAL-AD7938CB/EVAL-AD7939CB/EVAL-AD7938-6CB
EVALUATION BOARD SCHEMATICS AND ARTWORK
06213-006
Figure 6. Evaluation Board Circuit Diagram, Page 1
Rev. 0 | Page 21 of 28
EVAL-AD7938CB/EVAL-AD7939CB/EVAL-AD7938-6CB
06213-007
Figure 7. Evaluation Board Circuit Diagram, Page 2
Rev. 0 | Page 22 of 28
06213-008
EVAL-AD7938CB/EVAL-AD7939CB/EVAL-AD7938-6CB
06213-009
Figure 8. Evaluation Board Layout, Component Side Artwork
Figure 9. Evaluation Board Layout, Solder Side Artwork
Rev. 0 | Page 23 of 28
06213-010
EVAL-AD7938CB/EVAL-AD7939CB/EVAL-AD7938-6CB
06213-011
Figure 10. Evaluation Board Layout, Layer 2
Figure 11. Evaluation Board Layout, Layer 3
Rev. 0 | Page 24 of 28
06213-012
EVAL-AD7938CB/EVAL-AD7939CB/EVAL-AD7938-6CB
Figure 12. Evaluation Board Layout, Silkscreen
Rev. 0 | Page 25 of 28
EVAL-AD7938CB/EVAL-AD7939CB/EVAL-AD7938-6CB
ORDERING INFORMATION
BILL OF MATERIALS
Table 11.
Quantity
1
1
6
2
1
1
1
28
39
2
8
6
1
2
7
7
1
2
1
8
6
1
8
14
19
1
3
2
66
4
Part Type
AD7938/39
74FCT162245
AD8021AR
AD8138
AD780
AD8022
AD713
10 μF Tantalum
Capacitor
0.1 μF Ceramic
Capacitor SMD 0603
0.1 μF Ceramic
Capacitor SMD 0805
10 nF Ceramic
Capacitor SMD 0805
10 pF Ceramic
Capacitor SMD 0805
470 nF Ceramic
Capacitor SMD 0805
68 pF Ceramic
Capacitor SMD 0805
51 Ω, 0.1 W, 0.1%
Resistor SMD 0805
62 Ω, 0.1 W, 0.1%
Resistor SMD 0805
100 Ω, 0.1 W, 0.1%
Resistor SMD 0805
300 Ω, 0.1 W, 0.1%
Resistor SMD 0805
390 Ω, 0.1 W, 0.1%
Resistor SMD 0805
499 Ω, 0.1 W, 0.1%
Resistor SMD 0805
1 kΩ, 0.1 W, 0.1%
Resistor SMD 0805
3 kΩ, 0.1 W, 0.1%
Resistor SMD 0806
100 kΩ, 0.1 W, 0.1%
Resistor SMD 0805
TESTPOINT
Gold 50 Ω SMB Jack
CON\41612\96
Connector
2-Way Terminal block
3-Way Terminal Block
Jumpers
Shorting Link
Stick-On Feet
Reference Designator
U1
U2
U3, U5, U6, U8, U10, U11
U4, U7
U9
U12
U13
C1 to C3, C5, C7, C10 to C12, C15, C24, C28,
C42 to C47, C61, C63, C70, C71, C78 to C85
C4, C6, C8, C9, C13, C14, C16 to C23, C25 to
C27, C37 to C39, C41, C48 to C53, C55, C59,
C60, C62, C64, C65, C72 to C75, C86, C87
C76, C77
Manufacturer/Distributor
ADI
ADI
ADI
ADI
ADI
ADI
Order Number
AD7938BCP/AD7939BCP
IDT74FCT162245TPV
AD8021AR
AD8138AR
AD780AN/AD780AR
AD8022AR
AD713JR-16
FEC 197-427
FEC 499-675
FEC 317-287
C29 to C32, C66 to C69
FEC 499-225
C33 to C36, C40, C56
FEC 344-8952
C54
FEC 755-620
C57, C58
FEC 722-066
R3, R4, R29 to R31, R33, R44
Multicomp
FEC 321-7905
R21 to R24, R49 to R51
Multicomp
FEC 321-7917
R52
Multicomp
FEC 911-732
R1, R2
Multicomp
FEC 771-272
R35
Multicomp
FEC 613-046
R10 to R13, R25 to R28
Multicomp
FEC 553-712
R39, R43, R45 to R48
Multicomp
FEC 613-095
R38
Multicomp
FEC 771-399
R7, R9, R14 to R18, R20
Multicomp
FEC 612-728
TP1 to T13
P1 to P18
J1
W-Hughes
M/A-Com
Siemens
FEC 240-333
FEC 310-682
FEC 225-393
Harwin
Berg
3M
FEC 304-4889
FEC 304-4890
FEC 511-705
FEC 150-411
FEC 148-922
J2, J4, J5
J3, J6
LK1 to LK66
LK1 to LK66
Each corner
Rev. 0 | Page 26 of 28
EVAL-AD7938CB/EVAL-AD7939CB/EVAL-AD7938-6CB
ORDERING GUIDE
Model
EVAL-AD7938CB
EVAL-AD7938-6CB
EVAL-AD7939CB
Description
AD7938 Evaluation Board
AD7938-6 Evaluation Board
AD7939 Evaluation Board
ESD CAUTION
Rev. 0 | Page 27 of 28
EVAL-AD7938CB/EVAL-AD7939CB/EVAL-AD7938-6CB
NOTES
©2006 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D06213-0-10/06(0)
Rev. 0 | Page 28 of 28