Evaluation Board User Guide UG-064

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Evaluation Board User Guide
UG-064
One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com
AD8099 Evaluation Boards
Offered in 8-Lead SOIC and 8-Lead LFCSP Packages
to 1206 case size. The electrolytic bypass capacitors are 3528
case size.
FEATURES
Enables quick breadboarding/prototyping
User-defined circuit configuration
Edge-mounted SMA connector provisions
Easy connection to test equipment and other circuits
RoHS compliant
INTRODUCTION
The evaluation boards described in this user guide are bare
boards (that is, there are no components or amplifier soldered
to the board; these must be ordered separately) that enables
users to quickly prototype a variety of amplifier circuits, which
lowers design time, minimizes risk, and reduces time to market.
The following evaluation boards are designed to work with the
AD8099, a high performance externally compensated amplifier.
The 8-lead SOIC inverting, 8-lead SOIC noninverting, 8-lead
LFCSP inverting, and 8-lead LFCSP noninverting evaluation
boards are designed to help users quickly implement and
evaluate low noise, low distortion op amp designs.
GENERAL DESCRIPTION
There are two basic AD8099 evaluation board configurations:
inverting and noninverting. These two configurations are offered
for both package types, LFCSP and SOIC. Part numbers for
the evaluation boards can be found in the evaluation board
selection guide table in the AD8099 data sheet.
The evaluation boards feature edge-mounted SMA connectors
at the input and output for efficient connection to other circuit
boards or test equipment. The board is a 2-layer PCB with a ground
plane on both sides of the board. The ground plane under the
input pins has been removed. Removing the ground plane from
under the input pins minimizes the stray capacitance at the input of
the op amp, which improves stability and reduces peaking. The
evaluation board components are SMTs and range from 0603
PLEASE SEE THE LAST PAGE FOR AN IMPORTANT
WARNING AND LEGAL TERMS AND CONDITIONS.
Supply bypassing for the AD8099 is a key consideration for
optimal circuit performance, especially when distortion is of
concern. The AD8099 uses a combination of common-mode
bypassing (a capacitor between the two power supplies) and
shunt bypassing (from the power supply pins of the amplifier to
ground). The evaluation board schematics show the bypassing
schemes in detail in Figure 1, Figure 2, Figure 9, and Figure 10.
Because the AD8099 is externally compensated and has a large
gain bandwidth product, the component values and placement
are critical. The AD8099 data sheet features a detailed section
on the compensation networks and component values. In low
gain configurations (G = +2), the compensation network consists
of three components: a series-parallel combination of resistor
and two capacitors to the negative supply.
To minimize stray capacitance, the evaluation board provides
only one set of mounting pads for the parallel components.
Therefore, the parallel combination of resistor and capacitor
(R7 and CP for the SOIC boards and RC and CP for the LFCSP
boards) must be soldered one on top of the other. Figure 17
illustrates the proper mounting configuration. The previously
mentioned reference designators correspond to RC and C1
found in the AD8099 data sheet.
The AD80999 output does not drive significant values of load
capacitance (>5 pF); therefore, the output connections should
be kept short, direct, and terminated when appropriate. Larger
values of capacitance can be driven by placing a series resistor
(25 Ω to 50 Ω) into the R5 position. This helps isolate the capacitive loading effects at the output of the AD8099. Minimizing
the output capacitance helps ensure stability while minimizing
peaking and ringing.
Rev. A | Page 1 of 12
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Evaluation Board User Guide
TABLE OF CONTENTS
Features .............................................................................................. 1 LFCSP Evaluation Board Schematics .............................................6 Introduction ...................................................................................... 1 LFCSP Evaluation Board, Assembly, and Layout Drawings........7 General Description ......................................................................... 1 Noninverting..................................................................................7 Revision History ............................................................................... 2 Inverting .........................................................................................8 SOIC Evaluation Board Schematics ............................................... 3 Soldering Information ......................................................................9 SOIC Evaluation Board, Assembly, and Layout Drawings ......... 4 Ordering Information.................................................................... 10 Noninverting ................................................................................. 4 Bill of Materials........................................................................... 10 Inverting ........................................................................................ 5 REVISION HISTORY
4/11—Rev. 0 to Rev. A
Changes to Title, Features Section, Introduction Section, and
General Description Section ........................................................... 1
Added Noninverting Section .......................................................... 4
Added Figure 4; Renumbered Sequentially .................................. 4
Added Inverting Section and Figure 7........................................... 5
Changed CSP to LFCSP Throughout............................................. 6
Added Noninverting Section and Figure 12 ................................. 7
Added Inverting Section and Figure 15......................................... 8
Deleted Table 1; Renumbered Sequentially .................................. 9
Added Ordering Information Section and Bill of Materials
Section.............................................................................................. 10
Added Table 1 and Table 2 ............................................................ 10
2/10—Revision 0: Initial Version
Rev. A | Page 2 of 12
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UG-064
SOIC EVALUATION BOARD SCHEMATICS
+VS
GND1
PD/DIS
GND2
GND3
C2**
0.1µF
C1
10µF
AGND
AGND
U1
R4*
1 FEEDBACK
+VS 7
3
R3*
R5*
OUT
6
VOUT
CC 5
+IN
4 –V
S
IN
R6*
DEV
R2*
R1*
DISABLE 8
–IN
2
C6
10µF
CP*
AGND
AGND
R7*
C3*
C4
10µF
C5**
0.1µF
–VS
08648-001
AGND
*USER-DEFINED VALUE
**0508 CASE SIZE
AGND
Figure 1. Noninverting Schematic
+VS
PD/DIS
GND1
GND2
GND3
C2**
0.1µF
C1
10µF
AGND
AGND
U1
R4*
1 FEEDBACK
R3*
IN
DISABLE 8
–IN
+VS 7
+IN
4 –V
S
VOUT
5
CC
2
R1*
DEV
R2*
CP*
AGND
C3*
C4
10µF
AGND
*USER-DEFINED VALUE
**0508 CASE SIZE
OUT
R6*
C6
10µF
AGND
R7*
C5**
0.1µF
AGND
–VS
08648-004
AGND
R5*
6
3
Figure 2. Inverting Schematic
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Evaluation Board User Guide
SOIC EVALUATION BOARD, ASSEMBLY, AND LAYOUT DRAWINGS
NONINVERTING
CIRCUIT SIDE
08648-002
COMPONENT SIDE
NOTES
1. THE EVALUATION BOARD SILKSCREEN PART NUMBER LABELING ON YOUR
BOARD MAY BE DIFFERENT FROM WHAT IS SHOWN HERE.
08648-014
Figure 3. Noninverting Evaluation Board, Component and Circuit Sides
08648-003
Figure 4. Noninverting Evaluation Board Assembly Drawings
Figure 5. Noninverting Evaluation Board Layout Patterns
Rev. A | Page 4 of 12
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INVERTING
CIRCUIT SIDE
08648-005
COMPONENT SIDE
NOTES
1. THE EVALUATION BOARD SILKSCREEN PART NUMBER LABELING ON YOUR
BOARD MAY BE DIFFERENT FROM WHAT IS SHOWN HERE.
08648-015
Figure 6. Inverting Evaluation Board, Component and Circuit Sides
08648-006
Figure 7. Inverting Evaluation Board Assembly Drawings
Figure 8. Inverting Evaluation Board Layout Patterns
Rev. A | Page 5 of 12
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Evaluation Board User Guide
LFCSP EVALUATION BOARD SCHEMATICS
+VS
GND1
GND2
GND3
GND4
C2**
0.1µF
C1
10µF
AGND
PD/DIS
AGND
R3*
AGND
U1
1 DISABLE
R1*
+VS 8
VOUT
2 FEEDBACK
3
4
IN
–IN
CC 6
+IN
RC*
R2*
AGND
OUT
R6*
AGND
C3
10µF
–VS 5
R4*
R1P*
R5*
CP*
7
CC*
AGND
C5**
0.1µF
–VS
C4
10µF
*USER-DEFINED VALUE
**0508 CASE SIZE
AGND
08648-007
AGND
Figure 9. Noninverting Schematic
+VS
C2*
GND1
R3*
GND3
GND4
+VS
C1
10UF
AGND
AGND
PD/DIS
GND2
AGND
U1
2
DISABLE
FEEDBACK VOUT
3 –IN
IN
4
R4*
R1P*
R2*
AGND
+VS
8
R5*
7
OUT
CP*
CC 6
+IN
–VS
AD8099
8CSP3X3
RC*
5
C3
10µF
CC*
AGND
AGND
AGND
R6*
C5*
–VS
C4
10µF
AGND
AGND
–VS
*USER-DEFINED VALUE
Figure 10. Inverting Schematic
Rev. A | Page 6 of 12
08648-010
1
R1*
Evaluation Board User Guide
UG-064
LFCSP EVALUATION BOARD, ASSEMBLY, AND LAYOUT DRAWINGS
NONINVERTING
CIRCUIT SIDE
NOTES
1. THE EVALUATION BOARD SILKSCREEN PART NUMBER LABELING ON YOUR
BOARD MAY BE DIFFERENT FROM WHAT IS SHOWN HERE.
08648-008
COMPONENT SIDE
08648-016
Figure 11. Noninverting Evaluation Board, Component and Circuit Sides
08648-009
Figure 12. Noninverting Evaluation Board Assembly Drawings
Figure 13. Noninverting Evaluation Board Layout Patterns
Rev. A | Page 7 of 12
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Evaluation Board User Guide
INVERTING
CIRCUIT SIDE
08648-011
COMPONENT SIDE
NOTES
1. THE EVALUATION BOARD SILKSCREEN PART NUMBER LABELING ON YOUR
BOARD MAY BE DIFFERENT FROM WHAT IS SHOWN HERE.
08648-017
Figure 14. Inverting Evaluation Board, Component and Circuit Sides
08648-012
Figure 15. Inverting Evaluation Board Assembly Drawings
Figure 16. Inverting Evaluation Board Layout Patterns
Rev. A | Page 8 of 12
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SOLDERING INFORMATION
CP
RC (R7)
SOLDER TERMINATOR
SOLDER
SOLDER TERMINATOR
PCB
Figure 17. Soldering of Two Parallel Components
Rev. A | Page 9 of 12
08648-013
MOUNTING PADS
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Evaluation Board User Guide
ORDERING INFORMATION
BILL OF MATERIALS
Table 1. SOIC
Quantity
6
3
2
1
2
4
1
2
1
Reference Designator
+VS, −VS, DIS, GND1, GND2, GND3
C1, C4, C6
C2, C5
C3
IN, OUT
R1 to R3, R7
R4
R5, R6
U1
Description
Test point
10 μF capacitor
Capacitor, user defined
Capacitor, user defined
SMA/SMT
Resistor, user defined
Resistor, user defined
Resistor, user defined
AD8099
Package
TP
3528
C0508
C0805
SMA/SMT
R0805
R0603
R1206
8-lead SOIC_EP
Reference Designator
+VS, −VS, DIS, GND1, GND2, GND3, GND4
C1, C3, C4
C2, C5
CC
IN, OUT
R1, R3
R1P, R2, R4
R5, R6
U1
Description
Test point
10 μF capacitor
Capacitor, user defined
Capacitor, user defined
SMA/SMT
Resistor, user defined
Resistor, user defined
Resistor, user defined
AD8099
Package
TP
3528
C0508
C0805
SMA/SMT
R0603
R0805
R1206
8-lead LFCSP, 3 mm × 3 mm
Table 2. LFCSP
Quantity
7
3
2
1
2
2
3
2
1
Rev. A | Page 10 of 12
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NOTES
Rev. A | Page 11 of 12
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NOTES
ESD Caution
ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection
circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality.
Legal Terms and Conditions
By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the “Evaluation Board”), you are agreeing to be bound by the terms and conditions
set forth below (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. Do not use the Evaluation Board until you
have read and agreed to the Agreement. Your use of the Evaluation Board shall signify your acceptance of the Agreement. This Agreement is made by and between you (“Customer”) and Analog Devices, Inc.
(“ADI”), with its principal place of business at One Technology Way, Norwood, MA 02062, USA. Subject to the terms and conditions of the Agreement, ADI hereby grants to Customer a free, limited, personal,
temporary, non-exclusive, non-sublicensable, non-transferable license to use the Evaluation Board FOR EVALUATION PURPOSES ONLY. Customer understands and agrees that the Evaluation Board is provided
for the sole and exclusive purpose referenced above, and agrees not to use the Evaluation Board for any other purpose. Furthermore, the license granted is expressly made subject to the following additional
limitations: Customer shall not (i) rent, lease, display, sell, transfer, assign, sublicense, or distribute the Evaluation Board; and (ii) permit any Third Party to access the Evaluation Board. As used herein, the term
“Third Party” includes any entity other than ADI, Customer, their employees, affiliates and in-house consultants. The Evaluation Board is NOT sold to Customer; all rights not expressly granted herein, including
ownership of the Evaluation Board, are reserved by ADI. CONFIDENTIALITY. This Agreement and the Evaluation Board shall all be considered the confidential and proprietary information of ADI. Customer may
not disclose or transfer any portion of the Evaluation Board to any other party for any reason. Upon discontinuation of use of the Evaluation Board or termination of this Agreement, Customer agrees to
promptly return the Evaluation Board to ADI. ADDITIONAL RESTRICTIONS. Customer may not disassemble, decompile or reverse engineer chips on the Evaluation Board. Customer shall inform ADI of any
occurred damages or any modifications or alterations it makes to the Evaluation Board, including but not limited to soldering or any other activity that affects the material content of the Evaluation Board.
Modifications to the Evaluation Board must comply with applicable law, including but not limited to the RoHS Directive. TERMINATION. ADI may terminate this Agreement at any time upon giving written notice
to Customer. Customer agrees to return to ADI the Evaluation Board at that time. LIMITATION OF LIABILITY. THE EVALUATION BOARD PROVIDED HEREUNDER IS PROVIDED “AS IS” AND ADI MAKES NO
WARRANTIES OR REPRESENTATIONS OF ANY KIND WITH RESPECT TO IT. ADI SPECIFICALLY DISCLAIMS ANY REPRESENTATIONS, ENDORSEMENTS, GUARANTEES, OR WARRANTIES, EXPRESS OR IMPLIED, RELATED
TO THE EVALUATION BOARD INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, TITLE, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT OF INTELLECTUAL
PROPERTY RIGHTS. IN NO EVENT WILL ADI AND ITS LICENSORS BE LIABLE FOR ANY INCIDENTAL, SPECIAL, INDIRECT, OR CONSEQUENTIAL DAMAGES RESULTING FROM CUSTOMER’S POSSESSION OR USE OF
THE EVALUATION BOARD, INCLUDING BUT NOT LIMITED TO LOST PROFITS, DELAY COSTS, LABOR COSTS OR LOSS OF GOODWILL. ADI’S TOTAL LIABILITY FROM ANY AND ALL CAUSES SHALL BE LIMITED TO THE
AMOUNT OF ONE HUNDRED US DOLLARS ($100.00). EXPORT. Customer agrees that it will not directly or indirectly export the Evaluation Board to another country, and that it will comply with all applicable
United States federal laws and regulations relating to exports. GOVERNING LAW. This Agreement shall be governed by and construed in accordance with the substantive laws of the Commonwealth of
Massachusetts (excluding conflict of law rules). Any legal action regarding this Agreement will be heard in the state or federal courts having jurisdiction in Suffolk County, Massachusetts, and Customer hereby
submits to the personal jurisdiction and venue of such courts. The United Nations Convention on Contracts for the International Sale of Goods shall not apply to this Agreement and is expressly disclaimed.
©2010–2011 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
UG08648-0-4/11(A)
Rev. A | Page 12 of 12
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