5 GHz, Low Distortion ADC Driver/Line Driver ADA4960-1
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5 GHz, Low Distortion ADC Driver/Line Driver ADA4960-1 FEATURES FUNCTIONAL BLOCK DIAGRAM −3 dB bandwidth of 5 GHz (AV = 6 dB) Single resistor programmable gain: 0 dB to 18 dB Differential or single-ended input to differential output Low harmonic distortion (HD2/HD3 @ AV = 6 dB) −88/−69 dBc @ 250 MHz −77/−66 dBc @ 500 MHz −73/−72 dBc @ 1 GHz IMD3 @ 1 GHz = −63 dBc Slew rate 8700 V/μs (AV = 6 dB, 2 V step) 6600 V/μs (AV = 18 dB, 2 V step) Fast settling: 1 ns to 1%, 1.4 ns to 0.1% Fast overdrive recovery: 6.7 ns to 1%, 9.3 ns to 0.5% Single-supply operation: 5 V 0.1 dB gain flatness to 300 MHz DC level translation Available in 16-lead LFCSP VCC BIAS CELL PD VOCM VIP IIP RG VOP IIN VON GND ADA4960-1 08458-001 VIN Figure 1. 1.2 AV = 6dB 1.0 AV = 18dB 0.8 0.6 AV = 12dB 80% Differential ADC drivers for giga-sample ADCs GBPS line drivers with pre-emphasis High speed data acquisition Electronic surveillance countermeasures Pulse capture and conditioning Oscilloscopes Satellite communications Single-ended-to-differential converters RF/IF gain blocks 0.2 0 –0.2 –0.4 AV (dB) 6 12 18 SLEW RATE (V/µs) 8700 7700 6600 0.4 0.6 20% –0.6 –0.8 –1.0 –1.2 –0.2 0 0.2 0.8 TIME (ns) 1.0 08458-047 APPLICATIONS VOUT (V) 0.4 Figure 2. Rise Time, VOUT = 2 V p-p, TA = 25°C, For AV = 6 dB, AV = 12 dB, and AV = 18 dB GENERAL DESCRIPTION The ADA4960-1 is a high performance, differential amplifier optimized for RF and IF applications. It achieves better than 63 dB IMD3 performance for frequencies up to and beyond 1 GHz, making it an ideal driver for 8-bit to 10-bit giga-sample analogto-digital converters (ADCs). The device is optimized for the best combination of slew rate, bandwidth, and broadband distortion. These attributes allow it to drive a wide variety of ADCs. It is ideally suited for driving mixers, pin diode attenuators, SAW filters, and multi-element discrete devices. The buffered inputs of the ADA4960-1 isolate the gain-setting resistor (RG) from the signal inputs, maintaining a constant 10 kΩ input resistance, easing matching and input drive requirements. The ADA4960-1 has a nominal 150 Ω differential output impedance. The user accessible gain adjust and bandwidth extension features allow configuration of the ADA4960-1 for line driver and channel equalization applications. The ADA4960-1 is optimized for wideband, low distortion performance for frequencies up to and beyond 1 GHz. These attributes, together with its adjustable gain capability, make this device the amplifier of choice for general-purpose IF and broadband applications where low distortion, noise, and power are critical. The quiescent current of the ADA4960-1 is typically 60 mA. When disabled, it consumes less than 3 mA, offering excellent input-tooutput isolation. Fabricated on an Analog Devices, Inc., high speed SiGe process, the ADA4960-1 is available in a compact 3 mm × 3 mm, 16-lead LFCSP. It operates over the temperature range of −40°C to +85°C. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2010 Analog Devices, Inc. All rights reserved. ADA4960-1 TABLE OF CONTENTS Features .............................................................................................. 1 Circuit Description......................................................................... 13 Applications ....................................................................................... 1 Basic Structure ............................................................................ 13 Functional Block Diagram .............................................................. 1 Applications Information .............................................................. 14 General Description ......................................................................... 1 Basic Connections ...................................................................... 14 Revision History ............................................................................... 2 Input and Output Interfacing ................................................... 14 Specifications..................................................................................... 3 Gain Adjust ................................................................................. 15 Absolute Maximum Ratings............................................................ 6 Bandwidth Extension................................................................. 15 Thermal Resistance ...................................................................... 6 ADC Interfacing ......................................................................... 16 Maximum Power Dissipation ..................................................... 6 Line Driver Applications .......................................................... 16 ESD Caution .................................................................................. 6 Overdrive and Recovery ............................................................ 17 Pin Configuration and Function Descriptions ............................. 7 Layout, Grounding, and Bypassing .............................................. 18 Typical Performance Characteristics ............................................. 8 Outline Dimensions ....................................................................... 19 Test Circuits ................................................................................. 12 Ordering Guide .......................................................................... 19 REVISION HISTORY 4/10—Revision 0: Initial Version Rev. 0 | Page 2 of 20 ADA4960-1 SPECIFICATIONS VCC = 5 V, VOCM = 2.5 V, RL = 100 Ω differential, AV = 6 dB, CL = 1 pF differential, f = 140 MHz, T = 25°C. Inputs and outputs are ac-coupled. Table 1. Parameter DYNAMIC PERFORMANCE −3 dB Bandwidth Bandwidth for 0.1 dB Flatness Gain Accuracy Gain Supply Sensitivity Gain Temperature Sensitivity Slew Rate Settling Time Overdrive Recovery Time Reverse Isolation (S12) INPUT/OUTPUT CHARACTERISTICS Output Common Mode VOCM Adjustment Range Input Common-Mode Range Maximum Output Voltage Swing Output Common-Mode Offset Output Common-Mode Drift Output Differential Offset Voltage Common-Mode Rejection Ratio (CMRR) Output Differential Offset Drift Input Bias Current Input Resistance (Differential) Input Capacitance (Differential) Input Resistance (Single-Ended) Input Capacitance (Single-Ended) Output Resistance (Differential) Output Capacitance (Differential) POWER INTERFACE Supply Voltage ENB Threshold ENB Input Bias Current Quiescent Current Conditions Min AV = 6 dB, VOUT ≤ 1.0 V p-p AV = 12 dB, VOUT ≤ 1.0 V p-p AV = 18 dB, VOUT ≤ 1.0 V p-p VOUT ≤ 1.0 V p-p RG = 95.3 Ω VS ± 5% −40°C to +85°C AV = 6 dB, VOUT = 2 V step, 20% to 80% AV = 12 dB, VOUT = 2 V step, 20% to 80% AV = 18 dB, VOUT = 2 V step, 20% to 80% AV = 6 dB, VOUT = 1 V step, 20% to 80% AV = 12 dB, VOUT = 1 V step, 20% to 80% AV = 18 dB, VOUT = 1 V step, 20% to 80% 1 V step to 1% 1 V step to 0.1% VIN = 1 V to 0 V step, AV = 12 dB, VOUT ≤ 1% VIN = 1 V to 0 V step, AV = 12 dB, VOUT ≤ 0.5% f = ≤1 GHz Typ Max 5000 2000 1200 300 0.5 0.2 2.5 8700 7700 6600 7200 4900 3700 1 1.4 6.7 9.3 68 MHz MHz MHz MHz dB dB/V mdB/°C V/μs V/μs V/μs V/μs V/μs V/μs ns ns ns ns dB VS/2 1 2.25 1 dB compressed Referenced to VCC/2 −40°C to +85°C 2.75 2.75 3.5 −20 +10 0.05 −36 +22 60 0.05 −20 10 0.4 5 0.8 150 1.2 −40°C to +85°C −40°C to +85°C AV = all gains AV = all gains AV = all gains AV = all gains 4.75 2.2 Low to high High to low ENB high ENBL low ENB high ENBL low 5.0 5.25 1.3 56 Rev. 0 | Page 3 of 20 30 −180 60 2.9 Unit 64 V V V V p-p mV mV/°C mV dB mV/°C μA kΩ pF kΩ pF Ω pF V V V μA μA mA mA ADA4960-1 Parameter NOISE/HARMONIC PERFORMANCE 140 MHz Second/Third Harmonic Distortion OIP3/IMD3 Noise Spectral Density (RTI) 1 dB Compression Point (RTO) 250 MHz Second/Third Harmonic Distortion OIP3/IMD3 Noise Spectral Density (RTI) 1 dB Compression Point (RTO) 500 MHz Second/Third Harmonic Distortion OIP3/IMD3 Noise Spectral Density (RTI) 1 dB Compression Point (RTO) 750 MHz Second/Third Harmonic Distortion OIP3/IMD3 Noise Spectral Density (RTI) 1 dB Compression Point (RTO) Conditions Min Typ Max Unit AV = 6 dB, VOUT = 0.9 V p-p AV = 12 dB, VOUT = 0.9 V p-p AV = 18 dB, VOUT = 0.9 V p-p AV = 6 dB, VOUT = 0.9 V p-p composite (2 MHz spacing) AV = 12 dB, VOUT = 0.9 V p-p composite (2 MHz spacing) AV = 18 dB, VOUT = 0.9 V p-p composite (2 MHz spacing) AV = 6 dB AV = 12 dB AV = 18 dB AV = 6 dB AV = 12 dB AV = 18 dB −91/−73 −86/−73 −82/−72 +33.2/−79 +33.4/−78 +33.3/−78 5.4 3.2 2.1 12.0 12.0 11.9 dBc dBc dBc dBm/dBc dBm/dBc dBm/dBc nV/√Hz nV/√Hz nV/√Hz dBm dBm dBm AV = 6 dB, VOUT = 0.9 V p-p AV = 12 dB, VOUT = 0.9 V p-p AV = 18 dB, VOUT = 0.9 V p-p AV = 6 dB, VOUT = 0.9 V p-p composite (2 MHz spacing) AV = 12 dB, VOUT = 0.9 V p-p composite (2 MHz spacing) AV = 18 dB, VOUT = 0.9 V p-p composite (2 MHz spacing) AV = 6 dB AV = 12 dB AV = 18 dB AV = 6 dB AV = 12 dB AV = 18 dB −88/−69 −81/−68 −77/−68 +32.5/−77 +32.6/−77 +32.1/−76 5.4 3.1 2.0 12.0 11.9 11.7 dBc dBc dBc dBm/dBc dBm/dBc dBm/dBc nV/√Hz nV/√Hz nV/√Hz dBm dBm dBm AV = 6 dB, VOUT = 0.9 V p-p AV = 12 dB, VOUT = 0.9 V p-p AV = 18 dB, VOUT = 0.9 V p-p AV = 6 dB, VOUT = 0.9 V p-p composite (2 MHz spacing) AV = 12 dB, VOUT = 0.9 V p-p composite (2 MHz spacing) AV = 18 dB, VOUT = 0.9 V p-p composite (2 MHz spacing) AV = 6 dB AV = 12 dB AV = 18 dB AV = 6 dB AV = 12 dB AV = 18 dB −77/−66 −71/−66 −68/−65 +30.2/−72 +29.9/−71 +29.1/−70 5.2 3.0 1.9 11.6 11.4 11.0 dBc dBc dBc dBm/dBc dBm/dBc dBm/dBc nV/√Hz nV/√Hz nV/√Hz dBm dBm dBm AV = 6 dB, VOUT = 0.9 V p-p AV = 12 dB, VOUT = 0.9 V p-p AV = 18 dB, VOUT = 0.9 V p-p AV = 6 dB, VOUT = 0.9 V p-p composite (2 MHz spacing) AV = 12 dB, VOUT = 0.9 V p-p composite (2 MHz spacing) AV = 18 dB, VOUT = 0.9 V p-p composite (2 MHz spacing) AV = 6 dB AV = 12 dB AV = 18 dB AV = 6 dB AV = 12 dB AV = 18 dB −70/−68 −67/−69 −64/−69 +28.3/−67 +27.7/−67 +26.9/−65 5.0 3.0 1.8 9.7 9.5 9.5 dBc dBc dBc dBm/dBc dBm/dBc dBm/dBc nV/√Hz nV/√Hz nV/√Hz dBm dBm dBm Rev. 0 | Page 4 of 20 ADA4960-1 Parameter 1000 MHz Second/Third Harmonic Distortion OIP3/IMD3 Noise Spectral Density (RTI) 1 dB Compression Point (RTO) Conditions Min AV = 6 dB, VOUT = 0.9 V p-p AV = 12 dB, VOUT = 0.9 V p-p AV = 18 dB, VOUT = 0.9 V p-p AV = 6 dB, VOUT = 0.9 V p-p composite (2 MHz spacing) AV = 12 dB, VOUT = 0.9 V p-p composite (2 MHz spacing) AV = 18 dB, VOUT = 0.9 V p-p composite (2 MHz spacing) AV = 6 dB AV = 12 dB AV = 18 dB AV = 6 dB AV = 12 dB AV = 18 dB Rev. 0 | Page 5 of 20 Typ −73/−72 −69/−78 −67/−85 +26.2/−63 +26.0/−63 +25.0/−61 4.8 2.7 1.6 8.0 7.7 7.6 Max Unit dBc dBc dBc dBm/dBc dBm/dBc dBm/dBc nV/√Hz nV/√Hz nV/√Hz dBm dBm dBm ADA4960-1 ABSOLUTE MAXIMUM RATINGS Table 2. Parameter Supply Voltage, VCC VIP, VIN Internal Power Dissipation Maximum Junction Temperature Operating Temperature Range Storage Temperature Range Rating 5.25 V VCC + 0.5 V See Figure 3 150°C −40°C to +85°C −65°C to +150°C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The power dissipated in the package (PD) is the sum of the quiescent power dissipation and the power dissipated in the package due to the load drive. The quiescent power is the voltage between the supply pins (VS) times the quiescent current (IS). The power dissipated due to the load drive depends upon the particular application. The power due to load drive is calculated by multiplying the load current by the associated voltage drop across the device. RMS voltages and currents must be used in these calculations. Airflow increases heat dissipation, effectively reducing θJA. In addition, more metal directly in contact with the package leads/ exposed pad from metal traces, through holes, ground, and power planes reduce θJA. Figure 3 shows the maximum safe power dissipation of the ADA4960-1 vs. the ambient temperature on a JEDEC standard 4-layer board. THERMAL RESISTANCE 2.5 Table 3. Thermal Resistance Package Type 16-Lead LFCSP (Exposed Pad) θJA 89.5 Unit °C/W MAXIMUM POWER DISSIPATION The maximum safe power dissipation in the ADA4960-1 package is limited by the associated rise in junction temperature (TJ) on the die. At approximately 150°C, which is the glass transition temperature, the plastic changes its properties. Even temporarily exceeding this temperature limit can change the stresses that the package exerts on the die, permanently shifting the parametric performance of the ADA4960-1. Exceeding a junction temperature of 150°C for an extended period can result in changes in the silicon devices, potentially causing failure. 2.0 1.5 1.0 0.5 QUIESCENT POWER 0 –40 –20 0 20 40 60 AMBIENT TEMPERATURE (°C) 80 100 08458-002 MAXIMUM POWER DISSIPATION θJA is specified for the device (including the exposed pad) soldered to a high thermal conductivity, 4-layer circuit board, as described in EIA/JESD 51-7. Figure 3. Maximum Power Dissipation vs. Ambient Temperature for 4-Layer Board ESD CAUTION Rev. 0 | Page 6 of 20 ADA4960-1 13 VOCM 14 GND 15 GND 16 PD PIN CONFIGURATION AND FUNCTION DESCRIPTIONS VIP 1 12 VCC ADA4960-1 IIN 3 TOP VIEW (Not to Scale) 11 VOP 10 VON 9 VCC VCC 8 VCC 7 NC 6 NC 5 VIN 4 NOTES 1. NC = NO CONNECT. 2. EXPOSED PAD MUST BE CONNECTED TO GND. 08458-003 IIP 2 Figure 4. Pin Configuration Table 4. Pin Function Descriptions Pin No. 1 2 3 4 5, 6 7, 8, 9, 12 10 11 13 14, 15 16 Mnemonic VIP IIP IIN VIN NC VCC VON VOP VOCM GND PD EPAD Description Balanced Differential Input. This pin is internally biased to VCC/2. Gain Setting Resistor. Connect RG between this pin and IIN. Gain Setting Resistor. Connect RG between this pin and IIP. Balanced Differential Input. This pin is internally biased to VCC/2. Leave these pins unconnected. Positive 5 V Supply Pins. Balanced Differential Output. This pin is biased to the VOCM input voltage. Balanced Differential Output. This pin is biased to the VOCM input voltage. This pin is internally biased at VCC/2. As an input, this pin sets the dc VOP and VON voltages. Ground. Connect this pin to a low impedance ground. This pin grounded disables the part, and at 5 V, this pin turns the part on. The exposed pad must be connected to GND. Rev. 0 | Page 7 of 20 ADA4960-1 TYPICAL PERFORMANCE CHARACTERISTICS VCC = 5 V, VOCM = 2.5 V, RL = 100 Ω differential, AV = 6 dB, CL = 1 pF differential, f = 140 MHz, T = 25°C. 18 AV = 6dB SPECTRAL NOISE DENSITY (nV/√Hz) AV = 18dB 15 AV = 12dB AV (dB) 10 AV = 6dB 5 AV = 0dB –5 0.01 0.1 1 FREQUENCY (GHz) 10 14 AV = 12dB 12 AV = 18dB 10 8 50 08458-004 0 16 1000 FREQUENCY (MHz) Figure 5. Small Signal Frequency Response, Gain vs. Frequency at AV = 0 dB, AV = 6 dB, AV = 12 dB, and AV = 18 dB Figure 8. RTO Noise Spectral Density vs. Frequency at AV = 6 dB, AV = 12 dB, and AV = 18 dB 0.6 1.2 AV = 6dB 1.0 AV = 6dB AV = 18dB 0.8 0.4 AV = 18dB 80% 0.2 0.6 AV = 12dB 0 AV (dB) 6 12 18 –0.2 20% AV = 12dB 80% 0.4 VOUT (V) VOUT (V) 100 08458-039 20 SLEW RATE (V/µs) 7200 4900 3700 0.2 0 AV (dB) 6 12 18 –0.2 –0.4 20% –0.6 –0.4 SLEW RATE (V/µs) 8700 7700 6600 –0.8 0.4 0.2 0.6 TIME (ns) –1.2 –0.2 08458-053 0 0 0.4 0.2 0.8 1.0 Figure 9. Rise Time, VOUT vs. Time, VOUT = 2 V p-p Figure 6. Rise Time, VOUT vs. Time, VOUT = 1 V p-p 13 24 AV = 6dB 12 22 AV = 6dB AV = 18dB 11 20 P1 (dB) AV = 12dB 18 10 AV = 12dB 9 16 8 14 0 200 400 600 800 FREQUENCY (MHz) 1000 1200 08458-038 AV = 18dB Figure 7. Noise Figure vs. Frequency at AV = 6 dB, AV = 12 dB, and AV = 18 dB Rev. 0 | Page 8 of 20 7 100 200 300 400 500 600 700 FREQUENCY (MHz) 800 900 1000 08458-007 NOISE FIGURE (dB) 0.6 TIME (ns) 08458-054 –1.0 –0.6 –0.2 Figure 10. P1dB vs. Frequency at AV = 6 dB, AV = 12 dB, and AV = 18 dB ADA4960-1 40 –55 –60 DISTORTION (dBc) OIP3 (dBm) 35 AV = 6dB 30 AV = 12dB AV = 18dB –65 –70 TA = +85°C –75 TA = +25°C 25 TA = –40°C 200 300 400 500 600 700 800 900 1000 FREQUENCY (MHz) –85 100 08458-008 20 100 200 300 400 500 600 700 800 900 1000 FREQUENCY (MHz) Figure 11. OIP3 vs. Frequency at AV = 6 dB, AV = 12 dB, and AV = 18 dB, VOUT = 0.45 V p-p/Tone, 2 MHz Spacing 08458-011 –80 Figure 14. Two Tone IMD3 vs. Frequency at TA = −40°C, TA = +25°C, and TA = +85°C, AV = 6 dB, VOUT = 0.45 V p-p/Tone, 2 MHz Spacing 40 –60 –65 35 OIP3 (dBm) 30 DISTORTION (dBc) –70 TA = –40°C TA = +25°C TA = +85°C AV = 18dB –75 AV = 12dB –80 AV = 6dB –85 25 200 300 400 500 600 700 800 900 1000 FREQUENCY (MHz) Figure 12. OIP3 vs. Frequency at AV = 6 dB, TA = −40°C, TA = +25°C, and TA = +85°C, VOUT = 0.45 V p-p/Tone, 2 MHz Spacing –60 –60 –65 400 500 600 700 800 900 1000 AV = 6dB AV = 18dB –70 AV = 12dB –75 300 Figure 15. HD2 vs. Frequency at AV = 6 dB, AV = 12 dB, and AV = 18 dB, VOUT = 0.9 V p-p –55 –65 200 FREQUENCY (MHz) DISTORTION (dBc) DISTORTION (dBc) –95 100 08458-040 20 100 08458-041 –90 AV = 6dB –70 –75 AV = 12dB –80 AV = 18dB –80 300 400 500 600 700 FREQUENCY (MHz) 800 900 1000 –90 100 200 300 400 500 600 700 FREQUENCY (MHz) Figure 13. Two Tone IMD3 vs. Frequency, AV = 6 dB, AV = 12 dB, and AV = 18 dB, VOUT = 0.9 V p-p/Tone, 2 MHz Spacing Rev. 0 | Page 9 of 20 800 900 1000 08458-013 200 08458-010 –85 100 –85 Figure 16. HD3 vs. Frequency at AV = 6 dB, AV = 12 dB, and AV = 18 dB, VOUT = 0.9 V p-p ADA4960-1 –60 70 THIRD HARMONIC DISTORTION –65 60 –70 DISTORTION (dBc) 50 CMRR (dB) –75 –80 SECOND HARMONIC DISTORTION –85 40 30 20 –90 200 300 400 500 600 700 800 900 1000 FREQUENCY (MHz) 0 0.01 08458-046 –100 100 10 TA = +85°C TA = +25°C TA = –40°C 0.1 1 FREQUENCY (GHz) 10 08458-017 –95 Figure 20. CMRR vs. Frequency, AV = 6 dB, VOUT = 0.9 V p-p Figure 17. HD2 and HD3 vs. Frequency at TA = −40°C, +25°C, +85°C, AV = 6 dB, VOUT = 0.9 V p-p –50 1.5 –55 1.0 HD2 DISTORTION (dBc) –60 VOUT (V) 0.5 0 –0.5 –65 HD3 –70 –75 –1.0 2 4 6 8 10 12 14 16 18 20 TIME (ns) –85 100 400 500 600 700 800 900 1000 Figure 21. HD2/HD3 vs. Frequency, Single-Ended Input, AV = 6 dB, VOUT = 0.9 V p-p –30 –30 f = 140MHz f = 250MHz f = 500MHz f = 750MHz f = 1GHz –40 –50 –60 –70 –60 –70 –80 –90 –90 1.5 2.0 VOCM (V) 2.5 3.0 08458-016 –80 1.0 f = 140MHz f = 250MHz f = 500MHz f = 750MHz f = 1GHz –40 DISTORTION (dBc) –50 DISTORTION (dBc) 300 FREQUENCY (MHz) Figure 18. Large Signal Pulse Response, AV = 18 dB –100 0.5 200 –100 0.5 1.0 1.5 2.0 VOCM (V) 2.5 3.0 Figure 22. HD3 vs. VOCM, AV = 6 dB, VOUT = 0.9 V p-p, f = 140 MHz, f = 250 MHz, f = 500 MHz, f = 750 MHz, f = 1 GHz Figure 19. HD2 vs. VOCM, AV = 6 dB, VOUT = 0.9 V p-p, f = 140 MHz, f = 250 MHz, f = 500 MHz, f = 750 MHz, f = 1 GHz Rev. 0 | Page 10 of 20 08458-019 0 08458-042 –1.5 08458-018 –80 ADA4960-1 –50 –60 –55 –65 1GHz –70 500MHz DISTORTION (dBc) 250MHz –65 –70 1GHz –75 –80 500MHz –85 –80 250MHz –90 –85 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 –95 0.5 08458-043 –90 0.5 –75 1.5 VOUT (V p-p) 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 VOUT (V p-p) Figure 23. HD3 vs. Output Amplitude @ 250 MHz, 500 MHz, 1 GHz, AV = 6 dB, VOUT = 0.9 V p-p 08458-044 DISTORTION (dBc) –60 Figure 25. HD2 vs. VOUT @ 250 MHz, 500 MHz, and 1 GHz, AV = 6 dB, VOUT = 0.9 V p-p 4.0 0.096 VOUTP 3.5 VOUTP – VOUTN 0.072 VOUT (V) VOUT (V) 3.0 2.5 0.048 1% 0.024 2.0 0.5% 0.25% VOCM 1.5 VOUTN –6 –4 –2 0.25% 0.5% 0 2 4 TIME (ns) 6 8 10 12 14 –0.024 08458-048 1.0 –8 0 2 4 6 8 10 12 TIME (ns) Figure 24. Output Overdrive, VOUT vs. Time, VIN = 1 V p-p, AV =12 dB Figure 26. Output Overdrive Recovery, VOUT vs. Time, VIN = 1 V p-p, AV =12 dB, VOCM = 2.4 V Rev. 0 | Page 11 of 20 14 08458-049 0 ADA4960-1 TEST CIRCUITS 5V 0.1µF ETC1-1-13 BAND-PASS FILTER VIP 0.1µF VOP 25Ω RG IIN 25Ω 50Ω 37.5Ω VON 0.1µF ETC1-1-13 ADA4960-1 VIN 25Ω 37.5Ω IIP 0.1µF SPECTRUM ANALYZER 25Ω 08458-022 SINE WAVE GENERATOR Figure 27. Distortion Test Circuit 5V 0.1µF VIP 0.1µF RG PULSE SOURCE IIN ADA4960-1 50Ω 0Ω VIN 25Ω 0Ω IIP 25Ω 50Ω VOP VON 0.1µF OSCILLOSCOPE 0.1µF 50Ω 08458-023 ETC1-1-13 Figure 28. Time Domain Test Circuit 5V 50Ω 0.1µF VIP VOP 0.1µF IIP 50Ω RG IIN 50Ω 0.1µF NETWORK ANALYZER 50Ω ADA4960-1 0Ω VIN 50Ω 0Ω VON 0.1µF Figure 29. S-Parameter Test Circuit Rev. 0 | Page 12 of 20 50Ω 08458-024 NETWORK ANALYZER ADA4960-1 CIRCUIT DESCRIPTION BASIC STRUCTURE The ADA4960-1 is a low noise, fully differential amplifier/ADC driver that uses a single 5 V supply at 60 mA. This amplifier has buffered inputs that isolate the gain-setting resistor (RG) from the input signals, keeping a constant 10 kΩ differential input impedance for all gains. The differential output impedance is 150 Ω. The gain range is 0 dB to 18 dB and is set using a single resistor (RG). 0.1µF RS 2 VIP RS 2 IIP RG AC IIN The ADA4960-1 can be ac-coupled or dc-coupled at the inputs and/or outputs within the specified input and output commonmode range. The inputs, VIP and VIN, have a common-mode voltage range of 2.25 V to 2.75 V and are internally set at VCC/2. The outputs, VOP and VON, have a common-mode voltage range of 1.0 V to 2.75 V that can be set externally using the VOCM pin. The VOCM pin is internally set to VCC/2 with no external connection. The input of the device can be configured as single-ended or differential with similar HD3 distortion results. ADA4960-1 75Ω VOP 75Ω VON RS 2 0.1µF VIN 08458-025 RS 2 Figure 30. Basic Structure of the ADA4960-1 Rev. 0 | Page 13 of 20 ADA4960-1 APPLICATIONS INFORMATION 5V BASIC CONNECTIONS 0.1µF ETC1-1-13 VOP RG IIN AC R2 25Ω ADA4960-1 VON 0.1µF The ADA4960-1 can be configured as a differential-input-todifferential-output driver, as shown in Figure 31. 5V 0.1µF VOP IIP R1 50Ω 50Ω VIP RG AC IIN ADA4960-1 VIN R2 50Ω VON 0.1µF 0.1µF 0.1µF VCC 16 2 0.1µF RS 2 3 4 14 13 GND GND VOCM VCC VIP IIP VOP 12 0.1µF 11 ADA4960-1 IIN VON VIN VCC NC 5 NC VCC VCC 6 7 RL 10 BALANCED LOAD 9 0.1µF 8 0.1µF 0.1µF VCC 10µF NC = NO CONNECT Figure 33. Basic Connections of the ADA4960-1 Rev. 0 | Page 14 of 20 08458-026 RS 2 15 PD RG AC RL 2 Figure 32. Single-Ended-Input-to-Differential-Output Configuration VCC BALANCED SOURCE RL 2 08458-028 0.1µF The differential broadband input is provided by the ETC1-1-13 balun transformer. The two 25 Ω resistors, R1 and R2, provide the 50 Ω match to the 50 Ω ac source. The 0.1 μF capacitors, connected in series with the inputs and outputs, isolate the source and balanced load from the internal bias. RG is the gain-setting resistor. Load RL should equal 100 Ω to provide the expected ac performance (see the Specifications section). Different loads can be applied with the gain value described by the gain adjust equation (see the Gain Adjust section). RS 2 0.1µF The ADA4960-1 can also be configured as a single-ended-inputto-differential-output driver, as shown in Figure 32. R1 provides the input source match, and R2 balances the input source impedances. The 0.1 μF capacitors, connected in series with the inputs and outputs, isolate the source and balanced load from the internal bias. RG is the gain-setting resistor. RL should equal 100 Ω to provide the expected ac performance (see the Specifications section). INPUT AND OUTPUT INTERFACING RS 2 RL 2 Figure 31. Differential-Input-to-Differential-Output Configuration For normal operation, the enable pin (PD) should be tied to VCC. When the ADA4960-1 is pulled low, it goes into power-down mode. The VOP and VON outputs are internally biased at VCC/2 with no external source. The output common-mode range can be adjusted in the range of 1 V to 2.75 V by applying an external source voltage to the VCOM pin. 1 RL 2 VIN In addition, decouple the VOCM pin and the VCI pin by using a 0.1 μF capacitor, whether or not they are used as inputs. 0.1µF 0.1µF IIP R1 25Ω 50Ω VIP 08458-030 The basic connections for operating the ADA4960-1 are shown in Figure 33. Connect VCC to 5 V and decouple each supply pin with a low inductance surface-mount ceramic capacitor of 0.1 μF placed as close to the device as possible. ADA4960-1 GAIN ADJUST BANDWIDTH EXTENSION The gain of the ADA4960-1 is set with a single resistor, RG, connected across the IIP and IIN pins. Because the output impedance is 150 Ω, the load affects the gain. The voltage gain can be calculated for both differential and single-ended inputs as follows: The bandwidth of the ADA4960-1 can be extended for both differential and single-ended input configurations by connecting a capacitor, CS, in parallel with the gain-setting resistor, RG, as shown in Figure 35. 5V 0.1µF ETC1-1-13 VOP 0.1µF RL 2 IIP R1 25Ω 50Ω VIP CS RG AC IIN ADA4960-1 RL 2 VIN where RL and RG are the load and gain-setting resistors. R2 25Ω VON 0.1µF 08458-027 ⎛ 150 R L ⎞ ⎜ ⎟ ⎜ 150 + R ⎟ L ⎠ ⎝ AV = 4.7 (35.5 + RG ) 0.1µF 18 Figure 35. ADA4960-1 with Bandwidth Extension 16 Figure 36 shows the bandwidth extension for 6 dB and 12 dB gains. Figure 37 shows the recommended CS values for most gains (dB). 14 12 AV (V/V) RL = 500Ω 10 14 CS = 2.2pF RL = 200Ω 12 8 RL = 1kΩ 6 10 AV (dB) 4 RL = 100Ω 0 0 50 100 150 200 RG (Ω) 250 08458-029 2 8 CS = 0.1pF 6 4 Figure 34. AV vs. RG for RL = 100 Ω, RL = 200 Ω, RL = 500 Ω, and RL = 1 kΩ 0 10 100 1k FREQUENCY (MHz) RG RL = 200 Ω 370 167 65.7 15.2 RL = 500 Ω 505 237 101 32.8 Figure 36. Bandwidth Extension for 6 dB and 12 dB Gains RL = 1 kΩ 576 271 118 41.7 14 12 10 8 6 4 2 0 0 0.5 1.0 1.5 2.0 2.5 3.0 CS (pF) 3.5 4.0 4.5 Figure 37. Recommended CS Values for Most Gains Rev. 0 | Page 15 of 20 5.0 08458-032 RL = 100 Ω 246 106 35.2 0 AV (dB) AV (dB) 0 6 12 18 10k 08458-031 2 Table 5. AV vs. RG for RL = 100 Ω, RL = 200 Ω, RL = 500 Ω, and RL = 1 kΩ ADA4960-1 ADC INTERFACING The signal source can be directly connected to the ADA4960-1 inputs as long as the source dc level is within the common-mode input range of the ADA4960-1, as shown in Figure 40. The ADA4960-1 is a high speed amplifier with linearity performance to drive high speed ADCs up to 1 GHz. Several options are available to the designer to interface with an ADC. 5V A 100 Ω resistor across the outputs of the ADA4960-1 enhances system bandwidth and distortion performance when the ADA4960-1 is driving an ADC with high input impedance. Lighter load resistance improves distortion performance and lowers the overall bandwidth. VOP VIP 50Ω 50Ω RG VREF AC IIN VIN+ 100Ω IIP ADC ADA4960-1 VIN VREF VIN– VON 25Ω VCM 08458-050 The ADA4960-1 in Figure 38 is a differential input configuration, using an input balun to provide the differential input signal. The 25 Ω resistors provide the input source match. The ADA4960-1 outputs can be directly connected to the ADC inputs as long as the ADC input common mode is within the output commonmode range of the ADA4960-1. The ADC VCM output pin is connected to the ADA4960-1 VOCM input pin to align the ADA4960-1 output voltages with the ADC inputs. VOCM VREF Figure 40. Single-Ended Input Configuration, DC-Coupled Inputs and Outputs When the ADC input common mode is outside the output common-mode range of the ADA4960-1, the outputs can be ac-coupled to provide coupling, as shown in Figure 41. 5V 5V 0.1µF ETC1-1-13 RG IIN AC VIN+ VIN VIN– VCM VOCM 5V 50Ω RG AC IIN VIN 25Ω 0.1µF VIN+ 100Ω ADC ADA4960-1 VIN– VON 0.1µF VIN+ ADC ADA4960-1 VON VIN– 0.1µF Figure 41. Single-Ended Input Configuration, AC-Coupled to the ADC VCM The user accessible gain adjust and bandwidth extension features allow configuration of the ADA4960-1 for line driver and channel equalization applications from dc to 6.5 Gbps. Because of its extremely low distortion performance and high linearity, the ADA4960-1 can be deployed in cable and backplane channels to extend channel length and improve signaling margin for serial links using receive equalization and transmit pre-emphasis. The ADA4960-1 unidirectional signal path is protocol and encoding agnostic, supporting myriad signaling types such as NRZ and PAM2/4/8/N, coded (8b/10b), uncoded, and out-of-band (SATA-OOB) data. 08458-034 50Ω VOP IIP 100Ω LINE DRIVER APPLICATIONS The ADA4960-1 in Figure 39 is a single-ended input configuration. The input is matched to the source with 50 Ω resistors. The ADA4960-1 outputs can be directly connected to the ADC inputs as long as the ADC input common mode is within the output common-mode range of the ADA4960-1. VIP IIN 0.1µF VIN 25Ω Figure 38. Differential Input Configuration Directly Driving the ADC 0.1µF RG AC 08458-033 VON 0.1µF 25Ω ADC ADA4960-1 VOP IIP 50Ω 50Ω 100Ω IIP 25Ω 50Ω VOP VIP VIP 08458-035 0.1µF VOCM Figure 39. Single-Ended Input Configuration Directly Driving the ADC Rev. 0 | Page 16 of 20 ADA4960-1 OVERDRIVE AND RECOVERY When overdriven, the ADA4960-1 limits its outputs to 3.4 V typical with no overshoot, as shown in Figure 42. This feature protects the ADC from transients, eliminating the need for additional external clamping at the inputs of the ADC. Recovery from overdrive is 6.7 ns to 1%, 9.3 ns to 0.5%, and 12.6 ns to 0.25% of the final output voltage, see Figure 43. 0.096 VOUTP – VOUTN 0.072 4.0 VOUT (V) VOUTP 3.5 3.0 0.048 1% 0.024 0.25% 2.5 VOCM 0 0.25% 0.5% –0.024 0 2 4 6 8 10 TIME (ns) 1.5 VOUTN 1.0 –8 –6 –4 –2 Figure 43. Output Overdrive Recovery 0 2 4 6 8 10 12 TIME (ns) 14 Figure 42. Output Overdrive, VIN = 1 V p-p, AV =12 dB Rev. 0 | Page 17 of 20 12 14 08458-052 2.0 08458-051 VOUT (V) 0.5% ADA4960-1 LAYOUT, GROUNDING, AND BYPASSING The ADA4960-1 is a high speed device. Realizing its superior performance requires attention to the details of high speed printed circuit board (PCB) design. If the driver/receiver is more than one-eighth of the wavelength from the amplifier, the signal trace widths should be minimal. This nontransmission line configuration requires the underlying and adjacent ground and low impedance planes to be cleared near the signal lines. The first requirement is to use a multilayer PCB with solid ground and power planes that cover as much of the board area as possible. The exposed thermal paddle is internally connected to the ground pin of the amplifier. Solder the paddle to the low impedance ground plane on the PCB to ensure the specified electrical performance and to provide thermal relief. To reduce thermal impedance further, it is recommended that the ground planes on all layers under the paddle be connected together with vias. Bypass each power supply pin directly to a nearby ground plane, as close to the device as possible. Use 0.1 μF high frequency ceramic chip capacitors. Provide low frequency bulk bypassing, using 10 μF tantalum capacitors from each supply to ground. Stray transmission line capacitance in combination with package parasitics can potentially form a resonant circuit at high frequencies, resulting in excessive gain peaking or possible oscillation. 1.5mm 1.2mm Use radio frequency transmission lines to connect the driver and receiver to the amplifier. 1.5mm 1.2mm Signal routing should be short and direct to avoid such parasitic effects. Provide symmetrical layout for complementary signals to maximize balanced performance. 0.3mm DIAMETER VIAS 08458-036 Minimize stray capacitance at the input/output pins by clearing the underlying ground and low impedance planes near these pins. Figure 44. Recommended PCB Thermal Attach Pad 1.5mm 1.2mm TOP METAL GROUND PLANE 08458-037 POWER PLANE BOTTOM METAL Figure 45. Cross-Section of a 4-Layer PCB Showing Thermal Via Connection to Buried Ground Plane Rev. 0 | Page 18 of 20 ADA4960-1 OUTLINE DIMENSIONS PIN 1 INDICATOR 0.30 0.25 0.20 0.50 BSC 13 PIN 1 INDICATOR 16 1 12 EXPOSED PAD 1.65 1.50 SQ 1.45 9 TOP VIEW 0.80 0.75 0.70 0.50 0.40 0.30 4 8 0.20 MIN BOTTOM VIEW 0.05 MAX 0.02 NOM COPLANARITY 0.08 0.20 REF SEATING PLANE 5 FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET. COMPLIANT TO JEDEC STANDARDS MO-229. 091609-A 3.10 3.00 SQ 2.90 Figure 46. 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ] 3 mm × 3 mm Body, Very Very Thin Quad (CP-16-27) Dimensions shown in millimeters ORDERING GUIDE Model 1 ADA4960-1ACPZ-R2 ADA4960-1ACPZ-RL ADA4960-1ACPZ-R7 1 Temperature Range −40°C to +85°C −40°C to +85°C −40°C to +85°C Package Description 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ] 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ] 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ] Z = RoHS Compliant Part. Rev. 0 | Page 19 of 20 Package Option CP-16-27 CP-16-27 CP-16-27 Ordering Quantity 250 5,000 1,500 Branding H23 H23 H23 ADA4960-1 NOTES ©2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D08458-0-4/10(0) Rev. 0 | Page 20 of 20
