Bruce Mayer, PE
Registered Electrical & Mechanical Engineer
BMayer@ChabotCollege.edu
Engineering-43: Engineering Circuit Analysis
1
Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
Learning Goals
Understand the Basic Physics of
Semiconductor PN Junctions which form most Diode Devices
Sketch the IV Characteristics of Typical
PN Junction Diodes
Use the Graphical LOAD-LINE method to determine the “Operating Point” of
Nonlinear (includes Diodes) Circuits
Engineering-43: Engineering Circuit Analysis
2
Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
Learning Goals
Analyze diode-containing Voltage-
Regulation Circuits
Use various math models for Diode operation to solve for Diode-containing
Circuit Voltages and/or Currents
Learn The difference between LARGE-signal and SMALL-Signal
Circuit Models
IDEAL and
PieceWise-Linear
Models
Engineering-43: Engineering Circuit Analysis
3
Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
Diode Models
LoadLine Analysis works well when the ckt connected to a
SINGLE Diode can be “Thevenized”
Engineering-43: Engineering Circuit Analysis
4
However, for
NONLinear ckts, such as those containing multiple diodes, construction of the LOAD-Curve
Eqn may be difficult, or even impossible.
Many such ckts can be analyzed by
Idealizing the diode
Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
Diode Models
Consider an Electrical Diode →
We can MODEL the V-I
Behavior of this Device in
Several ways
I
V
REAL
Behavior
IDEAL
Model
Engineering-43: Engineering Circuit Analysis
5
OFFSET
Model
LINEAR
Model
Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
Ideal Model (Ideal Rectifier)
Diode OFF
Analyze Ckts containing Ideal Diodes
1. Assume (or Guess) a “state” for each diode. Ideal Diodes have Two states
1.
ON → a SHORT Ckt when Fwd Biased
2.
OFF →an OPEN Ckt if Reverse Biased
2. Check the Assumed Opens & Shorts
• Should have Current thru the SHORTS
• Should have ∆V across the OPENS
Engineering-43: Engineering Circuit Analysis
6
Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
Ideal Model (Ideal Rectifier)
Diode OFF
3. Check to see if guesses for i-flow, ∆V, and BIAS-State are consistent with the Ideal-Diode Model
4. If i-flow, ∆V, and bias-V are consistent with the ideal model, then We’re
DONE.
• If we arrive at even a SINGLE
Inconsistency, then START OVER at step-1
Engineering-43: Engineering Circuit Analysis
7
Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
Example
Ideal Diode
Find For Ckt Below find: I & d 1
• Use the
Ideal
Diode
Model
V o
I d 2
I d 1
A
Engineering-43: Engineering Circuit Analysis
8
Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
Example
Ideal Diode
A
I d 1
I d 2
Assume BOTH
Diodes are ON or
Conducting
Engineering-43: Engineering Circuit Analysis
9
In this Case
V
D1
= V
D2
= 0
Thus D2 Anode is connected to GND
Then Find by Ohm
I d 2
10
0
10 k
V
1 mA
Next use KCL at
I d 1
Node-A (in = out)
I d 2
0
9 .
9 k
Bruce Mayer, PE
V
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
Example
Ideal Diode
A
I d 1
I d 2
I
Using I
D2 d 1
0
9 .
9 k
= 1 mA
V
1 mA
Engineering-43: Engineering Circuit Analysis
10
Thus I d 1
0 .
0101 mA
Now must Check that both Diodes are indeed conducting
From the analysis
I d 1
10 µA I d 2
1 mA
Thus the current thru both Diodes is positive which is consistent with the assumption
Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
Example
Ideal Diode
A
I d 1
I d 2
11
Since both Diodes conduct the Top of
Vo is connected to
GND thru D2 & D1
Engineering-43: Engineering Circuit Analysis
Another way to think about this is that since V
D2
V
D1
= 0 and
= 0 (by Short
Assumption) Find
Vo = GND+V
D2
+V
D1
= GND + 0 + 0 = 0
Thus the Answer
I d 1
10 µA V o
Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
0 V
Example
Ideal Diode
Find For Ckt Below find: I & d 1
• Use the
Ideal
Diode
Model
V o
I d 1
I d 2
• Note the different values on
R1 & R2
– Swapped
B
Engineering-43: Engineering Circuit Analysis
12
Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
Example
Ideal Diode
B
I d 1
I d 2
Again Assume
BOTH Diodes are
ON, or Conducting
Engineering-43: Engineering Circuit Analysis
13
As Before
V
D1
= V
D2
= 0
Again V
B shorted to
GND thru D1
Then Find by Ohm
I d 2
10
0
V
9 .
9 k
1 .
01 mA
Now use KCL at
Node-B (in = out)
I d 1
I d 2
0
1 0 k
Bruce Mayer, PE
V
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
Example
Ideal Diode
B
I d 1
I d 2
I d 1
Using I
D2
0
1 0 k
= 1.01 mA
V
1 .
01 mA
Engineering-43: Engineering Circuit Analysis
14
Thus I d 1
0 .
01 mA
Now must Check that both Diodes are indeed conducting
From the analysis
I d 1
10 µA I d 2
1 .
01 mA
We find and
INCONSISTENCY and our Assumption is WRONG
Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
Example
Ideal Diode
B
I d 1
I d 2
In this Case D1 is an OPEN → I
D1
=0
Current I
D2 must flow thru BOTH
Resistors
I
Then Find by Ohm d 2
10
10
9 .
9
V k
1 .
005 mA Must Iterate
Assume
• D1 → OFF
D2 → ON
Engineering-43: Engineering Circuit Analysis
15
Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
Example
Ideal Diode
B
I d 1
I d 2
Must Check that D1 is
REVERSE Biased as it is assumed OFF
By KVL & Ohm
V
B
10 V
10 kΩ
1 .
005 mA
V
B
0 .
05 V
50 mV
Thus D1 is INDEED
Reverse-Biased,
Thus the Ckt operation is
Consistent with our
Assumption
Engineering-43: Engineering Circuit Analysis
16
Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
Example
Ideal Diode
B
I d 1
I d 2
Calculate Vo by noting that:
D2 is ON → V
D2
D1 is OFF →
Current can only flow thru D2
= 0
In this case Vo = V
B
By the Previous
Calculation, Find
I d 1
0 A V o
50 mV
Engineering-43: Engineering Circuit Analysis
17
Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
Offset & Linear Models
The Offset Model The Linear Model
Better than Ideal, but no account of
Forward-Slope
Engineering-43: Engineering Circuit Analysis
18
The model eqn: v
D
R b i
D
Yet more
0 .
6 V accurate, but also does not account for
Rev-Bias Brk-Down
Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
Point Slope Line Eqn
When constructing multipiece-wise linear models, the
Point-Slope
Equation is extremely Useful
y
y
1
m
x
x
1
• Where m
y x
y x
2
2
– (x
1
, y
1
) & (x
2
y x
1
1
, y
2
) are
KNOWN Points
Engineering-43: Engineering Circuit Analysis
19
Example: Find Eqn for line-segment:
18
(3,17)
16
14
12
10
8
6
(19,5)
4
2 4 m
16 6
y
x
8
5
10 12
x
17
19
3
14
12
16
18 m
3
4
Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
20
Point Slope Line Eqn
Using the 2 nd Point
18
(3,17)
16
14
12
Multiply by m, move
−5 to other side of =
y
5
3
4
x
19
10
8 y
5
3
4 x
57
4
20
6
(19,5)
4
2 4 6 8 10 12 14 16 18 x
y
5
3 x
19
4
Can easily convert to y = mx+b
20
Engineering-43: Engineering Circuit Analysis y
3
4 x
57
4
5 y
3
4 x
57
4
20
4 y
3 x
77
4
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
Slopes on vi Curve
With Reference to the Point-Slope eqn v takes over for x , and
If the curve is
NONlinear then the local conductance is the first Derivative i takes over for y m vi , Op
di dv
Op
Amps
Volt
Siemens
The Slope on a vi
Curve is a m vi conductance
I
V
G
Amps
Volt
S iemens m vi
Engineering-43: Engineering Circuit Analysis
21 m vi , Op
di dv
Op
g
Recall the Op-Pt is also the Q-Pt m vi , Op
m vi , Q
di
dv
Q
Bruce Mayer, PE g
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
Slopes on vi Curve
18
Linear VI Curve
Engineering-43: Engineering Circuit Analysis
22
Finally recall that conductance & resistance are
Inverses m vi
G
1
Example: Find the
R
RESISTANCE of the device associated with the VI curve that follows
16
14
12
10
8
6
4
2 m vi
4 6
I
V
8
10 12 14 16
V (volts)
17
5
Amps
19
3
Volts
18
20 m vi
12 A
16 V
G
3
Siemens
4
Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
Slopes on vi Curve
18
Linear VI Curve
Since R = 1/G Find the Device
R
Resistance as
V
I
19
17
3
5
Volts
Amps
16
14
12
10
1 m vi
R
1.333
8
4
3
Ohms
6 m vi
G
1
R
0.75
S
23
R
16 V
12 A
For a NONlinear vi
4
2 4 6 8 10 12 14 16
V (volts)
The General Reln r
Op
1 g
di
1 or alternativ ely dv
Op curve the local slope then: r = 1/g
Engineering-43: Engineering Circuit Analysis r
Op
dv di
Op
r
Q
dv di
Q
Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
18 20
Example PieceWise Linear Model
Construct a
PieceWise
Linear
Model for the Zener vi curve shown at
Right
Engineering-43: Engineering Circuit Analysis
24
Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
PieceWise Linear Zener
Us Pt-Slp eqn with
(0.6V,0mA) for Pt-1 i
D
OR
0
100 mS
v
D
: i
D
100 mS
v
D
0 .
6 V
60 mA
Segment- B is easy m
A
m for Segment A
R
1
A
I
V
100
1.6
0
0.6
mA
V m
A
100 mS
1
10
Engineering-43: Engineering Circuit Analysis
25 i
D
0
Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
PieceWise Linear Zener
Us Pt-Slp eqn with
(−6V,0mA) for Pt-1 i
D
0
OR : i
D
83 .
3 mS
v
D
83 .
3 mS
v
D
6 V
500 mA m
C
m for Segment C
1
R
C
I
V
0
6
100
7 .
2
mA
V m
C
100 mA
1.2V
83 .
33 mS
1
12
Thus the PieceWise
Model for the Zener i
D
100 mS
8 3.3mS
v
D
0 v
D
60 mA
500 mA if if if
v
D
0 .
6 V
6 V v
D
v
D
0
6 V
.
6 V
Engineering-43: Engineering Circuit Analysis
26
Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
Example PieceWise Linear Model
Alternatively in terms of i
D
v
D
10
Resistances
60 mA if
0 if v
D
6 V
v
12
D
500 mA if v
D v
D
0 .
6 V
6 V
0 .
6 V
ADVICE: remember the
Pt-Slope
27
Line-Eqn
Engineering-43: Engineering Circuit Analysis Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
Half-Wave Rectifier Ckt
Consider an Sinusoidal V-Source, such as an AC socket in your house, supplying power to a Load thru a Diode
Engineering-43: Engineering Circuit Analysis
28
Power Input Load Voltage
Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
HalfWave Rectifier
Note that the Doide is FWD-Biased during only the
POSITIVE half-cycle of the Source
Using this simple ckt provides to the load
ONLY positive-V; a good thing sometimes
However, the positive voltage comes in nasty
PULSES which are not well tolerated by positive-V needing loads
Engineering-43: Engineering Circuit Analysis
29
Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
Smoothed HalfWave Rectifier
Adding a Cap to the
Circuit creates a
Smoothing effect
This produces v
L
(t) and i
L
(t) curves
In this case the
Diode Conducts
ONLY when v s
>v
C and v
C
=v
L
Engineering-43: Engineering Circuit Analysis
30 i
C i
D
C
dv
L
i
C
i
L dt
Note that i
L
(t) is approx. constant
Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
Smoothed HalfWave Rectifier
The change in
Voltage across the
Cap is called “Ripple”
Ripple
Often times the load has a Ripple “Limit” from which we determine Cap size
Engineering-43: Engineering Circuit Analysis
31
From the i
L
(t) curve on the previous slide note:
• Cap Discharges for
Almost the ENTIRE
Cycle time, T (diode Off)
• The Load Current is approx. constant, I
L
Recall from EARLY in the Class
Charge
Current
Time
Or, symbolical ly : Q
I
T
Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
Smoothed HalfWave Rectifier
Also from Cap
Physics
(chp3)
Q cap
C
V cap
Note that both these equations are
Approximate, but they are still useful
32
In the Smoother Ckt the Cap charges during the “Ripple” portion of the curve
Engineering-43: Engineering Circuit Analysis for initial Ckt Design
Equating the Charge
& Discharge “Q’s find
Q cap
Charge Discharge
C
V r
I
L
T
Solving the equations for the
Cap Value needed for a given V r
T
C
I
L
V r
Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
Smoothed HalfWave Rectifier
Find the Approximate Average Load
Voltage
V
L,lo
V
L,hi
V
L , avg
33
V
L , avg
V m
V
L , hi
V
L , lo
2
Engineering-43: Engineering Circuit Analysis
V m
V r
2
Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
Capacitor-Size Effect
Any load will discharge the capacitor. In this case, the output will depend on how the RC time constant compares with the period of the input signal.
The plots at right consider the various cases for the simple circuit above with a
1kHz, 5V sinusoidal input
RC T
1 mS
Engineering-43: Engineering Circuit Analysis
34
Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
Full Wave Rectifier
The half-wave ckt will take an AC-
Voltage and convert it to DC, but the rectified signal has gaps in it.
The gaps can be eliminated thru the use of a Full-Wave rectifier ckt
Engineering-43: Engineering Circuit Analysis
35
The Diodes are
• Face-to-Face (right)
• Butt-to-Butt (left)
This rectified output has
NO Gaps
Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
Full Wave Rectifier Operation
D1 Supplies V to Load
D4 Supplies V to Load
Engineering-43: Engineering Circuit Analysis
36
Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
Full Wave Rectifier Smoothing
The Ripple on the
FULL wave Ckt is about 50% of that for the half-wave ckt
Since the Cap
DIScharges only a half-period compared to the half-wave ckt, the size of the
“smoothing” cap is then also halved:
C
I
L
T
2 V r
Engineering-43: Engineering Circuit Analysis
37
Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
Small Signal Models
Often we use NonLinear Circuits to
Amplify, or otherwise modify, non-steady
Signals such as ac-sinusoids that are small compared to the DC Operating
Point, or Q-Point of the Circuit.
Over a small v or i range even Non Linear devices appear linear .
This allows us to construct a so-called
38 small signal Linear Model
Engineering-43: Engineering Circuit Analysis Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
Small Signal Analysis
Small signal Analysis is usually done in
Two Parts:
1. Large-Signal DC Operating Point (Q-Pt)
2. Linearize about the Q-Pt using calculus
Recall from dy
Calculus dx
y
x
This approximation become more accrate as ∆y & ∆x become smaller
Engineering-43: Engineering Circuit Analysis
39
Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
Small Signal Analsyis
Now let y→i
D
, and x→ v
D
Use a DC power Supply to set the operating point on the diode curve as shown at right
• This could be done using LoadLine methods
From Calculus di
D dv
D
i
D
v
D
units of A/V or Siemens
Next Take derivative about the Q-Pt
Engineering-43: Engineering Circuit Analysis
40
Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
Small Signal Analysis
About Q-Pt di
D dv
D
Q
i
D
v
D near Q
Now if we have a math model for the vi curve, and we inject ON TOP of
V
DQ
∆v
D a small signal, find
Engineering-43: Engineering Circuit Analysis
41
i
D
di
D dv
D
Q
D
g d
v
D
The derivative is the diode small-signal
Conductance at Q
Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
Small Signal Analysis
In the large signal
Case: R = 1/G
By analogy In the small signal case:
r = 1/g
Also since small signal analysis is associated with small amounts that change with time…
Define the Diode’s
DYNAMIC, smallsignal Conductance and Resistance r g d d
di
D dv
D
Q
1 g d
di
D dv
D
Q
1
dv
D di
D
Q
Engineering-43: Engineering Circuit Analysis
42
Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
Small Signal Analysis r d
Note Units for r d
di
D dv
D
Q
1
Amp
Volt
1
Volt
Amp
Recall the
approximation for i
i
D
di
D dv
D
Q
D
v r d
D
D
Change Notation for
Small
Signal conditions
i
D
v
D
i d v d
Engineering-43: Engineering Circuit Analysis
43
Find r d for a
“Shockley” Diode in majority FWD-Bias
Recall Shockley Eqn i
D
I s e
v
D nV
T
1
Then the Largesignal Operating
I
DQ
Point at v
D
I s e
V
DQ nV
T
1
= V
DQ
I s e
V
DQ nV
T
Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
Small Signal Analysis
Taking the derivative of the
Shockely Eqn di
D dv
D
Q
I
S e
v
D nV
T
1 nV
T
1 nV
T
I
S e
v
D nV
T
Recall from last sld
I s e
V
DQ nV
T
I
DQ
Sub this Reln into the Derivative Eqn di
D dv
D
Q
1 nV
T
I
DQ
I
DQ nV
T
Recall r d
di
D dv
D
Q
1
Subbing for di
D
/dv
D r d
di
D dv
D
Q
1
I
DQ nV
T
1
nV
T
I
DQ
Engineering-43: Engineering Circuit Analysis
44
Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
Notation: Large, Small, Total
V
DQ and I
DQ are the LARGE Signal operating point (Q-Pt) DC quantities
• These are STEADY-STATE values
v
D and i
D are the TOTAL and
INSTANTANEQOUS quantities
• These values are not necessarily steadystate. To emphasize this we can write v
D
(t) and i
D
(t)
Engineering-43: Engineering Circuit Analysis
45
Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
Notation: Large, Small, Total
v d and i d are the SMALL, AC quantities
• These values are not necessarily steadystate. To emphasize this we can write v d
(t) and i d
(t)
An
Example for
Diode
Current notation
Engineering-43: Engineering Circuit Analysis
46
Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
Effect of Q-Pt Location
From i d
Analysis
v d r d i d 2 , pp i d 1 pp and r d
nV
T
I
DQ v d 1 pp v d 2 pp
Engineering-43: Engineering Circuit Analysis
47
Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
DC Srcs
SHORTS in Small-Signal
In the small-signal equivalent circuit DC voltage-sources are represented by
SHORT CIRUITS; since their voltage is
CONSTANT, they exhibit ZERO
INCREMENTAL, or SIGNAL, voltage
Alternative Statement: Since a DC
Voltage source has an ac component of current, but NO ac VOLTAGE, the DC
Voltage Source is equivalent to a
48
SHORT circuit for ac signals
Engineering-43: Engineering Circuit Analysis Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
Setting Q, Injecting v
Consider this ckt with AC & DC V-srcs
Sets Q
Sets v d
Engineering-43: Engineering Circuit Analysis
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Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
Large and Small Signal Ckts
Recall from Chps 3 and 5 for Caps:
• OPENS to DC
• SHORTS to fast AC
Z
C
1
j
C
Thus if C
1 it COUPLES v in
(t) with the rest of the ckt is LARGE
Similarly, Large C
2 couples to the Load
Engineering-43: Engineering Circuit Analysis
50
To Find the Q-point
DE couple v in and v o to arrive at the DC circuit
Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
Large and Small Signal Ckts
Finding the Large signal Model was easy; the Caps acts as an OPENS
The Small Signal Ckt needs more work
• Any DC V-Supply is a SHORT to GND
• The Diode is replaced by r d
(or g d
)
• The Caps are Shorts
Engineering-43: Engineering Circuit Analysis
51
Thus the Small Signal ckt for the above
Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
Example: Small Signal Gain
Find the Small
Signal Amplification
(Gain), A v
, of the previous circuit
Using the Small
Signal Circuit
Engineering-43: Engineering Circuit Analysis
52
Note that R
C
, r d
, and
R
L are in Parallel
1
R p
1
R
C
1
R d
1
R
L
And v o
(t) appears across this parallel combination
The equivalent ckt
Bruce Mayer, PE v o
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
Example: Small Signal Gain
Thus for this Ckt the
Large, Small, and small-Equivalent ckts
1
R p
1
R
C
1
R d
1
R
L v o
Then the
Amplification (Gain) by Voltage Divider
A v
v v in o
R
R p
R p
Engineering-43: Engineering Circuit Analysis
53
Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
LARGE
Signal
Model
Common Collector
Amplifier
Engineering-43: Engineering Circuit Analysis
54
SMALL
Signal
Model
Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
Bruce Mayer, PE
Registered Electrical & Mechanical Engineer
BMayer@ChabotCollege.edu
Engineering-43: Engineering Circuit Analysis
55
Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
v o
v o
Engineering-43: Engineering Circuit Analysis
56
Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
Small Signal Analysis
In the large signal
Case: R = 1/G
By analogy In the small signal case:
r = 1/g
Also since small signal analysis is associated with small amounts that change with time…
Define the Diode’s
DYNAMIC
Conductance and
Resistance r g d d
di
D dv
D
Q
1 g d
di
D dv
D
Q
1
dv
D di
D
Q
Engineering-43: Engineering Circuit Analysis
57
Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
P10.67
Graph v o vs. v i for v i
: −5V to +5V
6
-6 -5 -4 -3 -2 -1
0
-1
0
-2
5
4
3
2
1
1
-3
-4
-5
-6 file =XY_Plot_0211.xls
2 3 4 5 6
Engineering-43: Engineering Circuit Analysis
58
Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
Engineering-43: Engineering Circuit Analysis
59
Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
Engineering-43: Engineering Circuit Analysis
60
Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
Engineering-43: Engineering Circuit Analysis
61
Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx
Engineering-43: Engineering Circuit Analysis
62
Bruce Mayer, PE
BMayer@ChabotCollege.edu • ENGR-43_Lec-10b_Diode-2_SmallSignalAnalysis.pptx