by Erik S. U.S.

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Implementation of a System of Visual Indicators at Intel's D2 Fab
by
Erik S. Smith
B.S. Systems Engineering, U.S. Naval Academy, 1994
Submitted to the Sloan School of Management and the
Department of Electrical Engineering and Computer Science
In Partial Fulfillment of the Requirements for the Degrees of
Master of Science in Management
and
Master of Science in Electrical Engineering
In conjunction with the Leaders for Manufacturing Program at the
Massachusetts Institute of Technology
June 2003
C Massachusetts Institute of Technology, 2003. All rights reserved.
Signature of Author
MIT Sloan School of Management
Department of Electrical Engineering and Computer Science
May 09, 2003
Certified by
Duane S. Boning, Thesis Advisor
Professor of Electrical Engineering and Computer Science
Certified by _
Sara L. Beckman, Thesis Advisor
Senior Lecturer, Haas School of Business, University of California, Berkeley
Reviewed by
Donald B. Rosenfield, Thesis Reader
Senior Lecturgr, Sloan School of Management
Accepted by
____________________
V
Margaret C. Andrews
Director of Master's Program, Sloan School of Management
Accepted by
Arthur C. Smith
Chair, Committee on Graduate Students
Electrical Engineering and Computer Science
MASSACHUSETTS INSTITUTE
IOF TECHNOLOGY
JUL 0 7 2003
1
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Implementation of a System of Visual Indicators at Intel's Fab D2
by
Erik S. Smith
Submitted to the Sloan School of Management and the
Department of Electrical Engineering and Computer Science on May 09, 2003
in Partial Fulfillment of the Requirements for the Degrees of
Master of Science in Management and
Master of Science in Electrical Engineering
ABSTRACT
In an ideal world, data produced in manufacturing environments would instantaneously be
gathered, evaluated, consolidated, and disseminated to the point of use. With this information, workers
would focus their energies on areas that need the most attention or adjust their performance as necessary
to meet the demands created by ever-changing production conditions. Even better, given appropriate
information, workers would act proactively to resolve issues before they become disruptions to the
production process. In reality, however, manufacturers often lack methods that provide timely, accurate,
and relevant feedback to the decision makers that need it the most - workers, engineers, and supervisors
that are closest to the production process on the factory floor. The more complex the production process,
the greater the amount of information produced, and the greater is the need for information that can be fed
back to the manufacturing system for consequent use in evaluating and adjusting performance.
The central theme explored in this work is that information, specifically the visual display of
information, is an essential enabler to the manufacturing process. In developing this idea, this thesis
challenges traditional mental models of manufacturing systems, which focus on labor, capital, and
material as the key aspects of manufacturing systems. This new view includes one more element,
information, as a crucial component of any manufacturing system. Information is especially important in
state of the art semiconductor manufacturing facilities, where production technicians, engineers,
supervisors, and other managers constantly struggle with tremendous amounts of complexity in factory
operations. The factors that influence complexity at these facilities include aspects inherent to
semiconductor manufacturing processes, such as reentrant flow, process detail complexity, and process
disruptions. Other important determinants of the difficulties personnel must deal with on a daily basis
include aspects unique to a specific facility's operations, such as process proliferation, factory layout, and
factory-specific prioritization schemes.
Work for this thesis resulted in the implementation and development of two highly visual and
intuitive tools that provide near-real time performance indications at Intel's Fab D2 - a semiconductor
manufacturing facility in Santa Clara, CA. The first tool, Electronic Monitor Boards (EMBs), provides
indications about factory conditions as they evolve in real-time. Implementation of the system as
configured is expected to save the factory at least $250,000 per annum by reducing waste in the form of
excess worker motion. In addition, several enhancements to this system, such as provisions to display
information about upcoming Preventive Maintenance actions, are proposed. The second system
developed during the work is a highly visual, intuitive system that engineers can use to better understand
performance of their processing tools in regards to Statistical Process Control parameters.
Thesis Advisors:
Sara L. Beckman, Senior Lecturer, Haas School of Business, University of California, Berkeley
Duane S. Boning, Professor of Electrical Engineering and Computer Science
Thesis Reader:
Donald B. Rosenfield, Senior Lecturer, Sloan School of Management
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ACKNOWLEDGEMENTS
First I would like to thank the employees at Intel Corporation's D2 Fab, all of whom were
exceedingly patient and supportive of the crazy ideas and initiatives that I brought to their factory.
The Manufacturing Systems Engineering Group deserves special mention, since it was with them
that I found a "home" at D2. Chris Keith (LFM '96), Hyung Kang, Joanna Shear, Chris Mullendore, Joe
McMorrow, David Auchard, and Erik Stewart (LFM '02) - thank you all for the thoughtful feedback that
you provided me throughout my project. Erik - I will miss our morning coffees!
Thanks to Darin McDonald, the D2 Etch Functional Area Manager, who championed the ideas
that I brought to the factory. Without his backing and support, this change initiative would not have been
possible.
I am grateful to the LFM Program at MIT, including all of my classmates and the LFM sponsor
companies, for the tremendous opportunities they have afforded me to learn and grow as an individual.
Duane Boning and Sara Beckman, who provided me with guidance and helped me correct course
froi time to time - thank you!
Finally, I would like to thank my parents and family for their unconditional love and support.
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Table of Contents
Title Page
Abstract
Acknowledgements
Table of Contents
List of Figures
List of Tables
1
3
5
7
II
13
1.2
1.3
1.4
1.5
1.6
Introduction
Information as a Key Production System Component
Manufacturing Information Needs
Shop Floor Information at Intel's Fab D2
Fab D2 Process Engineers and Statistical Process Control
Information Visualization and Decision Making
Thesis Structure
15
15
15
16
17
18
18
2
2.1
2.2
2.3
Intel and Fab D2
Fab D2's Relationship to Intel
Fab D2's Employees
Fab D2's Facilities
21
21
22
23
3
3.1
3.1.1
3.1.2
3.1.3
3.1.4
3.2
3.2.1
3.2.2
3.2.3
3.2.4
3.2.5
3.2.6
3.3
Sources of Complexity at Fab D2
Complexity Inherent to the Semiconductor Manufacturing Industry
Process Detail Complexity
Reentrant Flow
Planned and Unplanned Process Disruptions
Other Factors - Rework, Yield Loss and Queue Time Limits
Complicating Factors Unique to Fab D2
Factory Layout
Process Proliferation
Automated Material Handling System
Lot to Lens Dedication
Special Material
Prioritization Schemes
Summary
27
27
27
28
30
30
31
31
31
32
32
33
33
34
4
4.1
4.2
4.2.1
4.2.2
4.2.3
4.2.4
4.2.5
4.3
4.4
4.4.1
4.4.2
Hlow Fab D2 Deals with Complexity
Meetings
Reports
Automated Reports - Deficiencies
Time Latency
Dispersed Data
User Friendliness
Conflicting Performance Metrics
Factory Improvement Team (FIT)
Automated Lot Scheduling - Factory Scheduler
Approximate System Renderings
Increased Dependency
35
35
36
37
37
37
37
38
38
38
38
40
1.1
Page 7
4.5
4.6
4.7
4.8
4.9
Factory Automation Strategies
Variation Reduction
Human Resource Policy
A Critique of Fab D2's Policies
Summary
40
41
41
42
43
5
5.1
5.2
5.3
5.4
5.5
5.6
Information Visualization and Decision-making
Information, Decision-making, and Feedback
The Gulf of Evaluation
Information Visualization, Memory, Perception, and Human Thought
Information Visualization and the Gulf of Evaluation
A Demonstration of Information Visualization
Computers and Information Visualization
45
45
46
47
48
48
51
6
6.1
6.2
6.3
6.4
6.5
6.5.1
6.5.2
6.5.2.1
6.5.2.2
6.5.3
6.5.4
6.5.5
6.6
6.6.1
6.6.2
6.7
6.7.1
6.7.2
6.7.3
6.7.4
6.7.5
6.7.5.1
6.7.5.2
6.7.5.3
6.7.5.4
6.7.5.5
Information Visualization and Decision-Making on the Factory Floor - EMBs
MTUI as a Primary Information Source
MTUI Shortcomings
Alternate Information Sources - PFMBs
Electronic Monitor Boards (EMBs) - Background
System Capabilities and Architecture
Information Sources
Modes of Operation
Equipment View
Operations View
Client Configurability
System Flexibility
EMB Productivity Impacts
Implementation Issues
Human Implementation Issues
Technical Issues
Suggestions for System Improvement
Preventive Maintenance Information
Geographic Mapping
Recipe Grouping
Multiple Client Configurations
Additional System Improvements
System Goaling
Tool and Layer Qualifications
Litho Dedications
Priority Lot Advance Notifications
Queue Time Limits
53
53
55
57
59
59
59
60
60
62
63
64
65
67
67
67
68
68
70
72
73
74
74
74
74
74
75
7
7.1
7.2
7.3
7.4
7.4.1
7.4.2
7.4.3
Engineering Decision Making with Statistical Process Control
SPC - A Brief Introduction
Fab D2 Process Engineers - SPC Information Overload
The Clockspeed of SPC Decision Making
Inadequate Tools
Quickview
Email and Pager Notification
SPCView2
77
77
77
77
79
79
79
80
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7.5
7.6
7.7
7.7.1
7.7.2
7.8
7.9
7.9.1
7.9.2
Productivity Impacts
Process Engineers' Rapid Action Tool (PERAT)
PERAT Extensions - Multivariate SPC
Quantifying False alarm Risk for Tools with Multiple Parameters
Multivariate Solutions to the False Alarm Problem
PERAT Advantages
Implementation Issues
Technical Considerations
Concerns About System Over Reliance
80
81
82
83
83
86
87
87
88
8
8.1
8.1.1
8.1.2
8.1.3
8.1.4
8.1.5
8.2
8.3
8.4
Themes Common to Visual Information Systems
Principles of Design
Visibility
A Good Conceptual Model
Good Mappings
A Simple Litmus Test for Usability
Feedback
Information Hiding
Configurability
Summary
89
89
89
90
90
91
91
92
92
93
9
9.1
9.2
9.3
9.4
9.5
9.6
9.7
9.8
9.9
9.10
9.11
9.12
9.13
9.14
9.15
9.16
9.17
9. 18
9.19
9.20
9.21
9.22
9.23
9.24
9.25
Challenges to Change
Introduction and Overview
The Sloan Leadership Model
Fab D2
The Initial Process of Sensemaking and Discovery
The Project Scope Begins to Change
Incomprehensible Factory Flow
Lack of Feedback as an Impediment to Continuous Improvement Efforts
Information Challenges on the Factory Floor
Economic Consequences
The Project Changes Scope
EMBs - A Brief Description
Three Perspectives on Organizational Processes
Strategic Issues
Political Issues
Creating and Communicating a Vision While Achieving Buy-In and Generating "Pull"
Cultural Aspects Affecting the Change Effort
Defining Your Own Work
Relating, Visioning, and Inventing as a Simultaneous Process
Fab D2 and the "Not Invented Here" Syndrome
Cultural Arrogance as a Barrier to Implementation
Chicken or Egg?
Overcoming Cultural Barriers
Intel's Culture and the Issue of Control
Ensuring Continuity of Effort and Project Success
Implementation Status
Page 9
95
95
95
96
97
97
98
98
99
100
100
101
101
101
102
103
103
104
104
105
106
106
106
107
108
108
10
10.1
10.2
10.3
10.4
10.5
Concluding Thoughts
Information and Manufacturing Systems
Worker Participation in Manufacturing's Motif
The Irony of Intel's Manufacturing Operations
Intel and the Issue of Control
An Argument for Concurrent Design of Manufacturing and Information Systems
Glossary of Terms and Acronyms
Bibliography
111
111
111
112
112
112
115
117
Page 10
List of Figures
Figure 1 - A Typical Bay at Fab D2
16
Figure 2 - A Typical Passageway at Fab D2
16
Figure 3 - Intel's Fab D2
22
Figure 4 - A Bird's Eye View of Fab D2's layout
22
Figure 5 - A Typical Bay/Chase Layout
23
Figure 6 - Fab D2's Position on the Hayes-Wheelwright Diagram
24
Figure 7 - Growth in Complexity of Intel's Flash Memory Processes - Activities
27
Figure 8 - Growth in Complexity of Intel's Flash Memory Processes - Mask Layers
27
Figure 9 - Basic Semiconductor Processing Flow
28
Figure 10 - Fab D2 Process Flow for a "Typical" Mask Layer - 884 Process
31
Figure
I1
- An Example MTUI Lot Dispatch Screen
39
Figure 12 - The Action Cycle
46
Figure 13 - The Seven Stages of Action
47
Figure 14 - Fab D2 and The Seven Stages of Action
48
Figure 15 - Graphical Representations of Anscombe's Quartet
50
Figure 16 - A typical MTUI Lot Dispatch Screen
53
Figure 17 - A typical MTUI Entity Status Screen
54
Figure 18 - A typical MTUI Station Controller Screen
55
Figure 19 - A typical fab worker's work area
56
Figure 20 - An Example Process RTC Flexible Monitor Board
57
Figure 21 - PFMB Configuration Screen
58
Figure 22 - Generalized EMB Architecture
60
Figure 23 - An Example EMB Equipment View
61
Figure 24 - An Example EMB Tool State "Drill Down" Information
62
Figure 25 - An Example EMB Lot Detail "Drill Down" Information
63
Figure 26 - An Example EMB Operations View
64
Figure 27 - An Example EMB Operations View Configuration Screen
65
Figure 28 - An Example Equipment View with Parent-Child Relationships
66
Figure 29 - Pending PM Information
69
Figure 30 - Overdue PM Information
70
Figure 31 - PM Actions in Progress
71
Figure 32 - An Example of Geographic Mapping
72
Page 11
Figure 34 - An Example SPC++ Chart
78
Figure 35 - The PERAT Concept
82
Figure 36 - Overview of the Visualization Process
92
Figure 37 - The Sloan Leadership Model
96
Page 12
List of Tables
Table I - Production Processes at Fab D2
21
Table 2 - Fab D2 Prioritization Scheme
34
Table 3 - Some D2 Recurring Meetings
35
Table 4 - Some D2 Reports
36
Table 5 - Raw Data Describing Anscombe's Quartet
49
Table 6 - Summary of Statistics for Anscombe's Quartet
49
Table 7 - EMB Tool Status Color Indications
60
Table 8 - Probabilities of False Alarms and ARLs for Various n
83
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Page 14
I
Introduction
This chapter begins with the contention that information is a key component of modern
manufacturing systems. Following this is a brief overview of the information challenges faced by
employees, specifically Manufacturing Technicians (MTs) and Process Engineers, at Intel's Fab D2, the
focus of this research effort. Next, the motivation and objectives for this work - implementing and
developing tools that improve productivity with highly visual production indicators - are discussed.
Finally, the thesis organization is presented.
1.1
Information as a Key Production System Component
A naYve view suggests that manufacturing systems consume three inputs - material, capital, and
labor, and that they produce one output - product (Pindyck, Ch. 7). Capital transforms materials into
product. Labor interacts with the other three entities by performing functions such as operating and
maintaining capital, aiding in the movement of material, and ensuring product quality.
This thesis argues that this view is incomplete. In addition to the tangible factors of production
listed above, one other less tangible but equally important resource must also be considered information, which manufacturing systems both produce and consume. Information implicitly marries the
other three factors by providing the factory workforce with indications of production system performance
- including, but not
limited to, throughput, material quality, WIP locations and quantities, labor
productivity, and equipment states. With these performance indications, labor reacts and adjusts to
changing factory conditions, and in the best cases, proactively resolves issues. Without this information,
or when long delays exist in providing this information to the factory workforce, production systems do
not perform as efficiently or as effectively as they might.
1.2
Manufacturing Information Needs
People performing different roles in fast-paced manufacturing environments have differing
information needs. Factory managers, for instance, require information that is broader and more general
in scope than workers who perform specific processing steps. Everyone, however, regardless of his or her
role within the organization, from senior manager to rank-and-file worker, needs answers to the same
basic question - "How is my area of responsibility performing?" The answer is often multifaceted,
spurring employees to ask further questions as they seek deeper understanding of their work
environments, questions such as "What are the problems that I should focus on next? Am
I meeting
commitments to my customers in terms of quality and throughput? and How can I improve?"
Driven by rapidly changing conditions, work in complex production environments equates with a
constant search for information. This is especially true at leading edge semiconductor manufacturing
firms, which boast some of the world's most complex production systems. As a result, firms within this
industry demand increasingly greater degrees of technical sophistication from their front-line workers.
Page 15
Entry-level production positions at Intel Corporation, for example, now require the equivalent of a
technical Associate's degree.' Such a high level of personal achievement for even the most basic
production tasks is seen as a requisite indication of individual initiative, capacity to grasp difficult
technical concepts, and ability to participate in the complex technical decision-making that regularly
occurs on the factory floor.
1.3
Shop Floor Information at Intel's Fab D2
In order to live up to these expectations, employees require information that they can use to
monitor and adjust their performance and act proactively in resolving issues before they negatively impact
the factory's operations. A cursory inspection of Intel's Fab D2 clean rooms (Figs. I and 2, below),
however, reveals that little information of this type is systematically targeted to workers.
Fi nreq 1 ond ?
Little Tnfonmttin is targeted to fNtnry workers in their wnrksp
nt
Intel
-Ea"hL
Since factory workers have few indications of factory performance, and how they fit into the "big
picture," workers often have little understanding of how well they are executing their responsibilities.
This is not to suggest that these workers have little or no data available for their use. In fact, quite the
contrary situation exists - workers have an overabundance of information sources to pull from. Station
controllers2 , for instance, provide workers with details about Work In Process (WIP) and specific tool
status.
In addition, online reports are available that could provide them with specifics such as tool and
WIP status outside their areas of focus, and how they are affected by events upstream and downstream of
their stations. Despite this, for a variety of reasons, accessing and making sense of this information is
time consuming, especially when information from several reports must be combined. Since their
performance is measured by the amount of material that they can process during the course of a shift, and
2
Conversations with Fab D2 Hiring Managers and Human Resource Personnel, July 2002.
Station Controller: a computer terminal connected to a specific tool (piece of manufacturing
equipment) that
allows manufacturing technicians to control that tool's functions and glean information about tool conditions via a
computer user interface.
Page 16
not their research skills, workers use information sources selectively, rarely making effort to understand
much outside their specific areas of responsibility.
In order to gain an understanding of how well the factory is operating, like many other production
facilities worldwide (Greif, p. xxii), an observer at D2 must step outside of the clean rooms and enter the
cubicles and conference rooms where managers and engineers evaluate the factory's performance and
determine courses of action. A contention with this approach, no matter how organized and disciplined,
is that decisions are usually made after some delay, hours if not shifts, days, or even weeks, after
problems have occurred. Feedback to the shop floor is often slow, and messages about improvement
efforts get lost in the noise of changing factory conditions and priorities. Even worse, long feedback
delays confound problems and their roots, causing important problems to be ignored or the wrong causes
to be attacked. The result is that crucial opportunities for learning are lost - of the roughly 1,000
employees at the facility, 600 work on the factory floor, mostly disconnected from factory decisionmaking processes.
This argument is not meant to completely debunk Fab D2's decision-making methodology.
Problems must often be solved outside the hectic factory floor. This is especially true when highly
qualified experts must solve complex technical issues. In many cases, for instance, only engineers with
advanced understanding of semiconductor device physics can solve issues that enable Intel's products to
compete at the "bleeding edge" of device performance. Despite this, it is apparent that more can be done
in providing information that better leverages capabilities of factory workers, highly qualified in their
own right. The work accomplished in the first portion of this project constitutes an important first step in
this direction by providing an information system that end users can exploit in managing their work,
allowing them to improve their productivity and become more fully engaged in factory decision making
processes.
1.4
Fab D2 Process Engineers and Statistical Process Control
Fab D2 process engineers' confront a dilemma similar to that of the factory's production
technicians. Like production workers, process engineers are highly qualified individuals; an entry-level
process engineering position at the facility requires a PhD in an applicable field of engineering or the
physical sciences. Also like production technicians, process engineers must deal with vast amounts of
information on a daily basis if they are to fully understand conditions in their areas of responsibility. One
particular recurring task for these engineers is reviewing Statistical Process Control (SPC) data.
However, in contrast with the average factory worker, for whom gathering and making sense of
performance indications are optional, for process engineers reviewing SPC charts is a daily responsibility.
A Process Engineer is a person who is responsible for specific portions of semiconductor manufacturing processes,
including the maintenance and upkeep of manufacturing equipment and recipes.
Page 17
The challenge that these engineers face is the vast quantity of SPC data that they must evaluate with
relatively inadequate tools, the result being that engineers often ignore, postpone, or limit their SPC
reviews. The second focus of this project's work suggests a novel approach to this problem, again by
providing information that an end user can leverage to make decisions more accurately and efficiently.
1.5
Information Visualization and Decision Making
In both cases outlined above, although much data is available, it is of little value unless an end
user expends a great deal of effort and energy in gathering, putting into useful form, exploring, and
understanding it - in short, converting it into information. A central thrust of this work is that large
amounts of raw data, with properly constructed user interfaces, can better be explored, made sense of, and
used for making decisions when in visual format. When this occurs then visual display combines
computers' powerful computational capabilities with robust and flexible human perceptual, reasoning,
and decision-making abilities.
An important assumption is made in the previous statement, that information visualization
requires computer technology for the visual presentation of information. This is not necessarily the case;
information visualization examples abound that predate the invention of computer technology.
4
This
project, however, focuses on real-time decision-making in rapidly changing environments. In the two
applications discussed in this work, only computers are capable of providing the kind of rapid feedback
that end users require in the intensive, ever-changing requirements of the manufacturing environment.
1.6
Thesis Structure
Chapter
I first contends that information is a key component of modern manufacturing systems.
Following this is a brief overview of the information challenges faced by employees, specifically
Manufacturing Technicians (MTs) and Process Engineers, at Intel's Fab D2, the focus of this research
effort. Next, the motivation and objectives for this work - implementing and developing tools that
improve productivity with highly visual production indicators - are discussed. Finally, the thesis
organization is presented.
Chapters 2, 3, and 4 offer background on the situation at Fab D2. The information ideas
presented in these chapters are revisited throughout the thesis, but especially in the discussion of cultural
change at Intel.
Chapter 2 provides background for understanding the context in which Fab D2 is set, including a
brief overview of D2's relationship with Intel and a description of the factory's employees and facilities.
Much information presented here is revisited in discussions of the complex environment in which the
factory operates.
4 See Tufte 1983, Tufte 1990, and Tufte
1997, for many excellent examples.
Page 18
Chapter 3 delves into the issues of semiconductor manufacturing complexity. A basic
understanding of this complexity is a prerequisite for understanding the systems that Fab D2 has evolved
to manage its production processes, and how information visualization offers relief for factory employees.
This chapter begins by providing an overview of the challenges faced by Fab D2. First we examine
difficulties inherent to the semiconductor manufacturing process, including challenges common to the
industry. Following this is a discussion of factors that are unique to Fab D2.
Chapter 4 presents a number of methods that Fab D2 managers have created for coping with their
operations' inherent complexity. The most apparent way that they accomplish this is through an
intensive, highly matrixed information sharing network. Other strategies include aggressive process
variability reduction efforts, unique human resource policies, and various automated systems.
Chapter 5 discusses the merits of information visualization. This chapter provides a review of
relevant information visualization concepts, especially theory relevant to the unique demand for real-time
decision-making in manufacturing environments. Advantages and benefits of the visual display of
information are explored, as well as some potential pitfalls.
Chapter 6 discusses the project's first major aim, providing rapid, relevant performance feedback
to factory workers. The chapter begins with a closer look at the challenges manufacturing technicians
face collecting the information that guides their actions, including a brief look at existent information
sources. Following this we introduce Electronic Monitor Boards (EMBs), the system that was selected,
after alternatives were researched and explored, to provide performance indications to factory MTs.
Finally we examine opportunities for improvement in the EMB system.
Chapter 7 describes the second major thrust of this work, providing performance feedback
information to a second group of end users - Process Engineers. This chapter first introduces the basic
idea behind Statistical Process Control (SPC). Next it examines the issues faced by Fab D2 Process
Engineers while evaluating SPC information, including the inadequacy of tools available to these
engineers. Following this is a discussion of a simple concept termed PERAT (Process Engineers' Rapid
Action Tool) that promises to help these engineers better cope with SPC information.
Chapter 8 summarizes key themes that occur consistently in effective visual information systems
such as EMBs and PERAT. Although not a comprehensive list, it does encapsulate the main ideas at
work behind these systems. First, we visit traditional principles of good system design - visibility, good
conceptual model, good mappings, and effective feedback, demonstrating how EMBs and PERAT fulfill
these criteria as we progress. In addition, we develop two more ideas - information hiding and
configurability - that contribute to success of information systems in the work place.
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Chapter 9 delves into the strategic, political, and cultural aspects of making change at Fab D2. As
such, it has two important features that distinguish it from the chapters that precede and follow it. First, it
shifts tense from third-person, in which the analytic remainder of the thesis is written, to largely first
person, as the author reflects on his personal experiences enacting change at the factory. Second,
recognizing that some will prefer to readjust this portion of the thesis for an understanding of the
organizational dynamics at play during the course of the work, it repeats key information found in
preceding sections so that it can be read stand-alone.
Chapter 10 concludes the discussion of the change effort at Fab D2. First we briefly summarize
two key themes developed over the course of this work - information's critical role in the efficient
operation of manufacturing systems, and the importance of worker participation in complex, highly
variable production environments. Next we delve into larger questions posed by this work - most
importantly the issue of control in Intel's operations, and the effect this has on information technologies
that promise benefits only when workers are enabled to take individual initiative. Finally, an argument is
made for the concurrent design of manufacturing and information systems.
Page 20
2
Intel and Fab D2
This chapter provides background for understanding the context in which Fab D2 is set, includingt
a brief overview of D2's relationship with Intel and a description of the factory's employees and facilities.
Much information presented here is revisited in discussions of the complex environment in which the
factory operates.
2.1
Fab D2's Relationship to Intel
Intel is widely considered the world's leading semiconductor manufacturer, especially in cutting
edge microprocessors, for which it commands roughly 85% of world market share.
In response to
changing market conditions, especially customers' increasing demands for highly configurable systems
("System Drivers", pp. 1-2), Intel is extending its expertise from its traditional core strength in
microprocessors, also termed logic, to include flash memory, analog and digital signal processing, and
other novel silicon-based technologies (Johnson, pp. 1-2 and Anon., pp. 6-8).
Intel's Fab D2 (Figure 3, below) is located in Santa Clara, California, the heart of Silicon Valley.
The factory fulfills a dual-purpose role of Technology Development (TD) and production. As a TD
center, it is responsible for leading the development and refinement of semiconductor production
processes and the introduction of several dozen products each year based on those processes. As a
production facility, it is responsible for yield learning on newly established processes in addition to
fulfilling quotas for finished goods. From mid to late 2002, during the course of this project, the factory
was involved in over 90% of Intel's businesses, performing six distinct production processes in various
stages of development. This compares to the one or two production processes that most of the company's
High Volume Manufacturing (HVM) facilities run. The complexity of D2's operations is increasing - by
the end of the first quarter of 2003, the fab will be responsible for nine separate production processes.
Table I below lists the factory's six production processes at the end of 2002.
Table
Process Name
804
805
860
861
884
Critical
Dimension
0.13 pm
0.09 tm
0.13 ptrm
0.13 Vtm
0.13 pm
893
0.18 pim
1 - Production Processes at Fab D2
Description
Flash Memory, Aluminum Back-End
Flash Memory, Copper Back-End
Logic, Copper Back-End
Logic Chip Sets, Copper Back-End
"System on a Chip" Flash + Logic,
Aluminum Back-End
Next Generation Experimental Memory,
Aluminum Back-End
5 See http://www.siliconstrategies.com/story/OEG20030206S0007
Page 21
TD or
Production
Production
TD
Production
TD
TD
TD
Figure 3 - Intel's Fab D2
2.2
Fab D2's Employees
Approximately 1,000 employees work at Fab D2. Roughly 600 of these employees work on the
factory floor, divided organizationally into two day shifts and two night shifts (four shifts in total) on a
"compressed work week" schedule, performing three or four shifts each week, 12 hours each shift. In this
manner, the factory runs 24 hours a day, 365 days a year, shutting down briefly once a year to perform
maj or facility-wide maintenance. Intel operates all of its semiconductor manufacturing facilities this way,
ensuring high utilization of capital equipment, especially state of the art lithography tools that cost many
Buildings 1/2
Building 3
kI
Building 4
I
MI _ __1
86m
80m
hi
115m
70m
Fihure 4 - A Bird's Eye View of Fab D2's Layout
Page 22
p-I
Bays
Chases
Figure 5 - A Typical Bay/Chase Layout
millions of dollars, and which quickly become obsolete in this high clock-speed industry (Fine, p. 239).
Another 400 employees work normal working hours, Monday through Friday, in engineering,
management, and other factory support functions. Since the factory runs throughout the week, including
nights and weekends, conditions often change in the factory until the majority of the factory's engineers
and senior managers (some engineers and managers are assigned to directly support the shifts) return to
evaluate the factory's condition and assist in resolving issues.
2.3
Fab D2's Facilities
Fab D2 contains over 700 tools 6 or "entities" located in three separate buildings. These buildings
contain approximately 113,000 square feet of clean room space (about equivalent to the area of two
football fields, including the end zones) contained in four buildings. Semiconductor processing occurs in
roughly 65 bays and rooms. A bird's eye view of the factory is provided above in Figure 4.
Fab D2's tools are arranged in "bay/chase" configuration (Quirk, pp. 123-124), illustrated above
in Figure 5. In this type of layout, the standard for the semiconductor industry, tools are usually grouped
together by make and model (for instance, Nikon steppers or Hitachi etchers would be co-located) or at
least by functional area (etch, thin films, implant, etc.). The result is that even high volume
6
A tool in semiconductor manufacturing terms is a discrete piece of
production equipment.
Page 23
Product Mix & Volume
Very Many
Products
1 - few
o
Many
Products
Low
Several
Products
High
One
Product
Very High
Functional layout
Flow extremely
varied
Undesirable
LL..
M
L
Many
Products
Medium
Cellular layout
Flow varied
Line flow -
Operator paced
Flow regular
O
Line flow-
>%
Equipment paced
Flow regular
Desirable
Continuous flow
Flow rigid
lo
Figure 6 - Fab D2's Position on the Hayes-Wheelwright Diagram
semiconductor manufacturing facilities are arranged in "job shop" type fashion (Hayes, p. 4), with WIP
not following predefined, "linear" paths normally associated with traditional assembly processes. Instead,
semiconductor manufacturing is highly reentrant, with WIP often visiting the same tool or group of tools
many times throughout the production process (Xiao, p. 20). Figure 6, above, illustrates the HayesWheelwright diagram, with Fab D2's position in the product/process map. Most traditional production
processes operate somewhere on the diagonal. Modern "lean" and flexible manufacturing strategies aim
to push companies in desired positions below this line. As can be seen, Fab D2 finds itself in a highly
unenviable position well above the transverse.
In bay/chase layouts, the working- or front-end of tools, where wafers are loaded for processing,
are located in Class I' bays. Tool back ends, where tools are connected to factory services (compressed
' Class I signifies that a space has fewer than one airborne particle larger than 0.5 micron size per cubic foot of air
(Xiao, pp. 25-26). By contrast, a typical hospital operating room is Class 10,000 (fewer than 10,000 airborne
particles larger than 0.5 micron size per cubic foot).
Page 24
air, chemicals piping, electrical and controls cabling, etc.) and where most tool maintenance activities are
performed, are located in Class 1000 chases. An important reason for bay/chase arrangements is the
extreme demand for cleanliness in semiconductor manufacturing. As device dimensions shrink, the
production process becomes ever less tolerant of device-killing particle contamination. By isolating
relatively "dirty" service connections and maintenance actions from the clean areas where wafer
processing occurs, a major source of potential contamination is better controlled (Quirk, p. 123).
A second reason for bay/chase layouts is economic. Although it is possible to design processing
equipment (for instance, tool "mini-environments" - Quirk pp. 133-134) that reduces or even eliminates
the need for bay/chase arrangements, the cost to do so has historically proven prohibitive for
semiconductor manufacturers. A major tradeoff to bay/chase construction is tool location inflexibility moving tools is difficult, time consuming, and extremely costly in ultra-clean production environments.
Page 25
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Page 26
3
Sources of Complexity at Fab D2
Semiconductor manufacturing is complex, and growing more so as device dimensions shrink. A
basic understanding of this complexity is a prerequisite for understanding the systems that Fab D2 has
evolved to manage its production processes, and how information visualization offers relief for factory
employees. This chapter provides an overview of the challenges faced by Fab D2. First we examine
difficulties inherent to the semiconductor manufacturing process, including challenges common to the
industry. Following this is a discussion of factors that are unique to Fab D2.
3.1
Complexity Inherent to the Semiconductor Manufacturing Industry
Fab D2, like all factories in the semiconductor industry, continuously grapples with many factors
that complicate the production process. This section examines several of these factors, including process
detail complexity, reentrant flow, planned and unplanned process disruptions, and other issues, such as
rework, yield, and loss.
3.1.1
Process Detail Complexity
Modern semiconductor manufacturing processes are extremely complex, with many hundreds of
process steps, and dozens of mask layers (Xiao, p. 545). WIP spends many weeks or even months in the
fabrication facility. One of Intel's established production processes, for instance, the 858 process, used to
Figure 7 - Growth in Complexity of Intel's Flash
Memory Processes - Activities
180
Figure 8 - Growth in Complexity of Intel's Flash
Memory Processes - Mask Layers
20D
I80
160
4040
> 100
I10
~100
-14----0-
-.
<840
20
_
1998 - 0.25
2000 - 0.18
2002 - 0.13
00
2
2004 - 0.09
Year - Critical Dimension (microns)
1998 - 0.25
2000 - 0.18
2002 - 0.13
2004 - 0.09
Year - Critical Dimension (microns)
produce devices such as Intel's Pentium@ III processors, contains many hundred operations and several
dozen mask layers, with an average factory throughput time of about two months. As semiconductor
manufacturers continually push the limits of Moore's law (Moore, p. 3) new processes are growing more
complex, with more mask layers and more process steps to achieve the diminishing dimensions and ever
more complex structures necessary for increased device performance (Quirk, p. 258). Figures 7 and 8,
below, illustrate the growth in complexity of Intel's flash memory processes over time, based on activities
and number of mask layers. All figures are normalized to 1998 values.
The level of combinatorial or detail complexity (Sterman, p. 21) in the manufacturing process is
itself a concern, for at least two reasons. First, the sheer volume of operations compounds the difficulty
Page 27
Diffusion
Th in
Films
Planar
Litho
Etch
Implant
Figure 9 - Basic Semiconductor Processing Flow; Adapted from Quirk, p. 201
of tracking WIP, recipes, tool availability, and tool qualifications at those steps for process engineers and
workers, as well as their supervisors and managers. The second reason why this is important is that as the
number of steps increases, so does the number of times that material revisits various tools in the
production process, aggravating the problem of reentrant flow.
3.1.2
Reentrant Flow
In addition to the detail complexity caused by the large number of operations required to produce
leading edge devices, the semiconductor manufacturing process also contains a great deal of dynamic or
systematic complexity (Sterman, p. 21), in which problems are often difficult to track and understand over
time due to time lags between cause and effect. The most significant source of systematic complexity is
semiconductor manufacturing's highly reentrant nature, in which wafers return to the same tool or groups
of tools many times throughout the production process. Figure 9, above, sketches the basic process flow
and its reentrant nature broken down by the six basic semiconductor functional areas
of lithography, etch,
thin films, implant, diffusion, and planar.
The primary reason for reentrant flow is that processing equipment is extremely expensive, each
tool costing at least several hundreds of thousands of dollars to purchase, install, and maintain. Since
many recipes in the process flow are similar, and since clean room space is expensive ("Factory
Actual tool costs are difficult to obtain, usually held as closely guarded secrets by semiconductor manufacturing
firms. Costs provided in this paper, taken from numerous conversations with Process
Engineers, Finance personnel,
and others at Fab D2, are simply meant to give the reader a sense of their approximate order of magnitude so that
she can better understand how and why semiconductor manufacturers make decisions affecting capital equipment.
Page 28
Integration". p. 19), it is often more cost effective to make tools capable of performing many operations
rather than specialized functions (Leachman, p. 63). Since most tools perform many operations that
wafers require during processing, material often visits the same tool or group of tools several, sometimes
as many as scores, of times, in its journey through the factory; WIP queued in front of a tool may be from
one of dozens of different mask layers from various processes. This creates a twofold problem: first, how
to track material and gain visibility into what material from what mask layer, process, and product is
queued in front of what tool, and second, how to schedule run time on a tool (also known as "lot
scheduling") to optimize the number of setups that are performed with the amount of material that is
produced while maintaining smooth flow of material throughout the factory. WIP "bubbles" caused by
disruptions to the manufacturing process can be extremely upsetting to this decision making process,
especially when a factory, such as Fab D2, has been designed to run in a "balanced" fashion, with little
excess capacity upstream or downstream of the constraint (Hopp, pp. 489-490). The measures that Fab
D2 has taken to address both aspects of this problem are discussed in more detail in the chapter that
follows.
As an aside, tool flexibility is a second reason (in addition to the bay/chase layout discussed
previously) why material flow in a typical semiconductor facility resembles that of a job-shop. Since
tools perform groups of related functions, instead of specialized processing steps, tools that perform the
same operations are often co-located. This contrasts with a typical assembly process, in which
manufacturing operations occur in "linear" fashion, material proceeding from operation to operation,
being processed just once by a tool or group of tools dedicated for that purpose (Garvin, p. 3). The irony
of this situation is that job-shop type layouts, with generalized tools performing many different
operations, are one of the least desirable methods for high volume production (Hayes, pp. 3-5) because of
the difficulty inherent to this mode of production in understanding where material is located in the
system. and what processing steps need to occur next. However, as explained earlier, cost constraints
dictated by expensive tools and clean room space determine that semiconductor manufacturers design
their factories in this fashion.
Unfortunately, behavior within a specific process is not as simple as might be expected from
Figure 9. Each mask layer (a mask layer defined here as the processing that occurs from each
Lithography Spin/Expose/Develop, or SED, step to the beginning of the next SED step), especially in the
front end and mid section of the process flow, usually has a very different process flow, with different
numbers and types of operations from the mask layers that precede and follow it, especially in the frontend and mid-sections of a process. Added to this complexity is the fact that each functional area typically
contains many dozens of tool clusters, each cluster performing a different collection of operations. In Fab
D2's Etch functional area, for example, there are over 30 clusters, each cluster performing as many as
Page 29
dozens of different recipes. A final confounding factor is that factory bottlenecks feed themselves, further
complicating efforts to analyze, explain, and predict system behavior (Gershwin, p. 470).
3.1.3
Planned and Unplanned Process Disruptions
A final complicating element common to semiconductor manufacturing is the highly variable
nature of the process. With critical dimensions now measured in nanometers, controlling random
Gaussian process disturbances is ever more important, and ever more difficult (Spanos June 1992, p.
827). This is especially true given that most semiconductor manufacturing processes, whether formative,
additive, or removal in nature, occur as parallel, rather than serial, processes (Hardt, pp. 3-4). Scheduled
Preventive Maintenance (PM) actions designed to keep tools and hence processes stable and under
control, unscheduled corrective actions in response to process excursions and tool failures, and
investigations into process excursions that require extra resources to disposition the health of affected
material, are all important disturbances to the smooth flow of material in device process flows (Hopp, pp.
255-260 and Nahmias, Ch .12). Mitigating the effects of these disturbances on the smooth flow of
material throughout the factory, including the creation of large WIP bubbles and the impacts these
disturbances can have on factory yields, are important considerations constantly dealt with by managers,
engineers, and production technicians alike.
3.1.4
Other Factors - Rework, Yield Loss and Queue Time Limits
Rework and Yield Loss are particularly insidious factors that complicate semiconductor
manufacturing because of the additional strains that they place on factory information systems and the
impacts that they have in lowering the effective capacity of manufacturing systems (Hopp, 388-398). In
addition, since most semiconductor rework (which by its definition is material that is reentrant in nature)
can only occur in lithography (Xiao, pp. 210-211), and since lithography is considered the constraint in
most semiconductor manufacturing facilities, this places additional burdens on the chief limiter to factory
capacity.
Queue
Time Limits are places in the process where material must be processed on a specified
operation or sequence of operations within a specified time frame after completing processing on a
previous operation. Queue Time Limits are most often created when excessive waiting for a tool to
become available for processing would cause quality problems due to the exposure of sensitive materials
on wafer faces to oxygen and humidity in the ambient environment. This complicates manufacturing
systems because it disallows manufacturing system decomposition (Gershwin, Ch. 4), forcing sequential
steps to communicate and work together, sometimes requiring slowing or stopping production in one area
until problems are resolved in another.
Page 30
Buildings 1/2
Building 3
Building 4
Start/Finish
86m~
80m
115m
70m
Figure 10 - Fab D2 Process Flow for a "Typical" Mask Layer - 884 Process
3.2
Complicating Factors Unique to Fab D2
In addition to the problems that all semiconductor manufacturers face on a daily basis, Fab D2
deals with some complicating factors unique to its environment.
3.2.1
Factory Layout
Although Fab D2 strives to group tools in logical fashion, with similar tools in the same bay, and
with tools from the same functional area located in adjoining bays, the factory is far from having achieved
this ideal. Unlike many of its sister factories, D2 has not had the luxury of shutting down and retooling
for new process introductions or facility additions, having been in constant production its entire 14-year
history while expanding from one to four buildings. Since clean room space is at a premium, new tools
are moved in place as obsolete tools are removed; these new tools do not necessarily perform the same
functions or are even from the same functional area as their predecessors. This semi-haphazard factory
evolution has created numerous discontinuities in the layout of tools; it is not unusual to find tools from
two or even three different functional areas in the same bay. The result is an even more Byzantine
process flow than one might find in a more traditional semiconductor manufacturing facility. As an
example, Figure 10 above illustrates the flow of material in one mask layer (out of several dozen mask
layers) for Fab D2's 884 process.
3.2.2
Process Proliferation
As mentioned earlier, Fab D2 is responsible for six separate production processes, the number
increasing to nine, perhaps more, as Intel continues to diversify its silicon businesses. This compares
with the one or two processes that most of Intel's other HVM sites perform at any particular time.
Page 31
As a result of this proliferation, the problems the factory faces understanding the flow of material
in the fab are multiplied, since processes overlap significantly with one another on the tools that run them.
This compounds the problem of factory scheduling, discussed below, as well as the difficulty in
understanding where, exactly, problems in the factory lie, where future problems might occur, or how
problems with one process impact the flow of material in another. Finally, since managers' and
engineers' attention is divided between these many processes, this often leads to dilution of attention to
specific processes, or shifting of attention between processes as problems become apparent.
3.2.3
Automated Material Handling System
Fab D2 uses an Automated Material Handling System (AMHS) to move material throughout the
factory. AM HS was instituted at Fab D2 with the intention of freeing technicians from material handling
and engaging them in more value-added activities. In the system, WIP moves through the factory on
computer controlled robot carriages that ride on monorail racetracks suspended from the ceiling. 40
stockers located throughout the factory are connected to the AMHS, where lots are retrieved for
processing, and where they are returned after processing. In addition to these functions, the stockers also
act as buffers where material is stored until it is needed for the processing in subsequent steps.
A major problem with AMHS is that it hides WIP from view, making it more difficult for
employees to understand where problems lie. This contrasts with factories that do not have AMHS, such
as Intel's Fab 17 in Hudson, Massachusetts (Scott, pp. 9-1 1). In this facility, the visible presence of
large
quantities of WIP acts as a compelling cue as to where significant problems in the factory are situated.
Fab D2's response to this dilemma, discussed in more detail in the next chapter, has been to
create reports that can be used to track and manage material, such as by stocker location or by various
process segments. However, since only managers review these reports, the onus of problem discovery
and problem solving again rests primarily outside the factory.
3.2.4
Lot to Lens Dedication
Variability was mentioned previously as a challenge constantly dealt with by semiconductor
manufacturers. This problem is especially acute when achieving the exacting critical dimensions on
leading edge products produced with immature processes. One strategy of dealing with this problem is
through lot to lens dedication on steppers9 for mask layers that are most critical to device performance
(Wolkenberg, p. 62). Specifically, process engineers have learned that, due to small yet important
idiosyncrasies between these tools, running material through consecutive layers on the same stepper often
reduces product variation. Even though several tools may be qualified on the same operation, if lot to
lens dedication is used, then material must revisit the same tool (instead of the same group of tools) in at
least one subsequent layer. While helping solve quality issues, this method exacerbates the problem of
Steppers are photolithography tools that pattern silicon wafers with ultraviolet light.
Page 32
reentrant flow by reducing system flexibility, since lots must now be dedicated to specific tools that may
be having problems when the material revisits the tool for further processing. This dilemma is intensified
further since dedication occurs in the factory bottleneck using tools that, generally being the most
sophisticated pieces of equipment in the fab, are also most often the least stable in terms of availability.
Complications caused by lot to lens dedication is of particular concern at Fab D2, since much
work at the factory is done with leading edge processes and state of the art lithography tools that are not
yet well understood; lot to lens dedication thus adds yet additional layers of complexity to the factory's
production processes.
3.2.5
Special Material
Since D2's primary role is as a TD facility, it processes a great deal of special material, roughly
10% of the factory's total production volume, at any point in time. Lots that qualify as special material
include Engineering (ENG) lots, or lots that are processed to meet the needs of internal corporate
customers, especially New Product Introductions (NPIs). ENG lots usually run on processes that are
more stable or have at least achieved an acceptable level of development.
TD lots are the second general category of special material. These lots run on processes from the
very earliest stages of their development past product launch until processes are discontinued from active
production. TD lots add enormous complexity to the production process because of splits and merges that
are often performed on the lots while performing experiments. Splits divide lots into as many as 25 single
wafer "child" lots (each lot contains 25 wafers, as per semiconductor industry norms - Quirk, p. 132),
although splits of lots into more than 15 children or grandchildren are rare. Merges combine child lots
when experiments are complete for further processing. Splits and merges complicate the manufacturing
picture significantly since both types of operations require scarce and expensive human skill to perform.
In addition, when lots are divided for experiments, other resources are consumed, including lot "boat
boxes", which occupy limited space in clean room WIP racks and AMHS stockers. Finally, experiments
require more process and integration engineers' time for researching and dispositioning results.
3.2.6
Prioritization Schemes
A final complicating factor unique to Fab D2 is the elaborate system of prioritization used to
determine which lots receive more attention, and also which lots are processed next by tools in the
manufacturing system (Intel Spec Number 79-046). PO and PI lots, of which normally only one or two
run at any point in the time due to their disruptive preemptivel (Larson, p.233) nature, receive the highest
0 PO and P1 lots are not preemptive in the sense that when they arrive at a tool, they signal the operator to stop any
processing that may be in progress for a lower priority lot. This manner of preemption would likely be very
dangerous both to the tool in question and the lot for which processing would be aborted. Instead, preemption here
means that technicians stop processing for lower priority material, idling these tools well in advance of the arrival of
high priority lots.
Page 33
level of attention and priority by managers, workers, and engineers in the factory. These lots are normally
reserved for critical commitments by the factory to internal customers, such as NPIs or New Technology
Introductions (NTIs). The remaining lots receive tags from P2 to P6 in decreasing level of priority, P6
being normal production lots. P2 lots, the next highest level of priority after P1 lots, are not preemptive
in nature, but do often require additional setups and system checks prior to arrival at specific tools.
Priority lots, especially when combined with splits and merges from experiments, can be
extremely disruptive to smooth manufacturing system performance. Table 2, below, depicts the most
important elements of Fab D2's prioritization scheme.
Priority
Priority Type
Comments
PO
Preemptive
Critical Factory Commits - NPIs and NTIs - dedicated lot shepherds
P1
Preemptive
Critical Factory Commits - NPIs and NTIs - lots hand-carried in fab
P2
Non-Preemptive
Important Factory Commits and Critical Experiments - lots hand-carried
P3
Non-Preemptive
Important Factory Commits and Experiments - lots moved in AM HS
P4, P5
Non-Preemptive
Miscellaneous ENG lots
P6
Non-Preemptive
Normal Production Material - lots moved in AMHS
Table 2 - Fab D2 Prioritization Scheme
3.3
Summary
Fab D2's manufacturing operations are staggeringly complex. This complexity, aggravated by its
reentrant nature, its inherent variability, and the demands placed on the factory by new silicon technology
development, limits the ability of even the most veteran workers and managers to completely comprehend
the process flow, much less understand all of the issues faced by the factory floor at any point in time,
except at best in outline. Discussed in the next chapter are some of the methods that Fab D2 personnel
have devised to help them cope with the information and decision-making demands placed on them in this
challenging and fast-paced environment.
Page 34
4
How Fab D2 Deals with Complexity
Fab D2 managers have created a number of methods for coping with their operations' inherent
complexity. The most apparent way that they accomplish this is through an intensive, highly matrixed
information sharing network. Other strategies include aggressive process variability reduction efforts,
unique human resource policies, and various automated systems.
4.1
Meetings
An intense schedule of formal meetings is the most important, and also most obvious, method
that Fab D2 has devised for dealing with complexity. Although not exhaustive, Table 3 below lists many
of the meetings and conferences that occur on a regular (at least bi-weekly) basis that support
communication, problem solving, and decision-making that are primarily tactical or sustaining in nature.
Meetings highlighted with an asterisk (*) are those that include shop floor workers as regular participants.
Although extraordinarily disciplined and organized, this approach has several flaws. First, it is
inefficient. It is not atypical for managers to spend more than half their time in meetings. Along these
same lines, Fab D2 managers are beginning to realize that as the factory's complexity increases, the time
that they have available to deal with problems remains fixed and is becoming more and more saturated.
Daily Meetin2s:
Weekly Meetings:
- D2 Operations (daily)
- D2 Operations (weekly)
- Manufacturing Excellence Council
- Velocity Coordination Meeting
- SWAT Team Meetings
- WIP Management Team
- Shift Standup*
- TD Weekend Passdown
- Target Matching Indicator (Poly Loop) Huddle
- Constraint Management Team
- Shift Goaling (twice per shift)
- Litho FASM and SAG
- Flash Huddle
- Etch FASM and SAG
- Logic Huddle
- Planar FASM and SAG
- Manufacturing Operations Huddle
- Implant FASM and SAG
- Litho Eng/Ops Huddle
- Diffusion FASM and SAG
- Manitoba Startup Huddle
- Thin Films FASM and SAG
- Shift Cluster Passdowns*
- Cluster SITs (several dozen)*
- Shift Engineering Standups*
- 0.13 MRC
- Hot Topics
Table 3 - Some D2 Recurring Meetings
Page 35
Another deficiency with this approach is that these meetings deal with information that is largely
historical. As such, they do not address the rapid, minute-by-minute decision-making that occurs on the
shop floor. Finally, and most importantly, the majority do not include shop floor participation. To be
fair, much informal information sharing, in which technicians exchange information among themselves
about events in the factory as they unfold, does occur at Fab D2, but most of this exchange is ad hoc and
inconsistent, without formal systems that support these efforts. Thus, by mostly excluding TMTs
(Technology Manufacturing Technicians) from these decision-making forums, the organization does not
fully leverage the skills, expertise, and experience of all its members, especially those who have the most
direct contact with the company's primary source of revenue, and the most intimate understanding of the
factory's manufacturing systems.
4.2
Reports
The second primary way that Fab D2 has evolved for exchanging information and dealing with
complexity are numerous automated, web-based reports. All of these reports rely heavily on automated
factory information sources such as Workstream'" and TP/2 12 . Table 4, below, although again only a
- Factory WIP Profile (6)
- AMIHS Reports (11)
- Litho Ded Profiles (50+)
- IEN Reports (Dozens)
- Factory Loops (200+)
- FRSB Reports (Dozens)
- Factory Velocity (11)
- Tel Engineering Report
- Activity Pace Graphs (250+)
- Poly Loop Equip Status
- 860 Front End Loop Rpt
- Operation Extract
- 860 Back End Loop Rpt
- WIP Moved Metric Extract
- Thin Films Performance (2)
-
- Sustaining MW Status Rpt (5)
- NSJ Entity History
- MW Usage (3+)
- LSE Validation
- MW Route Health
- Critical Ratio Report
- MW Silicon Starts
- WIP711 Monthly
- Priority 1-2-3 Report
- Tool Outs
- Factory Velocity Report
- SPC++ Charts (Hundreds)
- Lot Tracking Matrices (Hot Lot, Child Lot,
- Pull Station Detail
Static Lot, FIT Lot)
OOC Extract
- Pull Station Summary
Table 4 - Some D2 Reports
Workstrearn is a legacy, proprietary VAX system that Intel installed in the 1970s to improve automation of its
production processes. This completely text-based system contains real-time information for tool and WIP status.
2 TP/2 is another Intel proprietary system that handles
real-time tool alarm and exception reporting.
Page 36
partial listing, lists several of these reports. Numbers in parenthesis refer to possible report permutations.
4.2.1
Automated Reports - Deficiencies
Although automated reports are openly available to all factory employees, management finds
most use for them in monitoring factory performance. Technicians on the shop floor rarely, if ever, use
them to obtain information such as tool and WIP status outside their areas of focus, and how they are
affected by events upstream and downstream of their stations. The reason why they do not access and
attempt to make sense of this information is that they find this difficult and time consuming, especially
when information from several reports must be combined for an accurate picture of their areas. Since
their performance is measured by the amount of material that they can process during the course of a
shift, and not their research skills, workers rarely attempt to understand much outside their specific areas
of responsibility. The following sections describe problems with these reports in more detail.
4.2.2
Time Latency
The primary problem with Fab D2's automated reports is that all are historical in nature,
representing, at best, a snapshot of how the factory performed over a period of, or at a point in, time. The
best resolution achieved by some reports is roughly fifteen minutes (for example, Factory Resource Status
Board'
reports), while others have a time latency of shifts, days, or even weeks. As a result, these reports
provide
little, if any, help for the literally hundreds of fast cycle time decisions that production workers
must make on a minute-by-minute basis throughout the normal course of a shift.
4.2.3
Dispersed Data
A second problem with these reports is that few of them are targeted to factory workers' specific
information needs, such as WIP and tool status. Although technicians could combine several reports to
glean some meaning from them, TMTs largely ignore them since they do not have sufficient tools,
training, or time at their disposal to perform such analyses.
4.2.4
User Friendliness
A third problem is the amount of effort that these reports require. Based on experience, D2 has
discovered that workers will likely not use any report requiring more than a mouse click or two to
access 1, no matter how helpful it might be. The reason is rooted in workers' time constraints.
In the
factory, if a report contains useful information, then workers would want to access it frequently over the
course of a shift, perhaps half-hourly or even every fifteen minutes as they tend their areas of
responsibility. However, if a report requires even 30 or 40 seconds for them to stop, access, and
understand what is being presented, and if the retrieval path is too cumbersome, then regularly accessing a
3 FRSB (pronounced "Frisbee") is an Intel-proprietary system used for investigation and reporting of factory
conditions.
1 Two separate points are worth mentioning here: 1. all station controllers at D2 are equipped with web browsers
and internet access, and 2. accessing most reports at D2 require a series of at least four or five mouse clicks.
Page 37
report would quickly impact their productivity. In addition, since reports do not automatically refresh
themselves, if a worker wants the latest information for an existent report displayed on a screen, he or she
must still stop, refresh the report manually, wait for the system to fetch the results, and interpret them.
4.2.5
Conflicting Performance Metrics
A final reason why workers ignore most reports derives from conflicts from factory workers'
performance metrics. Technicians are evaluated based on their productivity, especially the number of
outs
that they achieve over the course of a shift. Since workers are assessed on their abilities to execute
productively, and not on their investigative abilities, any information that does not immediately and
intuitively lend itself to this objective is largely ignored.
4.3
Factory Improvement Team (FIT)
Each shift deploys a small, four to five person FIT (Factory Improvement Team) charged with
solving factory problems. Team members are high performing technicians who have proven their
abilities to work well with others. Although the original purpose of these teams was identifying and
implementing overall factory improvement projects, over time they have evolved primarily into factory
expediters, interfacing, informing, and "deconflicting" problems with technicians on high priority lots.
Although the FIT teams play an essential role in ensuring the smooth flow of high priority
material in the factory, the role that they play is essentially non-value added, as they mostly perform a
coordination function.
4.4
Automated Lot Scheduling - Factory Scheduler
Another automated system that Fab D2 relies heavily upon to help cut through the fog of
complexity is Factory Scheduler. Factory Scheduler is a proprietary Intel lot scheduling system that rank
orders which lots should be run on specific tools in the factory to smooth the overall flow of material
through the production facility. The system then communicates these decisions to technicians through
MTUI'
6, a
user interface on each tool's station controller (Figure II below). Factory Scheduler,
like
many lot scheduling systems in modern semiconductor manufacturing facilities (Leachman, p. 64).
arrives at these decisions through use of a series of simple heuristics that attempt to locally optimize flow
of material through many portions of the manufacturing process.
4.4.1
Approximate System Renderings
Although Factory Scheduler is an invaluable tool that helps avoid costly mistakes and relieves
much of the burden of repetitive decision making from technicians, it does have limitations. As an
automated system, its algorithms are, at best, approximate representations of industrial engineers'
" Outs are the lots and wafers that technicians process over the course of a shift.
16 Manufacturing Technician
User Interface
Page 38
complex reasoning processes. Changing factory conditions often dictate that workers, supervisors, and
other managers override system recommendations for lot processing; Factory Scheduler, like many
automated systems, is not flexible enough to completely keep pace with constantly shifting demands on
the factory floor (Rubin, p. 618).
In one extreme case, in portions of the lithography area that are
considered D2's factory constraint, Factory Scheduler's recommendations for lot processing are ignored
altogether. Instead, technicians and their supervisors create shift run plans that guide technicians on what
material should be processed over the course of a shift to maximize tool utilization. Factory Scheduler
thus can at best be considered "a plan to deviate from" - human operators often have more information
and make better decisions about existing conditions than can be captured by automated lot scheduling
systems. A mark of a good plan, however, is that everyone is aligned with the reasoning behind the
decision-making. Since MTs are not trained on the logic behind the system's decision rules, and since so
many system changes are made, they often find it difficult to "buy in" to the system (Thomas, p. 149).
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4.4.2
Increased Dependency
An unintended consequence of using Factory Scheduler is that, although it helps improve
productivity by relieving much of the decision making burden from the average technician, it discourages
them from thinking about the problem at hand (Thomas, p. 243). Although the system does not turn
technicians into automatons, it sometimes does create confusion when new, previously unencountered
situations present themselves (Rubin, p. 618). This is especially the case since workers receive no
training on the algorithms that inform Factory Scheduler decisions. Factory Scheduler, by placing the
burden of thinking on experts outside the factory, thus helps create dependency on these employees'
problem solving skills while de-emphasizing the development of these capabilities on the factory floor.
4.5
Factory Automation Strategies
In addition to Factory Scheduler, Fab D2 has implemented a variety of other automated systems
with the intention of helping workers deal with complexity and improve their productivity. Intel
deployed Workstream, for instance, in the late
1970s to improve tracking and accountability for material
and speed up lot processing transactions. MTUI, a relatively recent introduction to the factory, makes
many Workstream interactions more user friendly through its graphical, windows-based interface.
AMHS, discussed previously, was implemented to relieve workers of material handling responsibilities
and prevent material misplacement. Finally, other systems, such as lot box bar-code readers, help further
reduce errors and quicken the pace of factory operations.
While these systems have delivered real and measurable performance improvements to the
factory, most were developed with a common aim - reducing the incidence of costly mistakes by
controlling worker actions. The reason is clear when one understands that a single "normal" production
wafer in the factory is worth up to approximately $25,000 in revenue
7
to Intel Corporation. Since most
production lots are processed as 25 wafer batches, every time a factory technicians handles a fully loaded
wafer box lie or she assumes responsibility for material that is over six hundred thousand dollars in value.
Very little is "normal" about Fab D2's production material, however. As mentioned previously, the
factory produces primarily at the bleeding edge of device performance, material that often fetches far
higher prices from leading edge consumers than "run of the mill" production product. Similarly, although
harder to quantify, TD and ENG material is also extremely expensive. In fact, it is safe to say that this
material is far more valuable than any production material processed by the factory, since this material
determines how quickly engineers are able to develop processes that enable production release of Intel's
next generations of semiconductor products in this highly competitive, high clock speed environment.
7 This figure is only for microprocessor (logic) lots. Intel's flash memory, for instance, sells for amounts between
$10,000 and $15,000 per wafer. "System on a chip" devices, meanwhile, although they integrate several
technologies on the same piece of silicon (for instance, flash, logic, and analog circuitry) will likely sell for less than
$10,000 per wafer due to the larger die sizes required for these devices.
Page 40
It is apparent that rnisprocessing, mishandling, and other errors are extremely costly to Fab D2
and Intel Corporation. As a result, development of automated systems has focused on controls - systems
that guide worker behavior by circumscribing acceptable actions and preventing errors. Although these
efforts have been admirable and effective in achieving their aim, technologies that enable better \worker
decision-making have not kept pace with attendant increases in factory complexity.
4.6
Variation Reduction
Another important way that Fab D2 attempts to cope with complexity is by reducing it through a
policy of Continuous Improvement (CI). Specifically, employees embark on improvement projects in
attempts of eliminating waste and reducing process variability to improve yield and throughput.
Fab D2s conundrum with this objective is three fold. First, a significant part of Fab D2's charter
is developing new processes that are in their infant stages, when little is known about them and control is
most difficult. Second, and counter-intuitively, to better understand the sources of variation in its
processes, Fab D2 consciously injects more variability into its manufacturing system in the form of
experimentation, splits, and merges. Finally, especially recently since cost saving measures have reduced
Total Quality Management initiatives that fund, among other things, worker overtime for involvement in
process improvement teams, most CI efforts occur outside the factory, with relatively little shop floor
involvement in improvement project decision making processes.
4.7
Human Resource Policy
A final strategy that Fab D2 uses for dealing with complexity is its human resource policy. As
mentioned previously, this strategy is hiring highly qualified people for various factory positions, two
examples being entry-level production and process engineering positions. A key assumption of this
strategy is that highly qualified people, specifically those who have shown the drive, initiative, and
perseverance in advancing their skills and those who can grasp difficult technical concepts, are most
flexible and adaptable to the demands of the semiconductor manufacturing environment.
While this policy has worked well in the past, and will likely continue, a problem with its
implementation is that workers usually find extending their skills beyond their areas of initial training
difficult, most often due to overriding daily concerns for achieving output. A consequence is that Fab D2
does not fully utilize the potential of its highly flexible, skilled workforce in helping contribute solutions
to a variety of problems. In fact, the need to satisfy these short-term pressures actually puts more burden
on the factory by making operations more complex. For instance, when a worker is absent, whether that
nonattendance is anticipated or not, factory managers must deal with the fact that valuable skills are
needed to support complex production processes are also not present.
Page 41
4.8
A Critique of Fab D2's Policies
A common thread that runs throughout Fab D2's methods for dealing with complexity is
specialization. Factory workers, for instance, specialize on specific tools sets, while process engineers
concentrate their energies, sometimes even entire careers, on specific aspects of the production process.
Similarly, automation engineers focus on maintaining the factory's automated systems such as AMHS
and Factory Scheduler. Finally, managers, other engineers, and employees in other support functions
solve problems and design C1 initiatives in their (often narrowly defined) functions.
The reason for this specialization lays in a key assumption, reminiscent of Taylor (Hopp, pp. 2732), that work in complex manufacturing environments must be divided into simpler tasks. An important
manifestation of this assumption is increasingly fragmented responsibility as employees perform more
and more narrowly defined roles. The result is waste as engineers and managers perform more non-value
added work in the form of meetings and coordination to achieve desired results (Womack 1996, p. 13 1).
Another important consequence of worker specialization is disengagement. Despite the highly
sophisticated nature of work in a semiconductor factory, especially that in a facility like Fab D2, which
performs much work at the cutting edge of silicon technology, workers' roles often become rote and
repetitive. Coupled with this is the sequestration of data analysis and decision-making outside the
factory. Although the primary intent is to shield workers from this information and allow them to
concentrate on the primary role of production, the effect is that workers are not involved in the processes
of learning, discovery, and improvement. As a result, they often do not feel challenged, and management
decisions frequently seem arbitrary.
Fab D2's normal tendency would be to increasingly subdivide responsibility and push more
decision-making and problem solving outside the factory as operations become more complex. Although
the objective is making production operations smoother and easier to manage, the irony with this
approach is that it places even more burden on factory engineers and managers while not utilizing the full
potential of all the organization's resources. In addition, factory engineers and managers are beginning to
realize hard constraints on the time and energy that they can focus on factory problems. Factory task
forces devoted to continuous improvement of the production process, while promising modest
productivity gains, illuminate no clear path towards enabling the factory to deal with its increasing
commitments. Couple this with a downturn in the semiconductor industry" and a hiring freeze at the
corporation, and it is clear that factory employees need more effective ways of managing the vast
amounts of information that they must deal with on a daily basis.
18 Industry CEOs, "2003 Economic Forecast: CEO Roundup", SemiconductorInternational,January 1, 2003.
http://www.e-insite.net/semiconductor/index.asp?layout=article&articleid=CA268037
Page 42
This issue goes beyond Fab D2's cleanrooms, however. As Intel diversifies its silicon businesses
from logic to include wireless, Internet, and other communications technologies, high-mix, low voILume
strategies will become ever more important to the company's success (Scholtz, p. 8); it is likely that all of
the corporation's production facilities will look more like Fab D2 as processes proliferate and the
company is forced to make its operations more flexible and responsive. Combine these concerns with
increasing downward cost pressures from the marketplace and shareholder expectations for financial
performance, and it becomes apparent the company must seek more efficient ways of dealing with
information and harnessing all of its resources if it is going to maintain its position as a leader in the
semiconductor industry.
4.9
Summary
Fab D2's production environment is extremely complex, perhaps one of the most complex within
Intel Corporation, or perhaps even the world. Yet despite, or perhaps because of, the systems, policies,
and other mechanisms devised to cope with this complexity, engineers, supervisors, and managers devote
an enormous of time, effort, and energy on a daily basis simply regaining situational awareness of factory
conditions, including gaining a sense of the problems that need to be addressed and determining how to
go about tackling those problems. At the same time, the average factory worker lacks perception of the
situation outside his or her own narrow area of focus, much less how he or she can contribute in solving
the pressing issues of the day. Although this approach worked adequately for the factory in the past,
much more can be done to more efficiently deal with this information burden in order to improve
productivity and compensate for the rising levels of complexity that the factory increasingly faces.
Page 43
This Page IntentionallyLeft Blank
Page 44
5
Information Visualization and Decision Making
Before delving into details of the tools that were implemented and developed at D2 over the
course of this work, it is valuable to first discuss the merits of information visualization. This chapter
provides a review of relevant information visualization concepts, especially theory relevant to the unique
demand for real-time decision-making in manufacturing environments. Advantages and benefits of the
visual display of information are explored, as well as some potential pitfalls.
5.1
Information, Decision Making, and Feedback
Figure 12 depicts action as the constant interplay of four elements:
-
The actual state of the world
-
Goals, what we desire the state of the world to be
-
Execution, actions taken to influence the world and bring it in line with our goals
-
Evaluation, our perceptions of the world's state and our comparisons of that perception
against our goals
For simplicity, static goals are assumed; the effects changing system states might have on the
goals are not taken into consideration (Sterman, pp. 532-535).
Figure 12 identically describes the action cycle in a manufacturing environment, except that
"manufacturing system" is substituted for "world", since the bounds of the manufacturing system
circumscribe the actions that are executed and the evaluations that must occur. Work in a manufacturing
environment can thus be equated with a constant search for information that tandemly answers the critical
questions of performance (the effects that actions have on the world) and guides worker productivity, the
desired system goal.
Implicit in this model is the concept of feedback - transmitting information back to the user about
the state of the world, especially the effects that past actions had on changing the world-state. In order for
that information to act as an effective decision-making aid, the feedback cycle time must be at least as
rapid as the decision cycle time, preferably faster. This is especially evident with fast cycle time
decisions, ones that repetitively occur on the order of minutes or even seconds, such as those that factory
workers make in the normal course of a day's work.
Long feedback delays cause problems, since without proper timely measurement and evaluation
of the world state, the data that informs decision-making (the first step of execution, described below in
Figure 13 as "intention to act") is outdated and frequently obsolete. Slow feedback relative to the time
frame for decision-making is a prime source of system oscillation for both physical and human systems
(Sterman, p. 114); in classic control theory this phenomenon is known as "under damping" (Phillips,
p. 122). Unfortunately, as demonstrated in the previous chapter, feedback is often slow to the factory floor
Page 45
Goals
What we
want to happen
Execution
What we do
to the world
Evaluation
Comparing what
happened with what
we wanted to happen
THE WORLD
Fi2ure 12 - The Action Cycle, Adapted from Norman, p. 47
at D2, occurring at a much slower rate than would otherwise be desired for such a fast-paced
manufacturing environment.
One way slow feedback manifests itself in D2's decision-making is in daily-changing TD
priorities. Supervisors and other managers find it difficult communicating to the shop floor what
priorities should be much more than once or twice a shift. Inefficiency results in the manufacturing
system as workers change their focus from shift to shift to whatever TD material is proving most
troublesome. This is often at least partly the consequence of alternate attention and neglect for those
processes in previous shifts.
5.2
The Gulf of Evaluation
Oddly enough, Fab D2 already has much infrastructure in place that could support rapid feedback
and decision-making. Every piece of processing equipment in the factory, for instance, is connected and
directly supplies data to both Workstream and TP/2. However, with few exceptions, tools (other than the
plethora of automated reports discussed earlier) have not been developed that facilitate conversion of that
data into useful information. Of those exceptions, none have been developed that specifically address
workers' information needs on the factory floor. In a sense, this work represents efforts to overcome this
data-information transformation gap, better described as the Gulf of Evaluation,
9
by providing tools that
enable system users to overcome human limitations in the ability to handle large amounts of fast cycle
19 "The Gulf of Evaluation reflects the amount of effort that the person must exert to interpret the physical state of
the system and to determine how well the expectations and intentions have been met." Norman, p.51
Page 46
Goals
Execution
Intention to act
Evaluation of
interpretations
Sequence of actions
Interpreting
the perception
Execution of
the action sequence
Perceiving the state of
the world
Evaluation
If
4
THE WORLD
Figure 13 - The Seven Stages of Action, Adapted from Norman, p. 47
time data. Information visualization's purpose in this context is bridging the Gulf of Evaluation by
enabling rapid, accurate decision-making with clear, unambiguous evaluation of the current system state.
5.3
Information Visualization, Memory, Perception, and Human Thought
Humans are primarily visual thinkers; our perceptual and reasoning abilities are intimately
connected. A majority of the information that we glean from the world around us we take in by sight, and
when we think we tend to imagine the world in terms of objects, things, or experiences rather than words,
phrases, or sentences (Kercel, p. 2205).
Yet despite these twin capabilities, human short-term memory
is extremely limited, capable of handling only between five and nine pieces of data at any particular time
(Norman, p. 66).
Information visualization capitalizes on our innate strengths and compensates for our limitations
by shifting most of the burden on memory to powerful perceptual processes. This enhances the process of
analysis and discovery by allowing us to detect patterns, make connections and comparisons, and draw
conclusions from large amounts of data (Zhang, p. 7). Information visualization thus allows efficient
communication and absorption of complex quantitative ideas by joining the reinforcing capabilities for
thought and perception while relieving the encumbrance on recall.
As an aside, visualization is a key tenet of Object Oriented Programming, in which programmers visualize the
subjects of the programming process (objects) and their associated attributes (properties) and actions (methods)
(Liberty, p. 132).
20
Page 47
Goals
Where Fab D2
Excels - Goal
Setting and
Execution
Intention to act
Evaluation of
interpretations
Sequence of actions
Interpreting
the perception
Execution of
the action sequence
Perceiving the state of
the world
here Fab D2
Struggles Perception
and
Evaluation
TH E WORLD
Figure 14 - Fab D2 and The Seven Stages of Action
5.4
Information Visualization and the Gulf of Evaluation
Returning to the action cycle presented in more detail above (Figure 13), the steps of evaluation
and execution are each broken down into three stages. In the process of evaluation, the focus of this
work, we first perceive the world around us, then interpret those perceptions, and finally evaluate those
perceptions for progress against our intended goals. Information visualization aids this process by
facilitating the initial perception and subsequent interpretation of those perceptions (overcoming the Gulf
of Evaluation), allowing our thought processes to focus on the last stage - which is also the first step in
decision-making - evaluation of those perceptions against our goals.
Taken one step further yet, Figure 14 above depicts the part of the action cycle at which Fab D2
excels - the formation of goals and the execution of actions in line with those goals - and the part with
which it struggles - perceiving the state of the world and interpreting those perceptions.
5.5
A Demonstration of Information Visualization
An excellent demonstration of the power of information visualization is given by Anscombe's
quartet (Anscombe, pp. 17-21):
Page 48
Data Set
I
Data Set I11
Data Set IV
Data Set III
x
Y
x
Y
x
Y
x
Y
10.0
8.04
10.0
9.14
10.0
7.46
8.0
6.58
8.0
6.95
8.0
8.14
8.0
6.77
8.0
5.76
13.0
7.58
13.0
8.74
13.0
12.74
8.0
7.71
9.0
8.81
9.0
8.77
9.0
7.11
8.0
8.84
11.0
8.33
11.0
9.26
11.0
7.81
8.0
8.47
14.0
9.96
14.0
8.10
14.0
8.84
8.0
7.04
6.0
7.24
6.0
6.13
6.0
6.08
8.0
5.25
4.0
4.26
4.0
3.10
4.0
5.39
19.0
12.50
12.0
10.84
12.0
9.13
12.0
8.15
8.0
5.56
7.0
4.82
7.0
7.26
7.0
6.42
8.0
7.91
5.0
5.68
5.0
4.74
5.0
5.73
8.0
6.89
Table 5 - Raw Data Describing Anscombe's Quartet
These data set s are unique because when regression is performed all four a re described by the
same linear relationshi p:
y=3+0.5x
and all share the same statistical description:
Number of Points, (n)
11
Mean of the x's = 9.0
Mean of the y's = 7.5
Regression coefficient of y on x = 0.5
Equation of regression line: y = 3 + 0.5x
Sum of squares = 110.0
Regression sum of squares = 27.50 (1 d.o.f.)
Residual sum of squares of y = 13.75 (9 d.o.f.)
Estimated standard error of slope = 0.118
Multiple R2= 0.667
Table 6 - Summary of Statistics for Anscombe's Quartet (d.o.f. = degrees of freedom)
Careful study of the data in Table 5 yields little understanding, even for a highly trained
mathematician; to many they might appear as random numbers on a page. Even worse, a naYve analysis
Page 49
Data
Set I
Data Set
10
11
10
10
15
0 1-0
20
Data Set III
15
10
10
5
10
15
20
Data Set IV
15
0
51
15
20
10
15
Figure 15 - Graphical Representations of Anscombe's Quartet - Linear Regression Lines included
of the calculations in Table 6 (especially without investigation of the residuals) could lead one to assume
that the four data sets were somehow related. A glance at the graphs in Figure 15, above, however,
reveals that, except for the statistical description, such a conclusion would be erroneous; points in the first
data set look as if they are scattered randomly around the regression line, points in the second seem like
they could better be described by a quadratic relationship, and points in the final two appear that they
could be described by different linear relationships (with one significant outlier each) than one suggested
by the regression.
This example drives home the argument for information visualization. Simply looking at the raw
data is too taxing on our mental capabilities; there are too many things to think about and keep track of at
once. Looking at the data in textual format, the eye skips from column to column and row to row as the
Page 50
20
cognitive processes vainly attempt to understand what is being presented. The data itself distracts from
the message that should be conveyed.
When that information is presented in graphical form, however, it is simultaneously compressed
and simplified. Analyzing the data together as a visual whole, gleaning meaning is much easier;
relationships are easier to establish, and differences both within and between the data sets become
obvious and relevant to the investigator.
5.6
Computers and Information Visualization
The case for information visualization becomes even more compelling when combined with
modern computers' ever more powerful computational and display capabilities, although only recently
have processors and software become robust enough for the average user to fully leverage these abilities
(Petzold, p. 372). Specifically, computers aid the information visualization process through their strength,
which is also another human limitation - the ability to rapidly, repetitively, and flawlessly perform
millions of complex calculations and algorithms (Feynman, p.17). Computers, when used for the visual
display of information, thus link their powerful computational processes with flexible and robust human
perceptual, reasoning, intuitive, and problem-solving abilities (Rogers, p. 1265). This allows computers
and their display devices, when additionally linked with electronic sensors, to become a powerful medium
of communication, allowing real-time feedback over areas separated by space and time.
Page 51
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Page 52
6
Information and Decision Making on the Shop Floor - Electronic Monitor Boards
The project's first major aim was providing rapid, relevant performance feedback to factory
workers. The chapter begins with a closer look at the challenges manufacturing technicians face
collecting the information that guides their actions, including a brief look at existent information sources.
Following this we introduce Electronic Monitor Boards (EMBs), the system that was selected, after
alternatives were researched and explored, to provide performance indications to factory MTs. Finally we
examine opportunities for improvement in the EMB system.
6.1
MTUI as a Primary Information Source
Fab D2 MTs, as highly trained production workers, must be at least familiar with a wide range of
issues, including basic seniconductor manufacturing process flow, solid-state device theory, operations
and repair procedures for the specific tools that they retain qualifications for, and contamination and
quality control measures. Despite this, 80% of the information that they require on a recurring basis is
contained by a handful of information sources. Specifically, the information that they need most
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frequently to perform productively is: which WIP to run next on what tool, or failing that, what problems
they need to focus on next so that they can continue to process material.
MTs' primary method for gathering information about their areas of responsibility is MTUI,
Manufacturing Technician User's Interface. Two examples of the primary kinds of information that
MTUI provides are shown above, and one below. Figure 16, a Lot Dispatch screen, shows the status of
WIP queued for processing on that tool, prioritized by Factory Scheduler. The first lot listed is a priority
lot, designated with a (red) flag in the eighth column. Figure 17, an Entity Status screen, displays basic
tool status information. Finally, Figure 18 depicts summary information contained on a MTUI Station
Controller screen, including lots currently in process on that tool.
In addition to the information provided by these three screens, a reticle screen (not pictured) is
available for certain lithography tools, and various links (listed in boxes at the top of the screen) provide
Page 54
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access to various other information sources, such as SPC++,2 Factory Specifications (procedures), and
the Internet.
6.2
MTUI Shortcomings
Although MTUI's various screens are excellent sources of information, the system has a
significant
limitation; in order to view WIP or tool information for a specific entity, a worker must stand
in front of that tool's station controller and access MTUI for that tool. The problem this creates is
twofold. First, MTs are typically not aware of tool and WIP status outside their immediate proximity. If
a tool is idle or has an alarm or fault, for instance, or if a tool requires other attention, the technician
responsible for that tool would not know without traveling to the tool, accessing the appropriate MTUI
screen, and reading and interpreting what is presented. This is especially of concern when a technician's
attention is divided over many disparate parts of the factory separated by time and distance, since a
SPC - Statistical Process Control. SPC++ is Intel's proprietary system for displaying and analyzing SPC data.
SPC++ issues are explored in the next chapter.
Page 55
0
1 Om
Figure 19 - A typical fab worker's work area - figures in red indicate
tools belonging to a specific worker's area of responsibility
worker does not have visibility into problems outside his or her immediate line of sight. As mentioned
previously, this is precisely the case for many of Fab D2's workers due to poor factory tool layout.
Although this is difficult to quantify, a key result is that technicians are slower to react to problems than
they otherwise might be.
MTU
I's second problem derives from the first. As technicians itinerantly perform their duties,
they spend a tremendous amount of time and motion gathering information about tools and WIP in their
areas of responsibility. Figure 19 above illustrates this problem.
Figure 19 depicts an "average case" of the dilemma faced by factory technicians. In this
example, a factory worker is responsible for
11 tools (marked in red) divided over two bays, with the bays
separated by a walking distance of 10 meters. Additionally, each bay is 20 meters deep. In most cases, a
worker is responsible for many more tools, and has his or her attention divided over many more bays to half a dozen - with a longest travel distance between two bays of over 50 meters, and bay lengths at
times approaching 30 meters. Since workers lack visibility of their tools' performance, they find
themselves roaming from bay to bay and tool to tool. They waste a tremendous amount of time as a
result. In the example considered above, for instance, if a worker makes just two extra round trips per
Page 56
up
hour 22 between the ends of these two bays gathering information, then he or she will travel roughly an
extra I%-mile (2000 meters) over the course of a ten-hour shift.23 Since roughly 150 workers work each
shift at Fab D2, this means that over the course of a week workers travel nearly 2600 extra miles,
and
over the course of year they travel roughly 130,000 extra miles performing their duties. At a
pace of 4
miles per hour, this means that workers spend approximately 32,800 extra hours gathering information.
The economic costs of this time are significant; for a fully burdened cost of $30 per hour for the average
worker, almost $1,000,000 is spent on this single non-value added activity. Improving productivity
by
eliminating much of this costly wasted motion is a key theme of this work.
6.3
Alternate Information Source - PFMBs
The reason why factory workers use MTUI as their primary information source is that it is the
only tool that provides relevant, real-time information in a readily accessible form. As a result, it is the
only tool that assists the fast cycle time decision-making that they execute over the course of a shift.
Before introducing EMBs, we pause now to consider one other tool, Process RTC Flexible
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22
23
An average worker could be expected to travel at least twice as
much as this.
A worker receives two half-hour breaks and one hour-long
lunch period over the course of a shift.
Page 57
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Figure 21 - PFMB Configuration Screen
Monitor Boards (PFMBs - Figure 20 above), another near-real time information source available for use
at Fab D2. A Workstream-based function and also an EMB precursor, PFMBs are one of the few tools
that consolidate information about factory conditions. PFMBs serve as a useful transition to the EMB
system, because from them we learn that a system needs to do more than simply present information; how
that information is presented is often as important as the information itself.
Although D2 factory supervisors find some value from PFMBs, technicians rarely, if ever, use
them for a number of reasons. First, the boards are text-based, which as demonstrated with Anscombe's
quartet, is often more difficult to decipher than information in visual format. Second, system fields are
limited to tool state information; crucial WIP information is not available. Third, PFMBs can only
display eleven line items at a time; PFMB configurations usually contain multiple screens, scrolling
through one screen about every minute. Although operators can speed up this process by scrolling
manually, this places more burden on human memory - a weak ability - to remember and combine
Page 58
crucial facts, old and new, while simultaneously reasoning about the presented information (Tufte 1990,
p. 50). A final reason why PFMBs are less user-friendly is the difficulty that users have configuring
them. Figure 21, above, shows the PFMB configuration screen. Many potential PFMB users find this
screen intimidating and confusing; the screen's non-intuitive design itself is an obstacle to its use.
6.4
Electronic Monitor Boards (EMBs) - Background and History
EMBs were originally developed in 2000 as part of a suite of information tools for Intel's
Assembly Test Manufacturing (ATM) sites that dramatically improved productivity at these facilities:
The history behind EMBs' development merits some discussion, since it helps explain why proliferation
in Intel's semiconductor manufacturing community has been so slow.
E.MBs were developed first at Intel's ATM sites primarily due to two important factors. First, the
corporation does not consider Assembly/Test operations part of its core competencies. As a result, Intel's
ATM sites must constantly and aggressively justify their existence to the rest of the corporation, or risk
being outsourced. These sites, compared to the semiconductor fabs, which are considered much more
conservative and risk intolerant in their approach, are also thus more willing to take risks and try novel
ways of doing things to reduce costs. A second factor often cited why EMBs were first developed at
Intel's ATM sites is the fact that these facilities are closer to the company's customers, and are thus more
in touch with technologies that are transforming business operations.
Although it has taken some time to get to this point, Intel did begin migrating the system in early
2002 to the semiconductor manufacturing community by piloting the system at Fab 18 in Israel. All
system screen snapshots below were taken from a near-real time web link with Fab 18's EMB system in
late December last year.
6.5
System Capabilities and Architecture
EMBs are a "fat server" (Orfali, p. 22), web-based system that provides system users with near-
real time information (15-30 second time latency) about tool status, WIP status, and other basic
performance indications.
6.5.1
Information Sources
EMBs pull information from three basic information sources, although other information sources
can be added as the system develops. These three sources, which are all legacy Intel proprietary
automated systems, are Workstream (tool and WIP status information), TP/2 (tool exception and alarm
indications), and Factory Resource Status Board (FRSB or "Frisbee" - goaling information). Given the
large volume of information handled by the system and the fast system refresh rate, a fair amount of
computing power must be utilized; handling up to 200 clients, for example, requires three servers - one
24
2
Numerous interviews with Fab D2 shift supervisors, August-November
2002.
Various interviews with EMB system developers, July-September 2002.
Page 59
Back End Architecture
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handles "back end" information inputs, a second processes and stores information, and a third acts as a
"fl-ont end" with the system's clients. Figure 22, above, provides an overview of
system architecture
including data inputs.
The flow of data through the system consists of (Intel, p. 8):
6.5.2
"
Data originating at the data source;
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*
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Modes of Operation
EMBs operate in two modes - an Equipment View and an Operations View. Although both
modes present similar information, each organizes and presents that information in very different ways.
6.5.2.1 Equipment View
An example Equipment View is depicted below in Figure 23. This view provides the user with a
highly visual, intuitive "snapshot" of tool performance in his or her area of performance. A major system
feature is color-coded tool state information; the legend at the top of the screen provides a guide for
Color
State
Interpretation
Dark Green
Busy
Actively processing material
Pink
Scheduled Down
Preventive Maintenance (PM) action in process
Red
Unscheduled Down
Awaiting or undergoing corrective maintenance
Orange
Idle
Processing of material complete; tool awaiting operator attention
Yellow
Interrupt
Awaiting operator disposition of tool alarm condition
Table 7 - EMB Tool Status Color Indications (colors not listed refer to more infrequent tool states)
Page 60
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interpreting these colors. Table 7, above, explains those indications that occur most frequently.
As an example, HDP 05 in Figure 23 is colored red, which signifies that an event occurred placing that
tool in ain Unscheduled Down condition.
Other indications provide system users with more details of tool conditions besides color-coded
tool states. Numbers in parentheses for each tool, for instance, indicate the number of lots and wafers,
respectively, that are processing on each tool. A redundant, two-letter tool state indication is provided in
the white "State" box. If tool has an alarm, a flashing red bell appears in the "Alarm" box. Finally, the
colored bar graph at the bottom of each tool provides information about the historical performance (the
percentage of time the tool spends in various states) of each tool over a defined period of time, such as
over the course of a shift. Returning to HDP 05, two lots, with a total of 50 wafers are present in the tool,
signifying that an error likely occurred while the tool was processing that material. UD in HDP 05's State
Box confirms that the tool state is Unscheduled Down. Finally, since the color for each tool's historic
performance indicator in Figure 23 matches each tool's current state, it is likely that it is early in the shift,
since tool states have not changed.
Page 61
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In addition to these indications, the Equipment View allows users to "drill down" and obtain
additional information. Figure 24 shows supplementary Workstream tool state information that is
displayed after clicking on a tool's colored current state indication. Figure 25, accessed by clicking on
the white "State" box, displays information about specific lots in process on a particular tool. Finally,
alarm details are shown (figure not shown) when a user clicks on a tool's "Alarm" box.
6.5.2.2 Operations View
An example Operations View is shown below in Figure 26. Like the Equipment View it displays
color-coded tool status information, although in a more compressed format. Its primary purpose,
however, is providing WIP status information in a user's area of responsibility. The central column,
"Current Operation," presents this data. Working from left to right, sub-columns provide specific
information about inventory for these operations, including total inventory on hand, amount of inventory
in process, amount of rework inventory, amount of rework inventory in process, and the number of "hot"
(Priority I and 2) lots and lots "on hold" in inventory.
Page 62
In addition to providing information about WIP for specific operations in a user's area of
responsibility, the system also provides that user with information about operations upstream and
downstream of his or her station ("Feeders" and "Bleeders," respectively) - specifically, total inventory,
inventory in process, and inventory on hold for these operations. Finally, a user is able to "drill down," as
before, to obtain specifics on tool, WIP, and alarm conditions.
6.5.3
Client Configurability
A key feature of the EMB system is that it is highly configurable to users' needs. (Figure 27,
below, depicts an example EMB Equipment View configuration screen.) Moreover, configuring an EMB
system is highly intuitive; a user requires only five or ten minutes of training to become familiar with all
aspects of system operation. This is crucial since a worker can rapidly and easily change his or client to
display desired information, without stopping to obtain technical assistance from a co-worker, a
supervisor, or automation personnel. Another EMB precursor named IMBs (Intel Monitor Boards), for
instance, provided useful near-real time text-based WIP information. However, this system required
automation support for system updates, which necessitated burdensome coordination between the shop
floor, automation, and engineering. The extra energy and attention required by users and automation
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Page 63
personnel alike for system maintenance was a major reason for the system becoming defunct after only a
relatively short period of use.
6.5.4
System Flexibility
Another key advantage of the EMB system is system flexibility. Parent-child relationships can be
established, for instance, between tools that are linked or are complete subsystems of larger entities.
HPCVD or dry-etch chambers, for instance, can be represented as sub-entities contained within a larger
parent entity. Similarly, lithography stepper-track links can be represented as child-parent relationships.
Figure 28, for instance, displays lithography steppers (DSQ tools) as children within parent QCT tracks.
The EMB system is flexible in other ways as well. Conditions (such as color coded tool states)
can be introduced, for instance, to reflect particular factory needs, and as mentioned previously, a wide
variety of data sources can be added that provide additional information about factory conditions.
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EMB Productivity Impacts
EMB indications allow users to quickly grasp tool and WIP states across their areas of
responsibility, including areas outside their immediate line-of-sight. Relatively large features with
intuitive, eye-catching color-coding facilitate interactive, rapid analysis of current conditions and
subsequent decision-making about where and how they should focus their attention next. Put another
way, providing users with the most essential 80% to 90% of information in a highly intuitive form, and as
a "snapshot" of system performance enables them to more effectively bridge the Gulf of Evaluation. As
discussed previously, this is of particular concern at Fab D2, where technicians travel a great deal
attempting to understand the performance of tools that are scattered throughout the factory.
The most easily quantifiable way that EMBs will improve productivity is reducing the amount of
non-value added motion by helping working gain visibility into conditions in their areas of responsibility.
Implementation of the system is expected to save the factory, in direct labor productivity, between
$250,000 and $500,000 when fully implemented by the second quarter of 2003. These are significant
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savings considering that the factory is only paying for incremental implementation costs, approximately
$80,000 in the first year for hardware (primarily servers) and automation support.
A second, albeit harder to quantify, way that EMBs will improve productivity is by freeing
another resource, factory supervisors' time. Since workers are more aware of their surroundings, they can
be more proactive problem solvers and make better quality decisions. Since workers rely less on
management for guidance, supervisors and managers can spend less time managing and coordinating
daily factory operations (essential but inherently non-value added activities) and more time on
productivity improvement projects.
Yet harder to quantify are the effects that EMBs and other innovative information technologies
will have on improving factory morale by helping push decision making down to the lowest competent
level and involving workers more fully in all aspects of production (Womack 1996, p. 52). This could
Page 66
take a variety of forms, such as affording opportunities for collaborative tactical and strategic2 shop floor
decision-making, and also by giving workers a greater sense of autonomy and responsibility in the course
of their daily work. Taking this a step farther, EMBs are envisioned as part of a larger effort of factory
improvement through a process of "creative tension" in the work environment (Womack 1991, pp. 101102).
6.6
Implementation Issues
Although an important result of this work was convincing Fab D2 leadership to allocate resources
for EMBs by convincing them that the system would bring value to the factory, implementation will bring
further challenges.
6.6.1
Redefining Work Processes
Perhaps the most important implementation issue for EMBs will be incorporating them as part of
factory technicians' work routines. In accomplishing this, factory leadership is embarking on a phased
approach for system introduction. The system is being launched first in those areas identified as having
the most potential for benefiting from the system. Specifically, the entire Etch functional area and the
AMAT 5K (a Thin Films tool set) cluster, both of which have problems maintaining situational awareness
of tools dispersed over many bays, will pilot system launch. Factory leadership hopes to use these
constituencies as a springboard for proliferation throughout the factory by generating enthusiasm in the
factory work force as well as learning how the system can best be utilized.
Even before initial system startup, however, much thought has gone into how initial
implementation will occur in the pilot areas. Since workers will ignore any system that requires much, if
any, effort to access, standard procedure will likely be simple. Specifically, every station controller not in
use for another purpose will display EMB indications on an open browser window. Since bays normally
have eight to ten station controllers, system indications will constantly be available for review,
heightening chances that workers will actually use the system. In addition, to avoid confusion among
factory workers, each of which might desire a slightly different EMB setup, a first regime of "super
users" - workers allowed to change system configurations - will likely be identified. These workers will
solicit input from peers in their tool clusters across shifts and make appropriate changes to system
configurations.
6.6.2
Technical Issues
Another challenge for the EMB system will likely come in the longer term. Although EMBs
bring significant value, the system is essentially a kludge of kludges. EMBs port information from
unwieldy legacy systems that have constantly grown and evolved to meet Intel's manufacturing ieeds
Tactical and strategic decision-making in this context refer to decisions that affect work immediately and over the
course of a twelve-hour shift, respectively.
1
Page 67
without significant redesign or replacement. As a longer-term solution, systems should be developed that
ntegrate many types of information display and decision aid technologies. This section is meant simply
to alert the reader to these issues; they are discussed in more detail in Chapter 10.
6.7
Suggestions for System Improvement
A significant portion of this work was identifying ways to make the EMB system even more
useful to factory workers. All of the suggestions below are taken from interviews with factory workers,
supervisors, and managers conducted over the six-month course of on site work at Fab D2. Four of the
most promising ways that system capabilities could be extended are discussed in the paragraphs that
follow. The system's developer in Bangalore, India has accepted at least three of these recommendations
(Preventive Maintenance indications, geographic mapping, and multiple client configurations) for
development.
6.7.1
Preventive Maintenance Information
Technicians face challenges not only in understanding and reacting to current system states, but
also in anticipating and proactively planning for future disruptions to the manufacturing process. One of
the most common and important of these disruptions is Preventive Maintenance (PM) actions.
PMs take a variety of forms, and occur with varying periodicity. Daily particle emission checks,
for instance, are performed on many tools. Weekly and monthly checks involve more in-depth analysis of
tool performance. Annual or semi-annual checks might include parts change-outs and complete sensor
and gauge calibrations. Still other checks occur based on wafer counts, or the number of wafers that have
been processed since the last wafer-based PM of that kind. The purpose of all of these checks, however,
is the same - ensuring proper tool functionality, fixing potential problems before they adversely affect
manufacturing system performance, and keeping process parameters under control.
Although technicians generally have a good grasp of long cycle PMs, especially those with
monthly and longer cycle times, they often have trouble maintaining awareness of when many faster cycle
time checks, such as daily and weekly tool PMs, will fall due. As a result, MTs spend significant time
researching PMs, which takes time from their ability to perform other value-added activities. Even worse,
if an MT does not maintain sufficient awareness of PMs and a PM check is missed, then a tool may
automatically prevent processing (this is the case for many wafer based PMs), unintentionally disrupting
smooth processing of material. Or, if automatic safeguards are not in place, then additional work may be
required for dispositioning lots that were processed after the check became overdue.
By anticipating these disruptions, technicians can better optimize their activities and coordinate
their actions with activities upstream and downstream of their stations. A technician might push a check
up, for instance, when lie or she realizes that a tool downed for a PM will impact movement of a high
priority lot. Similarly, a technician might better schedule PMs, optimizing production over the course of
Page 68
a shift. Or, by better understanding when checks will occur during the course of a shift, a technician can
make better predictions about output for his or her area of responsibility and communicate that to his or
her supervisor. An answer to this need is incorporating PM information into EMB displays. Figures 293 1 illustrate how this might be accomplished.
All of these figures display tools with status for at least one wafer-based and one time-based PM.
Figure 29 displays information for pending PM actions. Green indications signal that tool HDP 01 has
800 wafers left on wafer-based PM M8, and 20 hours remaining on time-based PM W4. As the PM
draws nearer, either in time or in wafer counts, the green slice of the pie or the green bar respectively
shrinks. At a certain predetermined point, such as when there are 200 wafers or 4 hours remaining, these
indicators turn a cautionary yellow (PMs M9 and D2).
Figure 30 depicts a scenario for overdue PM actions. In this case, red indications signal that tool
IMP 23 has 800 wafers left on wafer-based PM M5, and that time has similarly expired for time-based
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Figure 29 - Pending PM Information
Page 69
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ALARM
UD
No Wafers
Remaining
Wafer - based PM
PMV: W3
DRR-
5 Days, 10 Hours
PM Name
r text
AI,2Tool-ti
PM Due
Time - based PM
(more than 24 hours remaining)
11 Days, 10
Hours to go
Time - based PM
(time expired/PM due)
PM Due
Figure 30 - Overdue PM Information
PM W3. One more indication, for PM W3, indicates that 5 days and 10 hours remain for time-based PM
W3. When W3 falls due within 24 hours, the indication will change to a green pie chart form as
illustrated above in Figure 29 for PM W4.
The final figure in this series, Figure 31 below, illustrates PMs in progress. In this case, pink
indicators for both time and wafer-based PMs, W4 and M8, respectively, signal to technicians how well
they are performing based on goaled times for accomplishing the PM in question. As time elapses, the
indicators shrink, allowing workers the ability to compare how much work they have remaining for the
PM action with the amount of goaled time remaining.
6.7.2
Geographic Mapping
Geographic mapping in the context of this work signifies plotting manufacturing system
information on a physical representation of that system. Tool states and WIP locations, for instance, are
on a display scaled to the system's dimensions. Figure 32 illustrates this idea; for simplicity only colorcoded tool state information is exhibited.
Geographic mapping provides a richer understanding of the system's dynamics by moving even
more information "from the head to the world," liberating more mental resources from supervisors and
Page 70
other managers to more efficiently communicate goals, strategies, needs, potential conflicts, and
solutions. This is especially useful when people from different areas need to coordinate actions and they
are not intimately familiar with details of each other's areas of responsibility.
Geographic mapping tools can be extended to provide even more end user benefit. Functions can
be included, for instance, that allow users to zoom in and investigate specific areas in more detail, or to
zoom out so that various regions or even the entire factory can be viewed in aggregate. Other features
include blanking out certain sections of the factory, so that a user can examine, for instance, information
for just certain functional area(s) or tool cluster(s). Or, a user could choose to survey just WIP or tool
state information. The former, WIP-only view, could be used to focus on understanding what areas are
acting as production limiters, while the latter, tool-state only view, could be used to obtain a "snapshot" of
overall factory equipment health. Finally, as in the original EMB system, users could "drill down" and
obtain specifics about tool states, WIP status, or other factory events of interest.
Some progress has been made already in developing geographic mapping tools, independent of
the EMB system, at various Intel fabs." However, these projects have been largely local and ad-hoc;
there has been no coordinated, company-wide effort to develop these systems. An excellent way to
systematize these initiatives would be developing geographic information mapping capabilities for the
STATE
ALARM
BU
Wafer - based PM
PM Name
(PM In Progress)
PM: M8
Tool-tip text
PM: W4
PM in progress - 2 hours
of goaled time remaining
Indicators inform technicians
how they are performing
with respect to goaled time
for each PM action.
Time - based PM
(PM in progress)
PM in progress - 2 hours
of goaled time remaining
Figure 31 - PM Actions in Progress
TOST, a geographic map of tool states, and VISOR, a construction deconfliction tool, are examples of two tools
developed at Intel's Fab IIX in Albuquerque, New Mexico.
2
Page 71
I~1
U
I 0M
I
EE
Figure 32 - An Example of Geographic Mapping
- color codes represent tool states (see Table 7)
EMB platform.
6.7.3
Recipe Grouping
As explained earlier, Fab D2 runs many varying processes to meet demand for diverse product
requirements; the factory currently runs six different production and technology development processes,
and will be running nine by the end of the first quarter of 2003. Running many processes multiplies the
information burden for factory workers, since several dozen operations often exist for any particular tool
set.
Product and operations proliferation causes problems when workers need to view information
about WIP in their areas. Despite the Operations View's compressed format, this will likely cause a
problem similar to the one discussed for PFMBs (IMBs experienced a similar problem) as technicians
find themselves scrolling through many screens of information. The invariable result is that searching for
and assimilating large amounts of information becomes too difficult, time consuming, and distracting to
the job at hand as too much burden is placed on memory, a weak mental ability. Thus, workers do not use
the tools that should, but fail, to make their jobs easier.
Page 72
Operations Field reflects that either operation or
recipe (multiple operations) data can be displayed.
Feeders
Operation/RecipeC 0eratRecipenv
MULTIPLE
FRONT
130
IP
Inv IP Hi
25 0
MULTIPLE
PLUG
MULTIPLE
LONG
Gasonics Recipes
Currpt Operatifs
ot Hid [dk RwklF Outs Pace FLGI Seg
0
0
0
426 660 550 600
Bleeders
Operation/Recipe
MULTIPLE
iP
50
Iv
zZ175
27
53
25
0
24
30
0
222
310
250
600
MULTIPLE
0
0
10
0
474
763
650
400
MULTIPLE
iP
BU Inv
300
MULTIPLE
Inv
IP
0
25
MULTIPLE
75
50 0100
DESCUM
139
0
Hid
0
0
0
20
0
340 1 495 1 400 1 500
Hid
10
MULTIPLE
Hid
Inv
IP
Hid
0
46
25
MULTIPLE
0
nv
IP
Hid
LONG, LONG
GAvHid
145
BU
25
25
0
0
0
265 1 440 1 445
500
Figure 33 - An Example of Recipe Grouping
Despite this, operations with different numbers often perform the exact same recipes.2' For the
roughly 120 operations in the Fab D2 Gasonics Non-Copper tool cluster, for example, only 14 separate
recipes exist. An example is the "Plug" recipe, which is composed of the following 21 operations. 29 A
solution to this problem would be aggregating lots by recipe ("Plug") instead of by individual operation.
An illustration of this concept is provided above in Figure 33. Five recipes - Front, Plug, Long, Descum,
and Long-Long, which comprise over 90% of the operations for the Gasonics Non-Copper area, are
represented in this example.
6.7.4
Multiple Client Configurations
Each EMB client only remembers two configurations - one Operations view, and one Equipment
view. However, there are many circumstances when several workers, all with responsibilities for
different tool sets, use the same EMB display. Technicians continually logging in and out refreshing the
screen with EMB information for their client's settings would waste valuable time, as would
reconfiguring the screen on the fly. Besides, if workers had to do this, they would probably not put up
with the hassle, and simply ignore the system altogether.
A way of dealing with this problem is creating a way so that each client remembers several preconfigured settings. Workers (or supervisors or other managers) could thus pull up a specific desired
Operations numbers are often duplicated to maintain consistency for tracking and controlling material movement
in the factory.
29 The following operation numbers comprise the "Plug" operation: 524, 1278, 2840, 5340, 5341, 5356,
5633, 5870,
5895, 5910, 5914, 6139, 6395, 6603, 7000, 7732, 7843, 7921, 5134, 5146, 4399
28
Page 73
configuration with a simple command, such as with a drop-down list box.
6.7.5
Additional System Improvements
Several other improvements hold tremendous potential for providing additional value and
functionality to the EMB system. Although not intended to be an exhaustive listing, several of these
improvements are discussed briefly below.
6.7.5.1 System Goaling
An appeal of systems
like EMBs is that they facilitate better communication by making
manufacturing system performance more transparent. Even better, they promise to act as a venue of
"breakthrough management,"
0
better enabling workers and managers to agree on objectives in real-time.
EMBs already have provisions for including goaling information (see sub columns 9-1 1 in Figure
26, above - Pace, FLGI, and Seg [Segment] Goal - under the "Current Operations" column in the
Operations View). However, the system pulls all of its goaling data from third sources, such as FRSB, or
manually generated spreadsheets. The problem with these sources is that they are often inaccurate, and
maintaining them is labor intensive. This could be made more effective by developing heuristics based
on WIP queues, tool run rates, etc., that could populate these fields with more accurate goaling
information.
6.7.5.2 Tool and Layer Qualifications
Process engineers, factory technicians, supervisors, and other managers often have difficulty
maintaining awareness of which tools are qualified for what layers and operations. Features could be
added to the EMB system that provide qualification status, such as when a user drills down on a piece of
equipment, from Workstream and the Recipe Correlation Table (RCT).
6.7.5.3 Litho Dedications
Workers, engineers, and other managers could also benefit from gaining better visibility into
which lots are dedicated for processing on what lithography tool (see lot-to-lens dedication discussed
above in Chapter 3, above). Capabilities could be included that provide this information for system users.
6.7.5.4 Priority Lot Advance Notification
As discussed in Chapter 3, shift Factory Improvement Teams (FIT) primarily act as factory
expediters for high priority WIP. An important reason for this is that no effective tools and procedures
exist that guarantee smooth processing of these lots in the factory. EMBs could help alleviate this
problem by incorporating information about incoming priority lots in its information displays, such as in
the "Feeders" section of the Operations View.
"Breakthrough management" was a term often employed by managers, especially senior managers, at Fab
D2.
The concept is that all participants - managers, workers, etc. - in the organization are aligned on the organizations
goals and the metrics. In addition, all participants understand, at any point in time, the organization's performance
towards those goals.
Page 74
6.7.5.5 Queue Time Limits
One final problem that EMBs could help factory workers better manage is the status of WIP in
areas impacted by Queue Time Limits (see Chapter 3). For instance, information could be incorporated in
the Operations View that helps workers maintain awareness of time remaining for WIP in those parts of
processes impacted by these constraints.
Page 75
This Page Intentionally Left Blank
Page 76
7
Engineering Decision Making with Statistical Process Control (SPC)
The second major thrust of this work was providing performance feedback information to a
second group of end users - Process Engineers. This chapter first introduces the basic idea behind
Statistical Process Control (SPC). Next it examines the issues faced by Fab D2 Process Engineers while
evaluating SPC information, including the inadequacy of tools available to these engineers. Following
this is a discussion of a simple concept that promises to help these engineers better cope with SPC
information.
7.1
SPC - A Brief Introduction
Shewhart first described SPC methods in 1931 (Devor, p. 10). The basic assumption behind SPC
is that all physical processes exhibit variation. In most cases, especially when appropriate sampling
techniques are utilized, this variation is Gaussian in nature. If a process is "in control," then process
variation is statistically predictable around a historical mean. On the other hand, if a process is "out of
control," the assumption is that something has changed in the system that causes statistically abnormal
system behavior (Devor, p. 119). " Given that a process is out of control, an engineer can then direct his
or her attention investigating and resolving whatever issue is causing the condition. An example SPC
chart (from Intel's proprietary SPC++ system) is displayed below in Figure 342
SPC methods have become ubiquitous in the semiconductor industry due to the necessity of
maintaining manufacturing processes within increasingly tight specifications. Fab D2 is no exception; the
factory maintains literally tens of thousands of SPC control charts in its automated SPC++ system.
7.2
Fab D2 Process Engineers - SPC Information Overload
Intel Corporation Process Engineers, and Fab D2 Process Engineers in particular, view
tremendous amounts of SPC++ information every day attempting to understand how their tools are
performing. The average Process Engineer, for example, maintains about 250 SPC charts. One extreme
example comes from a Fab D2 Lithography Process Engineer, who is responsible for over 700 charts.
The almost invariable result of reviewing such a vast amount of data is information overload;
engineers spend a significant amount of time on a daily basis gathering, assimilating, and making sense of
the data that is available so that they can understand what problems need their attention.
7.3
The Clockspeed of SPC Decision-Making
The difference in "clock speed" of the decision-making cycle between Process Engineers and
factory technicians is dramatic. Whereas this cycle is measured in minutes as production workers monitor
Well-known rules (often referred to as "Western Electric" rules) are often used as the basis for determining
whether a process exhibits behavior that is "out of control" with statistical significance (Spanos June 1992, p. 824).
32 The y-axis scale and control parameter statistics have been removed
from Figure 34 to disguise Intel proprietary
information.
Page 77
Setup Legend
XLabel
YScale
Symbols
Select
Zoom
510A.RESIST.THICKNESS
20-MAR-2002 11 08:30 to 01-OcT-2002 21:12 53
ALL MEASUREMENTS
EQP SVI 5,MON IL.510A.THICK
X-BAR
ATGSTROMS
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Pt
=
zone 1
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Sigma:
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min.
49 46 43 40 37 34 3128 25 22191613 10 7
4
1
Point is In Control
Close
Add/View
Commnt
View
chart Limits
View
Data
View
Decision
Fignre 314 - An Example SPC++ Chart
individual lots and tool states, the cycle for Process Engineers is best gauged in hours for the role that
they play in supporting factory tool health. Despite this, the problems faced by these two in gathering
information are surprisingly similar.
As we discovered in the previous chapter, a problem that technicians face in making decisions is
the speed with which they can obtain the information required to make those decisions. In the status quo,
the process of "sense making" - gathering of information in the evaluation stages of the Action Cycle takes minutes, the same periodicity of the work itself that must be performed. This impairs worker
productivity; almost as much work is done gleaning information from the system as actual productive
work is performed. At least part of the solution is providing workers better information with less time
latency, advantages that systems such as EMBs provide.
Fab D2 Process Engineers face a similar dilemma. Although the work that they perform is much
more deliberate and analytically intensive, these engineers, like their factory counterparts, spend a great
deal of time organizing information so that they can better understand what problems they need to focus
Page 78
on and what actions they need to take next. Specifically, they spend tremendous time and energy
maintaining awareness of tool health and diagnosing problems using SPC methods.
7.4
Inadequate Tools
An important reason why engineers spend such a large amount of time perusing SPC information
is that the tools that they use to track and process this information are inadequate. Three such tools are
briefly discussed below - Quickview, email and pager notifications, and SPCView2.
7.4.1
Quickview
Quickview is a function that allows a user to scroll through pre-configured lists of SPC charts.
Under ideal conditions, this allows engineers to reduce the time that they spend reviewing SPC
information by up to 90%.
Although Quickview is an extremely useful tool, it has serious limitations. First, it is limited to
helping engineers efficiently view perhaps 50 charts at a time. Since Quickview allows a user to only
scroll backwards or forwards through a fixed chart sequence, piecing together clues from various charts
when a tool or process exhibits problems is a laborious and time-consuming process. Quickview is thus
most useful when tools and process parameters are operating normally, within expected parameters.
Similarly., scrolling to compare performance parameters across tools is difficult. As a result, whenever
they encounter a potential problem or need to analyze the data more in depth, engineers often bypass
Quickview entirely, capturing screen shots and printing Word or Power Point documents containing the
charts that require additional attention.
From the discussion in chapters above, we understand why engineers circumvent the system.
Scrolling from screen to screen relies on memory, which constrains the efficient operation of perceptual
processes. Instinctively, Process Engineers understand that in order to make sense of the data that they
are confronted with, they need to view it simultaneously.
A final problem with Quickview is that engineers often get a form of "highway hypnosis" as they
scroll through a number of charts. As a result, an engineer may miss important trends or indications that
indicate that a tool or process requires his or her attention.
7.4.2
Email and Pager Notifications
Another method available to Process Engineers is email and pager notification of SPC rule
violations. However, a problem occurs when Process Engineers need to sift through a large volume of
these messages on a daily basis. The problem faced by engineers when this occurs is two-fold. First,
engineers must still spend time looking up and making sense of the problematic parameters. Second, and
perhaps more importantly, these notifications do not give an engineer a sense of the priority in which
problems should be attacked.
Page 79
7.4.3
SPCView2
A final tool available to engineers for analyzing SPC data is SPCView2, which is particularly
useful for evaluating and comparing long-term tool performance (a process termed "tool matching"),
including tool matching across the Intel Virtual Factory.3 3 Although the SPCView2 system performs this
particular function very well, it does relatively little for helping Process Engineers understand problems
on a real-time basis - the median refresh rate of the SPCView2 database for a tool set is approximately 48
hours. In many cases, the data refresh rate is one week or longer. Thus, for decisions that engineers need
to make on a daily, shiftly, or even hourly basis, this system is of little use to engineers.
7.5
Productivity Impacts
Since Process Engineers have many other responsibilities besides reviewing SPC information,
and since tools available to make this process more manageable are insufficient, they often cope with this
problem by
limiting the
number of SPC charts that they review. The lithography engineer mentioned
previously, for instance, limits his daily reviews to about 50 critical performance parameters for each of
the four stepper/track combinations for which he is responsible, which takes him roughly an hour and a
half each day. Once every two weeks or so, lie reviews all of the charts for which lie is responsible, each
sitting taking him about five hours.
Many problems exist with this approach. First, despite explicitly reducing their workloads,
engineers still spend a great deal of time reviewing essential tool performance parameters. Assuming that
an engineer spends, on average, one hour each day reviewing critical SPC performance parameters, and
three hours every other week reviewing all of his or her charts, then at a fully burdened cost of $60 an
hour for each engineer's time, the cost to the company of each Process Engineer reviewing SPC charts is
roughly $1 8,000 over the course of a year. Since an average factory has about 60 Process Engineers, the
cost to each fab for performing this function is roughly $1
million. Making this process more efficient by
even ten or twenty percent would translate into immediate savings for the company of hundreds of
thousands of dollars. Perhaps more importantly, these engineers would be freed to concentrate time to
more value-added activities - productivity improvement projects, training technicians in their areas of
responsibility, and developing solutions to the corporation's leading-edge processes.
A second problem with the status quo is that process engineers sometimes miss indications that
would allow themn to prevent or mitigate the effects of factory excursions. The costs of this are more
difficult to quantify, but could easily run on the order of hundreds of thousands of dollars; each
lot of 25
logic wafers lost in an excursion represents approximately $600,000 in revenue to Intel Corporation, and
excursions, although not frequent, do occur periodically, impacting both line and die yield.
3
Every Intel fab's SPC++ system funnels information into a corporate-wide SPCView2 database.
Page 80
A final problem with the current state is that review of SPC information is largely a sustaining
function. As before, such as in the case of EMBs, if the process of dealing with this information could be
made easier and more intuitive, opportunities exist to push responsibilities for monitoring SPC charts
down to the lowest competent level of responsibility, technicians on the factory floor.
7.6
Process Engineers' Rapid Action Tool (PERAT)
The concept developed in the course of this work is providing a simple "bingo board" that
provides an intuitive, "snapshot at a glance" of SPC parameters for various tools and/or processes.
In
keeping with Intel Corporation's insatiable appetite for acronyms, the proposal was termed PERAT
(pronounced "parrot"), for Process Engineers' Rapid Action Tool.
A simplified representation of PERAT is presented below in Figure 35. Other information is
being considered for additional display, but this illustration captures the essence of desired system
capability. In this illustration, the window in focus (DSMP) displays various focus adjust SPC parameters
(the column headers - Focus, Focus - A, etc.) for various lithography tools (NSJ 21, NSJ 22) in table
format, with summary indicators for each tool/parameter combination. A green indicator (for instance, all
of NSJ 21 's parameters in the DSMP 36 window) signifies that a tool is operating normally or "in control"
- within process specifications and statistical control limits. Red indicators (such as NSX 01 - Focus), on
the other hand, alert the user to problematic parameters - these parameters are "out of control" - violating
process specifications or statistical control limits. Finally, a yellow indicator suggests that a user
investigate that parameter further (NSJ 26 - Y-Tilt). Thus, although a parameter may not explicitly
violate a Western Electric rule or be out of spec, the yellow indicator flags that a trend or other pattern in
the parameter's behavior that warrants further review by the responsible engineer, potentially heading off
a problem in the process.
Windows stacked behind the DSMP interface imply that PERAT could have a wide variety of
configurations. Thus, the tool could be used to analyze and compare process parameters across tools
(DSMP), within a specific tool (NSX 03), or even across tools and functional areas (Poly Loop).
A final system feature of note is that users can quickly "drill down" and obtain SPC charts for
specific process parameters. This last ability is not trivial; using the current SPC++ system to navigate to
specific charts is cumbersome, taking a surprising amount of time - approximately 60 to 90 seconds for
each new chart displayed.
Factory MTs already participate, albeit in a limited fashion, in reviewing SPC information. Specifically, a new
designation, MTP, or Manufacturing Technician - Process, has been created to recognize the fact that some highly
capable technicians can assist Process Engineers in performing functions such as troubleshooting process problems.
3
PERAT system design was the result of approximately eight weeks' brainstorming, in conjunction with various
Shift Supervisors, Process Engineers, Statisticians, and MTPs at Fab D2.
36 DSMP stands for Dynamic Self-Measurement Program. DSMP is a monitor that a lithography tool performs
using its own optics for various parameter measurements.
3
Page 81
POLY LOOP
NSX03
NSX02
NSXO1.
NSJ22
NSJ21
DSMP
~($t~
4:
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'V
NSJ 21
21
NSJ 22
p
NSJ 23
NSJ 24
NSJ 26
NSJ 28
NSX 01
ON2
J
21
2121
2121
21
NSX 02
Fi ure M;
7.7
- The PER AT Cancept
PERAT Extensions - Multivariate SPC
Although PERAT in its present conceived form would bring value to Fab D2 process engineers, a
useful extension might be incorporating multivariate control methods. A problem with the current
configuration is the possibility of being overwhelmed by false alarms. For instance, ifp is the probability
of falling outside the 3a control limits of an SPC chart, given that the process is in control, then the
probability ofp occurring is approximately 0.27%. Since the process really is in control, but the last
control point fell outside the control limits for the process causing concern that the process is no longer in
control, a false alarm has been generated. The probability of a false alarm not being generated on the next
process run, on the other hand, is ]-p, or 99.73%. Finally, a false alarm for this process would be
generated, on average, once every /p, or approximately once every 370 process runs. Depending on the
process, an engineer might consider this an acceptable rate of generation for false alarms.
Page 82
7.7.1
Quantifying False Alarm Risk for Tools with Multiple Parameters
Taking this one step further, assuming n parameters for a process tool, that every parameter is
independently and normally distributed, and that every parameter is in control, then the probability of a
false alarm occurring on the next run is:
Pr(false alarm) =1 - (1 - p)"
If a tool has 20 parameters, then the probability of a false alarm occurring is 5.26%, and the
process generates a false alarm on average every 19 runs. Similarly, if a tool has 50 parameters, then the
probability of a false alarm is 12.64%, and a false alarm is expected every 8 runs. Table 8, below,
summarizes the probability of a false alarm on the next process run and the average run length (ARL)
until the next false alarm.
n
5
10
15
20
25
50
Pr (false alarm) ARL
1.34%
74
2.67%
37
3.97%
25
5.26%
19
6.54%
15
12.64%
8
Table 8 - Probabilities of False Alarms
and ARLs for Various n
Clearly, multiple tool control parameters pose problems for engineers when one understands the
burdens posed by false alarms. For a tool with 20 parameters - not unreasonable for many complex
modern processing tools - an engineer can expect to chase down a false alarm once every 19 hours of
operation given that the tool processes one lot of wafers in an hour. For a tool with 50 parameters common for many state of the art lithography tools - an engineer can expect to investigate a false alarm
once every 8 hours of operation, again given that the tool processes one lot of wafers in an hour. Given
that engineers often have several dozen tools that they are responsible for, he or she can expect to be
distracted by several false alarms on a daily basis, which detracts from their ability to concentrate on other
responsibilities, especially resolving problems that do impact yield and productivity in the factory.
7.7.2
Multivariate Solutions to the False Alarm Problem
A solution that offers relief to process engineers in dealing with the false alarm problem is using
statistical methods that take multiple variables as inputs - for instance, a tool's control parameters - and
returns a single output that reflects the likelihood that a tool as a whole is still in statistical control.
Specifically, Hotelling T2 Statistic can be used in deriving a unified "score" for a tool's parameters. Even
better, this method can combine several parameters that may be cross-correlated. Finally, a single
Ilotelling T statistic could be used to help further relieve process engineers' daily routine of perusing
2
scores of control charts by wrapping all this information into a single PERAT indicator.
Page 83
The following equations outline this multivariate method: 37
With p parameters, and each vector representing a set of observations, we estimate the tool's
process mean and covariance with a sample of m preliminary runs as follows:
Estimate of the process mean:
x
xi=
1
Estimate of the process covariance:
[u
S =
Thatis,
Hotelling's T 2 statistic is given by:
T 2 = n(, -
)
-
-
F, ,-_i,_,a
where:
n
is the sample size
T2
is the summary statistic
is the vector of parameter observations
is the vector of parameter means, and
S
is the variance-covariance matrix.
In addition, the statistic is described by an F-distribution with p degrees of freedom in the
numerator and mn - i - p +
1 degrees of freedom in the denominator.
The Upper Control Limit (UCL) of the statistic is:
U =p(mn + 1)(n - 1)
mn - m - p + I
where:
a is the probability of Type I error - the chance that a false alarm occurs when the
processing tool is, in fact, in control.
37
All equations taken from Spanos November 1992, p. 312 and from Boning, pp. 6-7.
Page 84
The variance-covariance matrix S is the following.
F
FA
... SIP
2
S
2
P
The variances and covariances are estimated by the following:
With:
n samples,
i= 1,2,..., n
p tool parameters,
j= 1,2,..., p
i preliminary runs,
k=
1,2,. .. , n-
The mean for each sample is given by:
1"
n=1
The variance for each sample is likewise given by:
ZX/k
a=
S/k =-
A-
xk)
And the covariance terms between parameters
Sk
Z(x,k
n -
-
X
j and h in the k"h run Is:
)(x,/k
xk - Xhk),
I=
where J # h and k = 1,2,...,
mi
Finally averaging over all the m runs, we obtain the terms of interest:
1,2,..., p
where j
k=1
Mk=I
wherej= 1,2,..., p
s
2
where j
h
k=1
The implication of utilizing such statistical methods is further relieving process engineers' daily
burden of control chart review. By consolidating information into a single statistically coherent indicator,
Page 85
engineers can focus on just a few indicators that provide information about a tools' overall health. Then,
if they are curious, engineers can drill down to obtain details about specific process parameters.
Importantly, this method is not limited to just tools - for instance, it could also be applied to subgroups of
tool parameters, such as lithography tool performance for specific mask layers or focus adjustments. Or,
the methods could be applied to the performance of various tools across a range of process steps.
7.8
PERAT Advantages
The first two ways that PERAT promises to improve Process Engineers' productivity is by
reducing the number of individual SPC charts that engineers need to review on a daily basis, and by
trimming the amount of time that it takes them to navigate to and access specific charts of interest.
PERAT does this by giving them a highly intuitive and visual summary representation of the charts for
which they are responsible, and by giving them a responsive and user-friendly interface.
A key idea behind PERAT is that Process Engineers often do not need to know the specific
behavior of all data points in their SPC charts. Rather, they need an overall understanding of patterns of
behavior in these charts, with the ability to drill down and obtain more specific information on demand.
Currently however, Process Engineers do find themselves reviewing all of the data for all of their charts,
looking at each chart, chart by chart, simply because there is no way them to obtain this information in
summary. This includes data about rule violations; although Intel's SPC++ system calculates rule
violations automatically for engineers, it only does this when a system user pulls up a specific chart for
viewing.
In addition to understanding behavior patterns of specific charts, PERAT allows engineers to
diagnose patterns of behavior across charts. In Figure 35, for instance, knowing that two closely related
tools, NSJ 22 and NSJ 23 are out of control for the Focus-A parameter may allow an engineer to more
quickly diagnose actions that need to be taken to correct the underlying systemic problem. Similarly,
understanding that both Focus and Y-Tilt parameters are out of control for tool NSX 01 may also lead to
quicker and more efficient resolution of this issue.
Another advantage of the visual representations afforded by PERAT is that it allows system users
to better prioritize their actions. As mentioned before with Quickview and email/pager notifications, the
engineer has to sift through the data when multiple problems exist, then make appropriate
judgments.
However, with a tool such as PERAT, problem discovery and prioritization can happen simultaneously,
without extra time-consuming effort.
A final benefit of PERAT is that it enables more efficient communication with others. An
engineer, for instance, can use the displays to explain actions and priorities to others, such as other
engineers and engineering managers. Engineers are also excited about using the system to communicate
across functional areas. SWAT teams, for example, are special, highly focused, cross-functional teams
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that Fab D2 employs to solve time-critical problems in the fab, especially factory excursions. Engineers
see PERAT helping them collaborate to solve complex issues when these teams form. For instance,
although these engineers may not be entirely familiar with the physics of the various other engineers'
process areas, every engineer is at least familiar with statistical troubleshooting methods. By making
process parameters and relationships between parameters immediately lucid and apparent. engineers are
better able to communicate and collaborate in the problem solving process (Mark, p. 6).
In sum, PERAT, like EMBs, by providing a highly explicit, visual representation of underlying
data, relieves the burden on memory while simultaneously engaging powerful perceptual problem solving
abilities. This enables users to better focus on the data presented and the underlying issues, rather than
the process of gathering, assimilating, and ultimately interpreting that information.
7.9
Implementation Issues
Although much work has been done for PERAT, much work remains for system implementation.
To date, PERAT remains a concept, with few concrete results. Still, a crucial outcome from this work
was obtaining "buy-in" for the ideas outlined above. Specifically, the manager and lead developer of
Intel-wide SPC systems incorporated PERAT system requirements developed at Fab D2 for incorporation
into next-generation SPC system due out in late 2004 or early 2005. Developers are unable to incorporate
these ideas in current SPC systems because of several technical considerations briefly discussed below.
In addition to this key commitment, a dialogue has begun between stakeholders in the
development of the PERAT system - Intel statisticians, Process Engineers, and automation system
developers. Their input will be crucial in ensuring that any system that is ultimately developed will be
widely applicable, easy to use, and provides the functionality that users need to better accomplish their
responsibilities. In the shorter term, Fab D2 automation and process engineers are working together to
develop tools that will relieve some of Process Engineers' burden in the daily review of SPC information.
7.9.1
Technical Considerations
Many technical hurdles remain for PERAT system implementation. One major issue, as before
with EMBs, is that Intel's automated SPC systems have evolved over the years with few fundamental
changes to system functionality and architecture. As a result, underlying data structures require
significant revision to support timely SPC data access. This is also an important reason why progress has
been slow in translating the ideas behind PERAT into action at Fab D2 - raw data from the SPC database
is in compressed, encoded format. Intel CAS"8 , fearing shop floor repercussions that individual fab
developers could have on SPC systems, such as SPC errors and slowing of SPC data inputs, has retained
31
CAS - Component Automation Systems. CAS is an Intel-wide group that develops automated systems for Intel's
manufacturing facilities.
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tight control of the keys to this encoded data. While understandable, this has hindered fabs' ability to
develop tools that could make it easier to use SPC data.
Another significant technical hurdle that must be overcome is developing statistical methods to
deal with non-Normal charts. Only about 75% of semiconductor manufacturing processes, including
those at Fab D2, are Gaussian in nature; others may be approximated by Poisson processes or consist of
small data sets:
7.9.2
Concerns About System Over Reliance
One final concern with the PERAT system is that engineering managers, and even many
engineers themselves, recognize the dangers of becoming too reliant on a system that makes many
summary decisions for them on a regular basis. Although engineers see the value that PERAT will bring
them, they still see the value of occasionally reviewing, at least through the medium term, all of their
discrete charts, performing this function perhaps once every two weeks.
3
Conversations with Intel Statisticians, October-December 2002.
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8
Themes Common to Visual Decision Aids
This chapter summarizes key themes that occur consistently in effective visual information
systems such as EMBs and PERAT. Although not a comprehensive list, it does encapsulate the main
ideas at work behind these systems. First, we visit traditional principles of good system design visibility, good conceptual model, good mappings, and effective feedback, demonstrating how EMBs and
PERAT fulfill these criteria as we progress. In addition, we develop two more ideas - information hiding
and configurability - that contribute to success of information systems in the work place.
8.1
Principles of Design
Norman outlines several criteria for effective system design. These are, in fact, general to
all
design efforts, and are not specific to the development of information systems. These principles are
(Norman, pp. 52-53):
-
Visibility - by looking, the user can tell the state of the device and the alternatives for action
-
A good conceptual model - the designer provides a good conceptual model for the user, with
consistency in the presentation of operations and results and a coherent, consistent system image.
-
Good mappings - it is possible to determine the relationships between actions and results,
between controls and their effects, and between the system state and what is visible.
-
Feedback - the user receives full and continuous feedback about the results of actions.
We next visit each of these concepts in turn, delving a bit deeper into the characteristics that make
for effective information systems.
8.1.1
Visibility
A key idea behind system visibility is that effective systems provide a "snapshot-at-a-glance" of
system performance. Specifically, indicators display information in such a way that provide users with
awareness of overall system health, enabling effective decision-making. In addition to providing an
understanding of overall system performance, however, the system must also allow investigation of
detailed information about system elements on demand. We investigate this idea, also known as
information hiding, in more depth below.
A second key idea here follows from the first - namely, good information systems do not attempt
to make decisions for the user. Rather, they focus on providing information that facilitates user decisionmaking (Rogers, p. 1265).
Tying these ideas together, systems that provide an effective picture of system performance and
enable decision-making must provide all information on a single display, within the scope of the user's
eye span. As mentioned previously, the reason for this derives from limitations imposed by short-term
recall. In order to fully engage perceptual capabilities, the burden on memory must be minimized,
allowing the user to focus on the task at hand: exploring and gleaning meaning from the information
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presented, inferring underlying patterns, and pondering courses of action. Thus, careful consideration
must be given to how information is displayed, and what information can safely be ignored or left out
completely.
Although EMBs and PERAT do not attempt to provide indications of entire manufacturing
system performance, they do provide this for entire sub-systems as configured by the end user. (The final
chapter revisits the idea of providing overall manufacturing system performance indications.)
Significantly, both systems meet the requirements outlined above for visibility. EMBs provide
information about overall WIP and tool performance, while PERAT provides information about tool
health, for factory subsystems. In addition, both present information, rather than suggest alternatives for
action, in a single display.
8.1.2
A Good Conceptual Model
A good conceptual model means that the displayed system representation must be intuitively
understandable by the system user. Put another way, this depiction should correspond with the end user's
mental image of system behavior (Elvins, p. 67). Implicit in this is that the information tool has a clear
purpose. In other words, it does not attempt to be all things to all possible sets of users, possibly diluting
system usefulness and complicating usability.
Although EMBs and PERAT provide decent system representations, simply by sum marizing!
information for the end user, ways exist that would make these systems even more powerful. As
discussed earlier, for example, the EMB Equipment View's basic representation of system tool behavior
could be improved by geographically charting tool layout to correspond with actual equipment locations.
8.1.3
Good Mappings
An important aspect of good mapping is how easily a user gleans meaning from the visual
display. For EMBs and PERAT, good mappings manifest themselves as indications that provide intuitive
understanding of real-life events. Both systems, for instance, feature large indicators with colors that
intuitively match the way that we think about the world. Red designates an alarm or warning condition aii out of control or out of specification parameter for PERAT, or all Unscheduled Down for EMBs.
Green signifies a normal, desirable condition - Running for EMBs, or in control and within specification
for PERAT. Yellow signals a cautionary condition, one that may signifies a change for worse in system
behavior, or perhaps not, but one that warrants further investigation. Unusual but easy to remember and
distinguish colors in the EMB system, such as pink for Scheduled Down and Orange for Idle, signify
conditions that require other action on part of the system user. Finally, operating both EMBs and PERAT
is exceedingly easy - drilling down to obtain more information on a specific aspect of system
performance is intuitive, requiring only a click of a mouse.
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8.1.4
A Simple Litmus Test for Usability
Although all of the principles of design are interrelated, the principles of good mappings and a
good conceptual model are especially so, since both concepts focus on how the user relates to and
interacts with the information system. In other words, both have enormous impacts on tool usability.
A simple litmus test of whether or not an information tool effectively maps and models system
behavior is the "non expert" experiment. If a user, with no prior introduction to the tool, can grasp all or
most aspects of its operations and meanings with a minimum of explanation and training - perhaps no
more than five minutes' worth - then it passes this test. Fortunately this is the case with EMBs, and it is
envisioned that this will be the case with PERAT when fully developed.
8.1.5
Feedback
The final principle of design is feedback. In this context, this means that the information tool
provides uninterrupted, accurate, and fast responses to changes in system conditions. If a tool records an
out of parameter condition or if an MT loads a lot on a tool, then PERAT and EMB would respectively
indicate the change in system behavior soon after the action occurs.
A crucial factor, therefore, for feedback to remain relevant, is minimal time latency in the
information presented. Although faster is always better, as an upper bound the cycle time of feedback
must not exceed the cycle time of the decision making process. In many circumstances, this may even be
too slow, since decision makers almost always prefer information that reflects the current state of the
system as close to real-time as possible. Otherwise, a user may delay making a decision until the next
information update, leading to waste and sub-optimal system performance.
One final aspect that lends itself to relevant, useful feedback is automatic refresh of system data.
Although this may seem obvious, this is not always achieved - a consistent complaint by MTs about
MTJl for instance, is that the system does not automatically refresh itself. To obtain the latest
information on a tool, workers must manually refresh then wait as MTUI displays repopulate with current
information, a process that takes 10 to 20 seconds, depending on system loading.
EMBs do remarkably well on both counts, automatically updating information displays every 15
to 30 seconds. Although decisions based on SPC data are usually not so severely time constrained,
PERAT, too, is also envisioned having a relatively fast cycle time for information updates. Specifications
for this tool call for automatic updates no more than every 15 minutes.
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Checking validity
~of
data
r
World
and model
DaaPicture
"'-
..
User
Intrpreation, comiprehension, insights
Figure 36 - Overview of the Visualization Process, Adapted from Domik, p. 17
8.2
Information Hiding
Information hiding
is another crucial feature found in effective information tools (Baldwin, p.
73). Users often do not want or need to view the large amount of information that underlies a particular
performance indication. In fact, displaying too much information on a display may be counter-productive
as users "lose the forest for the trees." In other words, an overwhelming abundance of information can
mask underlying patterns that would otherwise be suggested by system indicators. Both EMBs and
PERAT incorporate information hiding by providing just that information that users need for aggregate
exploration and understanding of system behavior. What is more, a great deal of detail is already existent
in these displays - they can be used simultaneously as both wide band and perceiver controllable channels
(Tufte 1990., p. 3 I). In addition, if a user needs more insight, then both tools allow deeper probing to gain
a more detailed comprehension of specific issues. With PERAT, for instance, users can pull up specific
SPC charts on demand. Likewise, with EMBs, users can pull up specific alarm, lot, or tool state
information.
8.3
Configurability
A final issue crucial for an effective information tool is system configurability. In short, they
must allow the end user to easily control and change information displays, within the bounds of system
capabilities. The reason for this flexibility is rooted system maintainability. A user must be able to
quickly change what is presented to match with his or her current responsibilities and conditions on the
shop floor. Otherwise, a user may give up using the system, since it is unresponsive to their changing
needs. This was a significant problem with IMBs, an EMB precursor mentioned briefly in Chapter 6.
The process for updating this system's displays required Automation personnel intervention, which
required too much time and effort on the part of all involved to enact desired changes.
In this context, information hiding is not meant in the "traditional" Computer Science sense. In that field of study,
information hiding refers to the suppression of external visibility and access to an object's internal variables. In this
work, the system user desires visibility of the details of internal states upon demand.
4
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8.4
Summary
Figure 36 above summarizes several key themes from this chapter. Starting from the left, a good
visual information tool pulls data in conformance with an accurate model of the world (system under
consideration), mapping that view into an intuitive, easy to understand display that provides visibility into
overall system behavior. As the user interacts with that display, exploring and gleaning meaning from the
data, lie or she gains insight into the actual state of the world while simultaneously checking the accuracy
and usefulness of the assumed model. Interaction also implies that a user is able to configure the display,
as necessary, as well as drill deeper or hide information. User actions, in turn, affect the state of the
world, which manifest themselves as feedback.
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Strategic, Political, and Cultural Perspectives on the Change Process
9
This chapter delves into the strategic, political, and cultural aspects of making change at Fab D2.
As such, it has two important features that distinguish it from the chapters that precede and follow it.
First, it shifts from third person tense, in which the analytic remainder of the thesis is written, to largely
first person, as the author reflects on his personal experiences enacting change at the factory. Second,
recognizing that some will prefer to readjust this portion of the thesis for an understanding of the
organizational dynamics at play during the course of the work, it repeats key information found in
preceding sections so that it can be read stand-alone.
9.1
Introduction and Overview
Information is the life-blood of any manufacturing organization. How effectively an organization
collects data that measure its operational effectiveness in regards to quality, productivity, safety, and other
metrics, and how quickly and correctly it acts using that information is crucial to its success. This is
especially true in the highly dynamic semiconductor industry, where the ability to measure and adjust
one's performance, correct problems, and respond to changing market conditions is essential to remaining
competitive.
This section examines my LFM internship change management experience, in which I led an
effort at Intel's Fab D2 to provide end users with relevant, real-time performance indications. Although
the scope of the project included both Manufacturing Technicians (MTs) 4", and Process Engineers, in this
portion I write primarily about implementing a system, Electronic Monitor Boards, aimed primarily at the
former constituency. I do this because this experience, as an exercise in leadership, was the more
challenging of the two, lasted the entire duration of the project (continuing today at the factory), and also
yielded the greatest results. After a brief introduction to the Sloan Leadership Model and Fab D2, I begin
this discussion with my initial process of Sensemaking at the factory, since it was then that I radically
changed the direction of my project.
9.2
The Sloan Leadership Model
Before beginning discussion of the actual change effort, it is useful to briefly discuss the Sloan
Leadership Model, a framework for thinking about enacting change that I refer to frequently over the
course of the chapter (Ancona, p. 2).
Figure 37, below, illustrates the concept behind the Sloan Leadership Model, which is composed
of four elements: Sensemaking, Relating, Visioning, and Inventing. Summary definitions for these four
terms are:
-
Sensemaking: triangulating a wide variety of data about organizations and stakeholders, actively
surfacing others' views, and creating a map of what is happening in the group or organization.
41
A Manufacturing Technician is a worker that processes semiconductor material on the factory floor.
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Visioning
Relating
Sensemaking
Inventing
Figure 37 - The Sloan Leadership Model, Adapted from Ancona, p.
-
1
Relating: Listening to others, encouraging expressions of diverse viewpoints, advocating own
point of view to others, valuing and developing others, and building networks of collaborative
relationships with others.
-
Visioning: Creating compelling vision for others, building follower support, and showing the way
through expressing passion and modeling behaviors that support the future vision.
-
Inventing: Inventing new modes of work, encouraging experimentation and risk, coordinating
change processes, monitoring results, and creating an atmosphere that helps others to produce.
This model describes change processes at the interplay of these four elements, sometimes
happening in sequence, but more often several, even all, of the processes occur simultaneously.
9.3
Fab D2 4 2
Intel's Fab D2 (see Figure 3 in Chapter 2) is located in Santa Clara, CA - the heart of Silicon
Valley. As a dual-purpose production and Technology Development (TD) factory, it plays a unique role
at Intel, being intimately involved in over 90% of Intel's businesses. This includes the two divisions that
generate over 95% of Intel's revenue - the Wireless Communications Group and the Intel Architecture
Group.
As a production facility, Fab D2 is responsible for process improvement, including process
shrinks4 , as well as producing boutique 44 material. As a technology development center, the factory is
responsible for dozens of new product introductions each year, as well as improving manufacturability of
immature production processes developed at Intel research labs. In other words, the factory is responsible
for turning low yield, slow throughput time processes into high yield, fast throughput time processes.
The interested reader that has not yet done so is invited to read Chapter 2 for a much more in depth description of
Fab D2.
43 A process shrink occurs when the dimensions of an existing product or products are reduced. This increases
productivity, since more die now fit on the same-sized wafers. In addition, process shrinks are also often
accompanied by increases in product performance - specifically, device speed.
44 Boutique material is subjected to the most stringent quality measures. This extra attention in the manufacturing
process produces devices that are at the leading edge of speed and performance for Intel's product lines.
42
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After this occurs, it is further responsible for transferring processes exactly (Intel's famous CE! or Copy
Exactly! policy) to Intel's High-Volume Manufacturing (HVM) sites. Finally, the fab is also charged
with performing much basic process research in its own right, such as experimental next generation
memory technologies, and the 884 "system on a chip" process, which was the original focus of my LFM
internship.
9.4
The Initial Process of Sensemaking and Discovery
The initial process of sensemaking and discovery was crucial to the project, for it was in this
phase that the project radically altered course, influencing not only the technical aspects of semiconductor
manufacturing that I would analyze, but also my relationship with several players that would later become
key to the success or failure of the project.
In this initial process of discovery, which covered my first few weeks at Fab D2, I accommodated
myself to Intel's unique, fast-paced culture. This included learning what essentially for me was a foreign
language, the dizzying array of terms and acronyms Intel has developed that define its manufacturing and
people processes. In addition, since my original charter was devising strategies to improve throughput
time for Intel's new 884 process, I struggled to learn the basics of silicon manufacturing.
9.5
The Project Scope Begins to Change
Although my internship was originally fairly well defined, after I arrived on site I quickly started
uncovering clues suggesting that I could contribute more to the organization in other ways. There were
two primary reasons for this. The first was that 884, although still in a relatively immature form, was
already well underway in the process of process improvement. On the second and third floors of the
building where I worked, the Robert Noyce Building (RNB), resided literally scores of process engineers
with PhDs from "brand name" universities such as MIT, Stanford, and Berkeley. Several dozen of these
engineers, each with years of semiconductor technology process experience, were already working on
improving 884.
What was more, the types of things that I was being asked to evaluate were well
known, proven techniques that Intel uses in improving its production processes. I did not believe that I
could bring much value to the organization with my internship as it was originally defined, other than
perhaps documenting this improvement process.
The second reason why I had misgivings about my original internship proposal was based on
what I perceived as a serious flaw in the way information was handled and decisions made at Fab D2.
Since I was assigned to the factory staff, I was trained in factory procedures 46 and thus had access to the
In contrast, my previous work experience had been as a U.S. Navy officer, and I had very little theoretical or
practical grounding in even basic semiconductor manufacturing processes.
4 Semiconductor manufacturing environments can be extremely dangerous, and the manufacturing processes are
exceedingly intolerant of contamination. Thus, each factory employee at Fab D2, before gaining unrestricted
factory access, must undergo a week of indoctrination in safety and cleanliness procedures.
4
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factory's clean rooms, where virtually all semiconductor production processing occurs. In addition, since
I was an intern, I could attend nearly any factory meeting (formal and informal meetings are the prinary
means of communication at Intel), except those reserved for senior factory staff.
Almost immediately after gaining access to the factory floor, since I was able to traverse freely
between both "worlds" (the world of the factory floor and the world where the "carpet dwellers"
-
managers and engineers - worked), and since I had a fresh perspective with few preconceived notions
about semiconductor manufacturing, I became perplexed by the disparity in information provided to the
factory floor and the information available to the engineers and managers in the cubicles and meeting
rooms outside the factory in the adjacent RNB building.
9.6
Incomprehensible Factory Flow
7
On the factory floor, the process for me was incomprehensible. Very few indications of factory
performance were apparent, such as how well WIP was flowing through the factory, where WIP was
located, how tools were performing, or how well the factory as a whole was functioning. Although my
confusion might have been understandable for a newcomer to any manufacturing environment, the
problem was that, except for their very narrow areas of responsibility, the process was also impenetrable
for even the most experienced factory technicians.
The only place where I could make sense of how the factory was performing was outside the
factory. Here engineers and managers perused numerous web-based reports and attended a seemingly
never-ending array of meetings, investing huge amounts of time, effort, and energy every day (which to
me seemed hugely wasteful) just regaining awareness of how the factory was performing, much less
towards what set of issues they should direct their attention.
9.7
Lack of Feedback as an Impediment Continuous Improvement Efforts
Sequestering information in the meeting rooms and cubicle spaces led to what I perceived were
two problems. First, feedback to the factory was time-late. Since most communication with the shop
floor was through conversation, such as supervisors making announcements to workers in "stand ups"
that occur at the beginning of each shift, feedback was usually slow reaching the technicians. As a
consequence, these workers often had difficulty understanding how they could improve their
performance. In a best-case scenario, feedback would take several hours getting back to technicians.
More commonly, it would be shifts, days, or even weeks time-late. By then, however, any message was
usually lost in the noise of the factory's shifted priorities.
A second problem with sequestering information outside the factory lies in the inherent
complexity of the manufacturing process. Semiconductor manufacturing's highly reentrant nature,
Chapters 3 and 4 provides a more in depth discussion of the challenges of complexity faced by Fab D2 employees,
and the mechanisms that they have devised to cope with what could otherwise rapidly become a chaotic situation.
47
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compounded with the large number of processes at Fab D2,48 not to mention the numerous exceptions and
experiments occurring in the factory, foils even the most astute supervisors' and managers' attempts to
understand the factory's problems, except perhaps at best in outline. Since the majority of the factory
workforce (600 employees out a total of roughly 1000) is involved in direct production on the factory
floor, it seemed to make sense to find ways to more fully involve and engage these workers in the
decision-making process. This is especially clear when one realizes the high caliber of the factory's
employees. To even be considered for an entry-level production position at the facility, for instance, a
person must have either a technical Associate's degree or significant military experience in a technical
field. In addition, many employees had a great deal of experience in the semiconductor industry. It was
quite common to meet workers with 10 or 15 years' experience, and more than a few had 20 or even 25
years under their belts.
9.8
Information Challenges on the Factory Floor
Theoretically every employee, including those that work on the factory floor, could access much
of the same information (in the form of web-based reports) as engineers and managers. However, in
practice, these workers, who are pressed to make the best use of their most precious resource - time limit their information intake to those systems that are easiest to use and provide the most information
about what they need to perform their jobs now. "Easy to access" web reports do little for them in this
regard, for several reasons. In the first place, making use of this information is difficult; a large number
of reports must usually be collated, read, synthesized, and understood, which takes considerable time
from their primary duties of attending equipment and processing WIP.
In addition, these reports all have
varying degrees of time-latency, from fifteen minutes to the length of a shift (12 hours). Since these
reports are largely historical in nature, they are most useful for explaining past events, and not for
understanding current factory conditions.
Although factory technicians lack systems that communicate meaningful information about
aggregate aspects of factory performance, they do use one extremely useful source as their primary means
for gathering information - station controllers' MTUI (Manufacturing Technician User Interface)
interfaces. However, these devices only give a sense of what is occurring for a particular piece of
equipment - that tool's state, and the WIP queued for processing on that tool. Workers generally have no
visibility into conditions outside their immediate fields of vision, in other parts of the factory. In order to
During the time of this internship, June to December 2002, Fab D2 was responsible for six separate
manufacturing
processes. By April 1 t, 2003, the factory will simultaneously be producing and/or developing material with nine
separate processes. This is a result of Fab D2's expanding responsibilities as Intel pushes to expand its silicon
capabilities beyond its core competencies in logic (microprocessors) into areas such as flash memory and wireless
communications technologies. This contrasts with a typical Intel HVM facility, which produces silicon with only
one, or perhaps two closely related manufacturing processes at any point in time.
48
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discover that a tool is idle or needs maintenance attention, for example, a technician would need to travel
to that tool, stand directly in front of it, and access MTUI on its station controller.
9.9
Economic Consequences
As a result of the lack of tools at their disposal, technicians must spend a great deal of time and
effort traveling from tool to tool simply gathering the information that enables them to make decisions
about what to do next. This is especially true when their tools are scattered over many locations in the
factory, a common problem at Fab D2.
In addition to causing waste in the form of excessive motion, lack of visibility into factory
conditions causes one other significant problem for factory workers. Specifically, technicians usually
have at least a limited understanding of how their actions theoretically affect flow of material through the
factory. However, since they have so little time to focus on anything but their own areas of responsibility,
they usually do not understand how they can adjust their performance to improve the production process
in real time.
Both of these points are crucial, since every minute used inefficiently by a factory worker has
real economic consequences for the company. When factory capacity is a constraint for market demand,
for instance, every lot of 25 wafers is worth approximately $600,000 in revenue to Intel. In addition,
adding capacity to meet market demand is extremely expensive and requires long lead times. State of the
art lithography tools, for instance, which are needed to produce ever-diminishing device critical
dimensions, require about a year to purchase and install, and cost upwards of $25 million per copy.
Prices for even the simplest pieces of processing equipment are several hundreds of thousands of dollars.
Similarly, the factory estimates that it takes roughly 6 months and $50,000 in training for the average
worker to come up to speed as a full-fledged member of the production team. The better that the
company can utilize its existing workforce,
the longer it can defer extremely expensive capital
equipment purchases and worker hiring and training efforts.
9.10
The Project Changes Scope
In early July, after four intensive weeks interviewing people across the spectrum of the
organization and after numerous personal observations both on and off the factory floor, I solidly came to
the conclusion that my internship had to change. Citing the reasons above, I convinced my company
advisor and his boss, the Strategic Manufacturing Manager, to allow me to radically change the scope of
my project, my new topic focusing on improving productivity by providing real-time feedback to the
factory floor. Although at this point I had not yet discovered what I should do to make this happen, about
Average capital equipment utilization in the semiconductor industry is not much greater than about 60%. Since
Intel designs its fabs to run in "balanced" fashion, improvements in factory worker productivity also manifest
themselves as improvements in the utilization of plant equipment.
4
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a month later, after investigation of various options, this effort turned into a campaign to implement a
system called Electronic Monitor Boards (EMBs).
9.11
EMBs - A Brief Description5"
About two weeks after changing the project scope, I stumbled across EMBs, an Intel proprietary
system that soon became the main focus of the project. Figure 23 in Chapter 6, above, displays a sample
"Equipment View" screen shot from the system. In sum, the system provides the user with a highly
visual representation of near real-time (15-30 second information time latency) tool and WIP status. In
addition, the system also allows users to "drill down" and obtain more detailed information on demand.
By the time I started work on this project, EMBs was already about two years old. In 2000,
Intel's ATM (Assembly Test Manufacturing) sites had already implemented the system. In early June
2002, about the same time that my internship started, EMBs had only recently started crossing over to the
company's semiconductor manufacturing sites, starting with Intel's Fab 18 in Israel as a pilot site.
9.12
Three Perspectives on Organizational Processes
Almost immediately after I learned of the EMB system, for a variety of reasons, I knew that I had
found what I was looking for. Although the system was not perfect, I realized that it would at least be a
significant step in the right direction to providing meaningful, real-time performance indications to the
shop floor. Below I describe the ultimately successful campaign that I waged for EMB system
implementation, examining this effort in light of the three perspectives on organizational processes:
strategic, cultural, and political.
9.13
Strategic Issues
Fab D2's Manufacturing Systems Engineering (MSE) Group was my "home" for the duration of
the project. The MSE group, although sanctioned within Fab D2, is a bit of a maverick within the
organization - no other group quite like it exists at other Intel fabs. Officially its purpose is improving
factory "Velocity," which in this context means devising strategies that improve throughput times for
both production and technology development material. In addition to tried and true methods of achieving
this, however, the group is also encouraged to come up with creative strategies for dealing with the
extreme pressures and unusual circumstances that the factory faces.
This project fit well with the mission of this group, since its primary purpose was directly
improving factory productivity, generally measured in WIP Turns."
promised to help the entire factory, and not
Even better, since my project
just one production process, 884, as originally defined, I
50 See Chapter 6 for more details on the EMB
system.
A WIP Turn is defined as the number of activities (process steps that fundamentally change the material
characteristics of a silicon device) performed over the course of a period of time (usually shifts or days) divided by
the average amount of WIP in the production system. In general, the higher the WIP turns for a process, the faster
material is moving through the factory and the better the manufacturing process is performing.
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hoped that the project would get broader factory support. This fact was extremely important because my
project coincided with two other productivity improvement efforts at Fab D2. The first of these was
"Effort Reduction," a highly advertised, Intel-wide campaign by senior management that solicited
employees to identify ways that work could be accomplished more efficiently. The second was a Fab D2specific "2X TD" project. The latter was an effort to double the amount of TD material that the fab
processed by the end of the next year (2003), without impacting the factory's ability to accomplish its
other responsibilities, including production. By the time I had left, my project stood alone promising
substantial, measurable improvements in factory productivity.
A factor working against my project was the recent financial performance of the company. Intel,
like its competitors in the semiconductor business, acutely felt the effects of an industry-wide downturn
the entire duration of my project. Although Intel was still profitable, corporate revenues and earnings
were down substantially from the boom years of the late 1990s. Thus, any change requiring substantial
funding (EMBs required an initial outlay of approximately $80k, including hardware purchases and time
by Automation personnel for system implementation - since the system was devised by Intel, software
was free) required credible justification in the forim of a positive and substantial ROI. Fortunately, I was
able to provide evidence, extrapolated from experiences with the system at Fab 18 and from
Intel's ATM
sites, backing up my claims that EMBs would improve factory productivity.
9.14
Political Issues
Surprisingly, although I met with both some extremely strong support and opposition to this
project, I found that political issues were less of a concern than I expected. I believe that there were at
least three reasons for this. First, I believe that
Intel's ingrained culture of Continuous Improvement (CI)
helps keep employees' minds open to possibilities of ways that processes can be improved. Second, few
people thought that my project would truly threaten theirjobs or livelihoods. Importantly, from what I
observed, people recognized the fact that
Intel saw its employees as a competitive advantage, and was
committed to retaining and retraining its workforce if productivity gains made their positions obsolete. In
other words,
Intel would not use process improvement as a pretext for laying off workers.
A final reason that I believe limited strong political reaction from most employees at Fab D2 to
my proposal for implementing EMBs was the fact that most people were simply too busy to give me
much attention. Intel employees frequently talk about operating in "Quadrant
I" (Covey, p. 1 51),
performing activities that are both important and urgent. My project, on the other hand, fell squarely into
activities that were "Quadrant II" in nature - important but not very urgent. Thus, more often than not, I
had to overcome peoples' ambivalence to the project. Although they might have seen the value that the
EMB system could bring to their own work, they frequently took a passive, "wait and see" approach.
People seemed willing to accept change if it was going to happen, but very few seemed interested in
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playing an active part either for or against the project. As discussed later in this paper, there were also
important cultural factors that likely played a part in employees' initial reactions, not the least of which
was
Intel's strong, merit-based, results-oriented culture, in which I had not yet proven my personal
capabilities.
9.15
Creating and Communicating a Vision While Achieving Buy-In and Generating "Pull"
Intel Corporation is known for its emphasis on distributed leadership and consensual decisionmaking. An example of this is "two in a box," even "three in a box" responsibility, in which several
managers share leadership responsibility. Another is a highly matrixed organizational structure; much
work done in the organization is done in cross-functional teams with members pulled from many parts of
the organization.
The key challenge to making change at Intel is thus creating a wide base of support, or in Intel
terms, generating "pull." The way that I went about doing this was simple - I arranged innumerable halfhour one-on-one meetings with everyone and anyone that I could in the organization - MTs, supervisors,
shift managers, FAMs, automation engineers, and process engineers, among others.
An invaluable tool that I had in "selling" the EMB system in these exchanges was a real-time web
link to Fab 18's EMB system. As we talked, discussing and exploring system capabilities, we could see
conditions changing real-time at Fab 18. When this occurred, almost without exception the interviewee
intuitively saw how the system could help them perform their work.
Although these sessions were not necessarily the optimal way to achieve my objective, they were
highly effective. By conducting these interviews personally, I was able to hold my audience's attention,
answer their questions, and drive my points home more effectively than I could have by giving more
formal presentations. In addition to helping me generate support for the EMB system, a concrete
"doable" result that people could latch onto, this approach helped me accomplish a number of other things
as well. First, I was able to sell myself and my enthusiasm for the project, which went a
long way in
convincing people that I was serious and committed to the effort. Second, it helped me build
relationships with a wide spectrum of people across the fab. Third, numerous conversations gave me
insights into ways that the system could be improved. Finally, I was often able to communicate my larger
vision of what could be accomplished at Fab D2, since I saw EMBs as being merely one step in the
direction of real-time performance feedback, and part of a broader effort of "lean" transformation at Fab
D2.
9.16
Cultural Aspects Affecting the Change Effort
Several cultural factors, some unique to Fab D2 and some general to Intel Corporation, played a
significant role in the project, some as enablers and others as hindrances. In fact, upon reflection, I
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believe that cultural factors were the most important determinants in the leadership challenges that I faced
throughout the duration of the project.
9.17
Defining Your Own Work
One aspect of my membership in the MSE group that gave me a great advantage in the success of
my project, the ability to determine my own destiny, was compounded by my status as an intern. To a
certain extent, Intel employees have a great deal of flexibility in defining their work, as long as they can
demonstrate that their actions will benefit the organization. Few formal obstacles stand in the way of
individual initiative, as long as a person demonstrates measurable return for the organization.
A caveat to this, of course, is that any change effort, if not yet officially sanctioned by the
organization, requires that person find resources, generate "buy in," and create structures that support the
proposal. In addition, many times workers find that enacting change necessitates extra effort outside their
normal working routines. Fortunately the MSE group's role is continuously shifting, so work routines are
more flexible, and members within the group have even more discretion choosing projects that they
believe will bring value to the organization. Perhaps more importantly, despite their often-unorthodox
ideas, people from the MSE group have repeatedly proven that they could deliver, which lent the group a
certain amount of credibility in Intel's results-oriented culture.
Being from LFM worked both for and against me. I derived status from the fact that interns from
the program had achieved several successes in the past at Fab D2. On the other hand, people were
skeptical that I could bring any kind of meaningful change to the organization when they understood that
I was at the factory only temporarily, even though my work on site lasted nearly seven months.
9.18
Relating, Visioning, and Inventing as a Simultaneous Process
Over the course of the project, I made the most of the advantages that I enjoyed as a member of
the MSE group, as an intern with no defined responsibilities within the organization, and from my status
as an LFM intern. Despite this, of course, given Intel's strong merit-based and results-oriented culture, I
had a long way to go in a short period of time convincing people that I was both personally credible and
that my ideas had merit. Not least among my challenges in this position, of course, was creating change
in an environment where I exercised no formal authority and had no resources at my disposal to enact
change other than my own time, energy, and enthusiasm for the change effort. This was particularly
frustrating for me given my background as a naval officer. Before, when I wore a uniform, I enjoyed a
certain amount of authority and expected a baseline measure of respect just by virtue of my rank and
position.
I tried to overcome these limitations, as well as peoples' inhibitions about my "temporariness" by
inventing as many ways as possible to network as much as I could with people at all levels across the
organization, and by involving myself in as much as I could in the routine of the factory. Although not
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required for an intern, for example, because of its early hour, I became a fixture at the 7:45 A.M.
Operations Huddle with the oncoming Shift Manager, several of his supervisors, Ralph, Chris, Bob, Sean,
and several other members of the MSE group. My reasoning, which I believe was correct, was that if
people saw that I was serious enough to wake up early, participate in this meeting, and learn about the
issues that faced the factory on a daily basis, then they would also believe that I was also serious about
helping make positive change at the organization.
Similarly, I later became a regular attendee at the TMI (Target Matching Indicator) team, one of
the most influential bodies at Fab D2 because of the importance of the work that it performed in
controlling the critical Poly loop. In addition, I asked Chris Keith to give me projects that I could
accomplish in my early weeks that would both force me to interact with other members of the
organization and give me "small wins" that I could point to as measures of my capability. Similarly, I
took initiative on a small, successful shop-floor pilot project in the AMAT 5K cluster (a set of tools in the
Thin Films Functional Area) that helped me gain visibility on the shop floor and gave me an excuse to
mingle with supervisors and MTs across all four of shifts. Later, as I gained even more credibility in the
organization, especially after I convinced factory leadership to commit to the EMB system, I volunteered
to lead a team investigating ways to improve factory communications. Finally, in October
I began
another change initiative to bring real-time Statistical Process Control performance indications to Process
Engineers, which ultimately became the second major thrust of my project.
9.19
Fab D2 and the "Not Invented Here" Syndrome
One of the biggest surprises that I encountered at Fab D2, which proved a formidable obstacle in
convincing factory leadership to implement the EMB system, was a unique version of the "Not Invented
Here" (NIH) syndrome. Namely, the factory had a strong aversion to information systems that had not
been developed on site. The reasons for this were rooted in Fab D2's belief that it was special within
Intel's semiconductor manufacturing community.
This argument was not without merit - as mentioned previously, HVM sites normally only run
one, or perhaps two closely related processes. Fab D2, on the other hand, has always run multiple
production processes, the number reaching nine by the end of March this year. In addition, since it
focuses on process and product development, the factory constantly injects disruptions, such as
experiments, into its manufacturing system. HVM sites, meanwhile, are focused almost exclusively on
running stable processes. As a result, they rarely purposely invite complications to their production
schemes.
These differences are important in understanding why Fab D2 personnel avoid implementing
information systems developed at other facilities. Automation personnel pointed to numerous cases
where information systems had been brought from HVM sites for implementation at the factory. Most of
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the time, these systems failed because of the unique demands that Fab D2's manufacturing environment
placed on them. If a system did not fail, then without exception it was because of heroic efforts by
factory Automation personnel that corrected system software discrepancies and made it compatible with
Fab D2's production processes. Fab D2 thus expressed much suspicion and doubt for EMBs, much
like
they had greeted many promising information technologies that had preceded it.
9.20
Cultural Arrogance as a Barrier to Implementation
Related to the "NIH" problem was stigma from EMBs' ATM origins. Since Intel's ATM sites are
not a core part of Intel's business, they feel continuously pressured to justify their existence to the rest of
the corporation and prevent their role from being outsourced, which leads to a much more risk tolerant
environment in this community. This contrasted with the extremely risk-averse, conservative climate
found in Intel's semiconductor manufacturing facilities. ATMs heightened affinity for risk and their
closer connection to Intel's customers are often cited as reasons why the ATMs invented and
implemented EMBs so quickly. Intel's fabs, on the other hand, including Fab D2, jealous of the status
that they enjoyed within Intel, were reluctant to implement a system that they did not believe would
accommodate their specific needs.
9.21
Chicken or Egg?
Yet another cultural barrier to system implementation was fear, expressed primarily by the
Automation Department, that other factories would not implement EMBs, leaving Fab D2 with a
technology that was not supported Intel-wide. The dilemma faced here can be summed up by the classic
"Chicken or Egg" problem - that is, which one comes first? Although several other fabs had expressed
an interest in the EMB system, none were willing to commit resources (other than Fab 18) to the system
until Intel as a corporation had committed it support. At the same time, Intel as a corporation was
unwilling to support the system until the fabs had expressed sufficient interest. Fab D2 was thus more
willing to take a conservative "wait and see" approach with the system to ensure that things went well
with the system before it was adopted.
9.22
Overcoming Cultural Barriers
I appealed to both logic and emotion arguing that implementing the EMB system as soon as
possible, and not waiting for things to "shake out" with the system, was in Fab D2's best interest. The
first argument that
I used, discussed above, and in line with Intel's data-driven culture, was quantifying
the return that Fab D2 could expect from the system based on the productivity gains made at Intel's ATM
facilities and at Fab 18.
Perhaps more importantly, however, I perceived a narrow window of opportunity for Fab D2 to
get in "on the ground floor" with EMBs. I made the case that the system, although fairly well established
at Intel's ATM facilities, was still relatively immature in the company's semiconductor manufacturing
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community. Although Fab 18 was piloting the system, I pointed out that it had not yet become
entrenched in the HVM mindset, leaving open the possibility that Fab D2 could significantly influence
further system development. A key consideration here was the flip side of the "Not Invented Here"
concern outlined above. Specifically, systems developed at Fab D2 and proliferated to HVM fabs almost
invariably worked, since Fab D2 developed systems that were extremely robust to almost every
conceivable type of exception in the production system. Thus, I argued, Fab D2 was in a position to make
improvements to the EMB system that would benefit all of Intel Corporation's semiconductor
manufacturing facilities.
Taking this one step further, I contended that Fab 18's efforts actually worked to our advantage,
since it was doing the lion's share of the hard work debugging and testing initial system implementation.
Since the system was being developed by an independent Intel Component Automation Systems (CAS)
group in Bangalore, India, I argued that with close coordination and careful planning, we could leverage
that organization's resources, which were still focused on the system, to make desired changes rather than
try and go it alone after system protocols had already been established. Further strengthening this last
argument was the fact that I had already identified, from numerous conversations with supervisors, MTs,
and other constituencies in the factory, several improvements that would substantially enhance system
capabilities and usefulness. In fact, I had already convinced CAS India to commit to several system
improvements that we had identified. On the other hand, I argued, if we waited too long, then we risked
being left out of the EMBs' development, leaving us with a potentially unimplementable system, as had
happened many times in the past.
9.23
Intel's Culture and the Issue of Control
A final cultural hurdle that I had to overcome in the implementation of EMBs was the issue of
control. Specifically, EMBs promise to more fully engage the factory work force by giving workers
information that they can use to act more proactively in solving factory problems. Intel's traditional
approach to information technology and automated systems, however, has been one focused on control of
the processes that technicians use on the factory floor. As mentioned earlier, a lot of 25 wafers is
extremely valuable, worth roughly $600,000 in revenue to the company. Most of Intel's efforts in the
past have thus been reducing costly errors, most often caused by inattention to detail or other human
error, by building safeguards into the manufacturing process with technologies that automate the process.
I sensed this as a form of myopia, however, rather than a source of resistance to the project.
Reactions to the EMB system, when people understood what I was trying to do, were more often that of
"Gee, I never thought of that way" rather than "We can't do that because this is the way that we have
always done it." Thus, I believe one of the most valuable contributions that I was able to make at Fab D2
was due to my complete lack of experience in the industry. Because I viewed things from a fresh
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perspective, I noticed details that factory personnel were unable to see themselves due to their thorough
indoctrination and training with the way that things were "supposed to be."
Surprisingly, I also experienced very little resistance from supervisors, other managers, or
engineers fearing that they would become irrelevant as more responsibility shifted to the factory floor.
Fortunately, I believe that this can be attributed to Intel's culture of "Continuous Improvement" in its
processes. In addition, I believe that I arrived at Intel at an opportune time for this kind of change.
Pressures of a stagnant economy in general, and especially rough times for the semiconductor industry
left many people at the factory more open to new ideas about making the production process more
efficient and responsive. In addition, many of these constituencies saw the value that the EMB system
could bring to their work. Since EMBs are web-based, they could view factory conditions real-time in
their cubicles, better maintaining awareness of and responding to problems.
9.24
Ensuring Continuity of Effort and Project Success
The key event of the internship came in mid-October, when the Plant Manager formally signed
the documents allocating resources for the project. The project's breakthrough, however, came much
earlier. Instead of occurring as a single event, it was a slow, laborious process of education and garnering
buy-in through what almost seemed like endless, one-on-one demonstrations of system capabilities and a
few formal presentations to small groups of people. When we stood on the carpet before the Plant
Manager, his signature was but a formality. By this time, a critical mass for change had been created - the
decision had already been made by the FAMs, the Manufacturing Managers, and the various other
Supervisors and Shift Managers, as well as quite a few Process Engineers and MTs, that the factory
needed the EMB system, not only as part of its ongoing CI efforts, but also as part of the Effort Reduction
and 2X TD initiatives.
Implementation is the second key hurdle that still needs to be overcome. Despite this, I was able
to help organize these efforts before I left the site in late December. First, I convinced a fellow member
of the MSE group to continue leadership and ensure a smooth transition of effort on the EMB project.
The Etch Functional Area Manager (FAM), as part of some other IT initiatives that he is pursuing, formed
an Etch-specific IT team composed of Process Engineers, Supervisors, and MTs that will also help
introduce the EMB system in the Etch area. Working with the Etch and Thin Films FAMs,
I also helped
map out a proposal for piloting the system in their areas. Next, I forwarded and got commitments from
CAS, India, the system's developers, to make several improvements to the system. Finally, I helped start
a dialogue about how we would incorporate the EMB system with the normal routines on the shop floor.
9.25
Implementation Status
As I write this, implementation efforts at Fab D2 have, so far, gone relatively smoothly. System
hardware was received late in December 2002, just after I left the site, and installed in January 2003. The
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system itself will be released to the shop floor at the end of April, when a new release of the software
incorporating several important features, is made available to the fab.
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110
10
Concluding Thoughts
This chapter concludes the discussion of the change effort at Fab D2. First we briefly summarize
two key themes developed over the course of this work - information's critical role in the efficient
operation of manufacturing systems, and the importance of worker participation in complex, highly
variable production environments. Next we delve into larger questions posed by this work - most
importantly the issue of control in Intel's operations, and the effect this has on information technologies
that promise benefits only when workers are enabled to take individual initiative. Finally, an argument is
made for the concurrent design of manufacturing and information systems.
10.1
Information and Manufacturing Systems
As we have seen, information is an integral component of manufacturing systems, with two key
factors driving information needs being process complexity and variability. On the latter point,
information needs increase commensurate with process variability as workers find themselves under
heightened pressures to respond to and correct problems. This is especially the case in contemporary
semiconductor manufacturing practice, where coping with extreme variability" is viewed as a normal part
of doing business. The extensive and continuing proliferation of SPC methods in the semiconductor
industry is but one indication of this trend.
Aggravating this situation is the growing detail and systematic complexity of semiconductor
manufacturing processes, which itself is at least partly due to ever-increasing requirements for controlling
variability in those processes.
10.2
Worker Participation in Manufacturing
One need only step into the clean rooms of a modern semiconductor manufacturing facility, such
as those at Intel's Fab D2, to realize how critical information is to the successful operation of the
production process. For everyone involved - process engineers, management, supervisors, and
technicians on the factory floor - work is a dynamic process of learning and discovery as people
continually learn about and react to changing conditions. The complex, highly variable environment
demands nothing less than complete awareness and participation by all employees in resolving the issues
that face the factory floor.
Traditional "Tayloristic" approaches that subdivide processes into discrete tasks fail here because
of the high level of involvement required by the workforce, and not just management, in defining and
executing work. As manufacturing systems increase in complexity, Taylor's methods holds even less
Variability in this context most notably manifests itself both in relatively poor and uncertain equipment
availability and in the extreme emphasis placed on controlling process parameters now routinely measured in
nanom eters.
5
111
logic as the key
limitation for efficient operations increasingly becomes not machinery but the capabilities
and flexibility of individual workers.
10.3
The Irony of Intel's Manufacturing Operations
Fortunately, Intel Corporation realizes these trends in its manufacturing operations and hires only
exceptionally skilled and educated workers to run its factories. The irony in this situation is that this
company, which is responsible for creating the building blocks of the modern information age, has been
slow to incorporate the very technologies that it enables in its own core production processes. This fact is
not lost on Intel employees, several dozen of whom made this observation over the course of this work.
10.4
Intel and the Issue of Control
Intel's approach may be understood better when viewed in light of the nature of its core
manufacturing processes, where the issue of control is implicitly of primary concern. From the inception
of the semiconductor industry in the 1950s, manufacturers have struggled in achieving devices with
acceptable yields and performance (Moore, p. 3). This continues in the highly conservative approach that
Intel takes in its manufacturing operations, one that errs substantially on the side of control.
Two
manifestations of this discussed in previous chapters include the company's heavy reliance on consensual
decision-making, which prevents any one person from influencing the manufacturing process too much,
and automation efforts that focus on preventing costly worker mistakes. The reason for this becomes
exceptionally clear when one is informed of the fact that a single 25-wafer lot of 200mm wafers is worth
approximately $600,000 in revenue to the company.
Fortunately for Intel, this approach has served it well. However, a valid question may be - is it
sustainable? Specifically, does a policy of control ultimately come in conflict with the overarching issue
of manufacturing system performance? At a certain point, control may do more to hamper manufacturing
system performance as those systems increase in complexity and become progressively more difficult to
manage. Information systems such as EMBs (and PERAT in its final envisioned form) promise benefits
only if they enable factory technicians to take broader action on their own initiative.
Fab D2 thus perhaps offers a broader lesson to the rest of Intel's semiconductor manufacturing
community since managers and supervisors at this factory recognize that they are running up against hard
constraints in their capacity to focus on and deal with problems as operations grow progressively more
complex. This is especially important because it is the author's firm opinion that Intel's HVM factories
will look more, and not less, like Fab D2 in the future as Intel diversifies its silicon businesses, forcing it
to concurrently diversify factory product and process mixes.
10.5
An Argument for Concurrent Design of Manufacturing and Information Systems
One final issue is that of concurrent design of manufacturing systems and the information systems
that support production operations. In the final analysis, EMBs and PERAT are both kludgey systems,
112
built upon other kludges of systems that have evolved sporadically over the years to support Intel's
manufacturing operations. All too often, it seems, information systems development and implementation
come late in the game, with little forethought about how they might be integrated more effectively.
Intelligent design of complex manufacturing systems should thus take into account not just
traditional industrial engineering requirements, such as modeling material flows and the efficient use of
resources, but also metrics, incentives, and the interplay of workers and machinery - especially
information systems that workers use to guide their actions in the production environment.
Efforts are already underway to accomplish this in Intel's state-of-the art 300mm factories. It is the
author's hope that this continues as part of a larger "lean" effort on the part of Intel Corporation
specifically, and in the semiconductor manufacturing industry as a whole.
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Glossary of Terms and Acronyms
activity - An Intel-specific term used to identify discrete manufacturing process steps that change
fundamental physical characteristics of a semiconductor wafer. For instance, many, if not most,
etch and thin films process steps are considered activities. Lithography SED steps, on the other
hand, are not considered activities.
back end - This term has two meanings: 1. the process steps that comprise that part of the manufacturing
process from contact formation through metal layering to the end of the line, and 2. an Intelspecific term referring to the two shifts (day and night) that work Thursday through Saturday
every week and Wednesdays on alternate weeks.
boutique - Boutique material is material that is subjected to extra-stringent quality control measures using
the same production process as normal production material. The result is often material that
exhibits better performance characteristics - specifically, device speed.
constraint - The part of a manufacturing process that limits overall production.
critical dimension - The dimension of the smallest and most critical elements within an IC's circuit
elements. In modern semiconductor devices, the CD is usually defined by the width of
polysilicon required after polysilicon etch. This width determines gate and channel width, a
critical determinant of device speed.
descum - A plasma etch operation that removes residual resist from a wafer following development.
die - One of several individual, independent devices manufactured on a wafer.
die yield - The proportion of fully functional die that meet performance specifications from all die
produced on a semiconductor wafer.
diffusion - This term has two meanings: 1. a high temperature process in which semiconductor dopants
are moved from regions of high concentration to regions of lower concentration, and 2. the name
of a semiconductor manufacturing facility functional area that performs diffusion processing.
etch - This term has two meanings: 1. a chemical or plasma process in which material is removed from
the surface of a semiconductor wafer, 2. the name of a semiconductor manufacturing facility
functional area that performs etch processing.
excursion - An event in a semiconductor manufacturing facility that significantly impacts line or die
yield.
front end - This term has two meaning: 1. all processing that occurs beginning with the start of wafers in
a factory through transistor formation ending with contact etch, and 2. an Intel-specific term
referring to the two shifts (day and night) that work Sunday through Tuesday every week and
Wednesdays on alternate weeks.
functional area - An organizational division composed of similar process technologies in a semiconductor
manufacturing facility. A typical semiconductor facility has six functional areas - diffusion,
etch, implant, lithography, planar, and thin films.
HVM - High Volume Manufacturing
implant - This term has two meanings: 1. the process of introducing dopants into semiconductor material
by means of high energy ion bombardment, and 2. the name of a semiconductor manufacturing
facility functional area that performs implant processing.
limiter - An Intel-specific term that describes a part of the manufacturing process not identified as a
constraint that temporarily limits overall factory production. For instance, if only one of five
115
tools in a certain cluster is available for processing for a long period of time, that cluster might be
considered a factory limiter.
l1ic y;cild - The percentage of wafers started in a seiilconductor fabrication facility that successfully
complete processing.
lithography - This term has two meanings: 1. the process of spinning, exposing, and developing
photoresist to obtain a pattern on a wafer that protects some areas of the wafer surface and
exposes other areas to further etch, thin films, or implant processing, and 2. the name of a
semiconductor manufacturing facility functional area that performs lithography processing.
mask layer - A subdivision of a production process measured from the beginning of one SED step to the
beginning of the next SED step.
mid-section - A term sometimes used to refer to that part of a process that consists of process steps for
transistor formation.
MT - Manufacturing Technician (same as TMT) - an Intel-specific term that refers to workers that
process material on the shop floor.
planar - This term has two meanings: 1. the name for those parts of a process of chemically and
mechanically leveling the surface of a semiconductor wafer, and 2. the name of a semiconductor
manufacturing facility functional area that performs planar processing.
process step - A discrete semiconductor processing operation.
process shrink - A process shrink occurs when the dimensions of an existing product or products are
reduced. This increases productivity, since more die now fit on the same-sized wafers. In
addition, process shrinks are also often accompanied by increases in product performance,
especially device speed.
recipe - A set of specifications that describe a process step. These specifications might include, and are
not limited to, factors such as process chemistry, timing, temperature, and gas flows.
SED - Signifies "Spin/Expose/Develop," the three sub-processes of lithography process steps.
thin films - This term has two meanings: 1. the process of forming thin layers of dielectric, conductive, or
other materials on the surface of a semiconductor material, and 2. the name of a semiconductor
manufacturing facility functional area that performs thin films processing.
TMT - Technology Manufacturing Technician - same as MT - an Intel-specific term that refers to
workers that process material on the shop floor.
value-added process step - A process step that must be performed to achieve a fully functional
semiconductor device. Value-added steps include activities and process steps such as lithography
SED operations, which determine critical patterns for wafer processing in virtually every mask
layer. An analytic step would be an example of a process step that is not value-added.
WIP - Work in Process
116
Bibliography
Ancona, Deborah, Thomas Malone, Peter Senge, and Wanda Orlikowski, "The Sloan
Leadership Model," Draft manuscript, Sloan School of Management, 2003, 2 pp.
Anonymous, Expanding Moore 's Law, Intel Corporation, Fall 2002 Update, 12 pp.
(ftp://down load. Intel.com/labs/eml/download/EML_opportunity.pdf)
Ansombe, F.J., "Graphs in Statistical Analysis," American Statistician,vol. 27 no.1 (February 1973), 1721.
Baldwin, Carliss Y. and Kim B. Clark, Design Rules: The Power ofModularity vol. 1, MIT Press, 2000.
Boning, Duane S., "Sensors and Signals in Semiconductor Manufacturing," Class Notes, MIT
Microsystems Technology Laboratories, April 2003, 1-26.
Covey, Stephen R., The Seven Habits OfHighly Effective People, Simon & Schuster, I st ed., August
1990.
DeVor, Richard E., Tsong-how Chang, and John W. Sutherland, StatisticalQuality Design and Control:
Contenporary Concepts and Methods, Upper Saddle River, NJ: Prentice Hall, 1992.
Domik, Gitta, "Do We Need Formal Education in Visualization?" IEEE Computer Graphics and
Applications vol. 20 no.4, July/August 2000, 16-19.
Elvins. T. Todd, and Ramesh Jain, "Engineering a Human Factor-Based Geographic User Interface,"
IEEE Computer Graphics and Applications, May/June 1998, 66-77.
"Factory I ntegration," InternationalTechnology Roadmap For Semiconductors, 2001 ed., 1-23.
Feynman, Richard P. Feynman Lectures on Computation, Cambridge, MA: Perseus Publishing, 1996.
Fine, Charles, Clockspeed: Winning Industry Control in the Age of Temporary Advantage, Read ing, M A:
Perseus Books, 1998.
"Factory Integration," InternationalTechnology Roadmap For Semiconductors, 2001 ed., 1-33.
Garvin, David A, "Types of Processes," HBS Case 9-682-008, Boston, MA: Harvard Business School
Publishing, 1981: 1-7.
Gershwin, Stanley B., Manufacturing Systems Engineering,2 "nd Private Printing, Massachusetts Institute
of Technology, 2002.
Greif, M ichel, The Visual Factory: Building ParticipationThrough Shared Information, Productivity
Press, May 1991.
Hardt, David E., "Manufacturing Processes and Process Control," Class Notes, MIT Laboratory for
Manufacturing and Productivity, February 1996, 1-5.
Hayes, Robert H. and Steven C. Wheelwright, "Link Manufacturing Process and Product Life Cycles,"
HarvardBusiness Review, January-February 1979: 2-9.
117
Hopp, Wallace J. and Mark L. Spearman, FactoryPhysics, 2 nd ed. Irwin McGraw-Hill, 2001.
Intel Corporation Components Automation Systems Internal Document, "e-Monitor Board (eMB)
Software User's Guide (ATM Version) Product Version 2.1," 61 pp.
Johnson, R. Colin, "Star Trek Technology Comes Alive at IDF," EE Times, September 12, 2002.
(http://www.eetimes.com/semi/news/OEG20020912S0050)
Kercel, Stephen W., S. Alenka Brown-VanHoozer and W.R. VanHoozer, "The Model-Based Mind",
2000 IEEE Conference on Systems, Man, and Cybernetics vol. 3, 200: 2204-2209.
Larson. Richard C. and Amedeo R. Odoni, Urban OperationsResearch, Englewood Cliffs, New Jersey:
Prentice Hall, 1981.
Leachman, Robert C., Jeenyoung Kang, and Vincent Lin, "SLIM: Short Cycle Time and Low Inventory
in Manufacturing at Samsung Electronics," Interfaces vol. 32 no. 1 (2002): 61-77.
Liberty, Jesse, SAMS Teach Yourself C++ in 21 Days, 4 h ed. Sams Publishing, March 2001.
Mark, Gloria and Alfred Kobsa, "Do Four Eyes See Better than Two? Collaborative versus Individual
Discovery in Data Visualization Systems," IEEE Computer Society Proceedings of the Sixth International
Conference on Information Visualization vol. IV (2002): 7 pp.
Moore, Gordon E., "Cramming more components onto integrated circuits," Electronics, vol. 38 no. 8,
April 19, 1965: 4 pp.
Nahmias, Steven, Productionand OperationsAnalysis,
4h
ed. Irwin McGraw-Hill, 200 1.
Norman, Donald A., The Design of Everyday Things, New York, NY: Doubleday, 1988.
Orfali, Robert, Dan Harkey, and Jeri Edwards, Client/ServerSurvival Guide, 3 rd ed. John Wiley & Sons,
1999.
Petzold. Charles, Code, Redmond, Washington: Microsoft Press, 2000.
Phillips, Charles L. and Royce D. Harbor, Feedback Control Systems,
Jersey: Prentice Hall, 1991.
2 nd
ed. Englewood Cliffs, New
Pindyck, Robert S. and Daniel L. Rubinfeld, Microeconomics, 4 "' ed. Upper Saddle River, New Jersey:
Prentice Hall, 1998.
Quirk, Michael and Julian Serda, Semiconductor ManufacturingTechnology, Upper Saddle River, NJ:
Prentice Hall, 2001.
Rogers, Erika and Ronald C. Arkin, "Visual Interaction: Between Perception and Problem Solving,"
IEEE Transactionson Systems, Man, and Cybernetics 'DecisionA idingfor Complex Systems'
InternationalConference Proceedings, 1991, 1265-1270.
118
Rubin. Kenneth S., Patricia M. Jones and Christine M. Mitchell, "OFMspert: Operator Intentions in
Supervisory Control Using a Blackboard Architecture,"' IEEE Transactions on Systems, Man, and
Cybernetics 18 no. 4, July/August 1998, 618-637.
Scholtz. Robert L. "Strategies for Manufacturing Low Volume Semiconductor Products in a High
Volume Manufacturing Environment," MIT LFM Thesis, May 2002.
Scott. Mark D.. "Manual Material Handling in Semiconductor Manufacturing," MIT LFM Thesis, May
2002.
Spanos, Costas J., Hai-Fang Guo, Alan Miller, and Joanne Levine-Parrill, "Real-Time Statistical Process
Control Using Tool Data," IEEE Transactions on Semiconductor Manufacturingvol. 5, no. 4, November
2002, 308-31 8.
Spanos, Costas J., "Statistical Process Control in Semiconductor Manufacturing," Proceedings of the
IEEE vol. 80 no. 6, June 1992, pp. 819-830.
Sterman, John D., Business Dynamics: Systems Thinking andModelingfor a Complex World, Irwin
McGraw-Hill, 2000.
"System Drivers," InternationalTechnology Roadmap For Semiconductors, 2001 ed., 1-22.
Thomas, Robert J., What Machines Can'tDo: Politicsand Technology in the IndustrialEnterprise,
University of California Press, March 1994.
Tufte, Edward R., The Visual Display of Quantitative Information, Chesire, CT: Graphics Press, 1983.
Tufte, Edward R., Envisioning Information, Chesire, CT: Graphics Press, 1990.
Tufte, Edward R., Visual Explanations,Chesire, CT: Graphics Press, 1997.
Wolkenberg, Brian S. "Using Assignment Problems to Optimize Semiconductor Manufacturing
Processes," MIT LFM Thesis, May 2000.
Womack, James P. and Daniel T. Jones, Lean Thinking, Simon & Schuster,
1st ed., January 15, 1996.
Womack, James P., Daniel T. Jones, and Daniel Roos, The Machine That Changedthe World, New York,
New York: Harper Perennial, 1991.
X iao, Hong, Introduction to Semiconductor Manufacturing Technology, Upper Saddle River, NJ: Prentice
Hall, 2001.
Zhang, Ping, "Visualizing Production Planning Data," IEEE Computer Graphicsand Applications,
September 1996, 7-10.
119
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