Digital Signal Processing
Laboratory Work 521280S
Miguel Bordallo,
miguelbl@ee.oulu.fi, TS301
Department of Computer Science and Engineering (CSE)
University of Oulu
Organization of the course
• The course consists on only ONE exercise
– Divided into sections
– Probably published in two or more parts
Assistant:
• TMS320C67x exercise:
• Miguel Bordallo: miguelbl@ee.oulu.fi ,TS301
Credits, grades…
• When the exercise of the course is
completed, you will receive 5 ECTS
– Same as last year
• No exams: each returned exercise will be
either accepted or rejected
– When accepted, a grade 1-5 will be given
depending on the overall quality
• Documentation, accuracy of the answers,
reasoning, elegance of solutions !!!
– Grades are negotiable  (self assesment)
Doubts about organization…
• Check the official webpage of the course
in Noppa
– For news and updates
– Old style website also in use (in case Noppa fails)
• Contact the assistant (me) in third floor:
– For questions
– For returning completed exercises
Registration to the course
• Register by sending the group member
names by email to me or adding them
now to the registration list.
• Register also in Weboodi if you want to
get emails
Organization of groups
– Recommended: Before December 1st
– Maximum two students per group
• Alone is possible but same workload
– You will need a grey key and permission
for the development class room TS139
– Send me email with key number.
• Access granted December 3rd or one week after email
– If you don't yet have the grey key, you
must first obtain it.
• Instructions are here:
http://www.otit.fi/site/index.php/etusivu/tietopankki/41-avainhakemus
Instructions
• Instructions will be published and updated on the course
webpage on the corresponding section:
– https://noppa.oulu.fi/noppa/kurssi/521280s/
• If you need, borrow the course instructions from course
material shelf ("Lainattava kurssimateriaali") in third floor
for copying
• Do not print large manuals! The full manuals are available
in the exercise class room; you may print a few pages for
reference but printing the manuals is useless
Before the exercise
• A period of study: (about two weeks)
– Basics of Digital Signal Processing
• Frequency domain processing, FFT, IIR and FIR
Filtering, Interpolation, Decimation,CIC Filters,
Multirate processing, Adaptive Filters (LMS)
– Programming concepts
• C, Embbeded programming, Real-time, DSP
• Interruptions, Compiler optimization, Intrinsics,
Inline assembly, Memory management
– DSP architecture
• Pipelining, number of units, parallelization of
instructions and data
Before the exercise
• A questionary will be published this week
• No need to return it
– But you can return it if you want
– Return all the answers or only some
• It will have many questions of things you
need to know
– Covers problems that you will face later
Doing the exercise…
• Instructions will be published around 2nd of
December: (Published in two parts)
• They will contain a guide to do the exercise (7
questions), that must be done in order
• A Project Template with tools and a code skeleton
will be distributed with them
• The code must be written in “C” –language
– A small exercise requires the use of DSP
assembly language (specified in the exercise
instructions)
Doing the exercise…
• First, the code should be developed on
workstation classes (e.g. TS138) (except assembly
functions)
• Only when the algorithm is functional and correct,
you can switch the development environment to the
DSP stations (TS139)
• Optimizations (and measurements) must be made
on DSP platform:
– Rewriting some functions
– Memory management
– ASM coding
Doing the exercise…
• Laboratory fully functional on December 15th:
• There will be several C67x platforms available, and
they are located in room TS139
– Before going to use the computers, it is recommended to
reserve a time (max 2 hours)
– Reservation must be done on the Internet at
http://www.ee.oulu.fi/research/tklab/courses/521485S/reservation/
• You may create a temporary working directory in the
development computers
– It must be deleted after use!
– Always make backups e.g. email, unix server, usb mem.
Returning the exercise
• The finished exercise work should be returned
before May 31st , 2013
Early bird deadline: March 31st . It means one
extra point: minimum grade 2)
– It must contain answers for all questions and all written
code in appendices.
– Dsp_lab.c + multiply.s62 + DSP_report.pdf
• If you are unable to finish the work in time, you
should explicitly ask for additional time.
– Although support is not guaranteed outside official dates
Returning the exercise (2)
• You may use any published information
(books, Internet) for completing the work
– You must always reference the source if you
directly cite/use some material
– The exercise instructions may require you to
actually write yourself parts of the code
(e.g. no copying of FFT code)
– Copying code from other students is always
prohibited
Self Assesment
• It is advised to create a ”working time
management” diary
– Number of hours done by every student
– Description of tasks done in every hour
– Can have an impact on the grade
• Students propose their own grade
– Can be accepted or changed
– Based on published criteria
– Can be the same for both or different
– Negotiation possible
Evaluation
• Grades from 1-5
– Functional work: 1 points. COMPULSORY !!!
– Early bird deadline: 0-1 point
– Quality of documentation: 0-2 points
• Filter design, scheme, detailed time management
– Quality of code: 0-2 points
• Comments, structure, indentation, speed
– Accuracy of measurements: 0-1 point
• Realistic vs. unrealistic 
– Audio quality + filter design quality: 0-1 point
”0” means minimum acceptable
Schedule
– November 12th: Initial lecture
• You are already here 
– November 15th: Preliminary questionary published
• No need to return the answers (but you can)
– December 1st: Groups formed. Key numbers sent.
– December 2nd: Exercise instructions published
• Coding can start in UNIX stations
– December 15th: DSP-Laboratory fully equipped
• At least 2 boards will be operating (C6711 or C6713)
– March 31st: Early bird deadline
• It grants 1 extra point (minimum grade: 2)
– May 31st: Last day to return exercises
• You MUST inform if you are not meeting the deadline
Where?
What is a DSP Solution ?
DIGITAL SIGNAL PROCESSING SOLUTIONS
 DSP + Analog + Development Tools + SW + System Expertise
DSP Chip Market
 Fast growing segment in the SC
market (>12% CAGR)
TMS320 DSP Families
C2000
>50 Products
ASP: $3 - $15
 World’s most code-efficient DSP
 Advanced embedded control
applications
 Leadership integration of analog
and high-speed Flash memory
 C28x fully code compatible
TMS320 DSP Families
C2000
>50 Products
ASP: $3 - $15
C5000
>100 Products
ASP: $5 - $120
 World’s most code-efficient DSP  World’s most powerefficient DSP
 Advanced embedded control
 World’s most popular DSP
applications
 Leadership integration of analog  Heart of handheld solutions
and high-speed Flash memory in Internet era
 C55x fully code compatible
 C28x fully code compatible
TMS320 DSP Families
C2000
>50 Products
ASP: $3 - $15
C5000
>100 Products
ASP: $5 - $120

 World’s most code-efficient DSP  World’s most powerefficient DSP
 Advanced embedded control
 World’s most popular DSP 
applications
 Leadership integration of analog  Heart of handheld solutions
and high-speed Flash memory in Internet era
 C55x fully code compatible 
 C28x fully code compatible
C6000
>30 Products
ASP: $10 - $350
World’s highestperformance DSP
Used in high-bandwidth
comms and video
equipment
C64x fully code
compatible
TMS320 DSP Families
C2000
>50 Products
ASP: $3 - $15
 World’s most code-efficient DSP
 Advanced embedded control
applications
 Leadership integration of analog
and high-speed Flash memory
 C28x fully code compatible
C6000
>100 Products
ASP: $5 - $120
 World’s most power efficient and highest
performance DSP
 World’s most popular DSP
 Heart of handheld solutions in Internet era
 C64x fully code compatible
C6000™ DSP platform
 World’s highest-performance DSP
 Heart of solutions for new, high-bandwidth
communications and video equipment
 Wireless basestations and transcoders
 DSL
 Home theater audio
 Digital radio
 Imaging and video servers & gateways
 Smartphone SoCs !!!
>30 Products
ASP: $10 - $350
 Millions shipped to hundreds of
customers
 New generation C67x DSP products fully
code compatible
What can I do with a DSP ?
What can I do with a DSP ?
• Process signals:
– VERY FAST using VERY LITTLE POWER
What can I do with a DSP ?
• Process signals:
– VERY FAST using VERY LITTLE POWER
Eight cores
Digital Signal Processing
Laboratory Work 521485S
C67x exercise
Miguel Bordallo,
miguelbl@ee.oulu.fi, TS301
Department of Computer Science and Engineering (CSE)
University of Oulu
C67x Development Platform
• TMS320C67x is Texas Instruments' family of
floating point digital signal processors.
– It is downward compatible with the TMS320C62x fixed
point family,
– Very Long Instruction Word (VLIW) architecture,
• 256-bit wide Instruction Fetch Packed (IFPs)
– Contains up to 8 simple 32-bit RISC Instructions
– Execution is started simultaneously at the same clock
cycle.
• The instructions are pipelined:
– new instructions can be dispatched before earlier
instructions have finished.
C67x Development Platform (2)
• Special instructions for loading and storing data from and to
memory;
• All arithmetic instructions can use directly built-in registers.
• The instructions have flexible addressing modes:
– Register direct, register indirect, and base + index modes are
supported.
– The index register can be post- or preincremented or decremented.
• Two register sets:
– both have sixteen 32-bit registers (Or up to 32 smaller registers).
– Two 32-bit registers can be combined into one 64-bit floating point
or a 40-bit fixed point register.
• The DSP has plenty of computing resources: there are two
multipliers and six arithmetic-logical units (ALUs).
C67x Development Platform (3)
• The DSP is attached to the DSP Starter Kit (DSK) where it
is clocked at 150/225 MHz rate.
–
–
–
–
The DSK contains power supply, - line in and speaker connectors,
6 megabytes of SDRAM,
- 16-bit D/A and A/D converters,
128 kilobytes of flash ROM,
- Parallel/USB port interface
programmable LEDs,
• The code development can be made with Code Composer
Studio (CCS),
– integrated development environment (IDE) containing:
•
•
•
•
•
•
code editor,
C compiler,
assembler,
linker,
debugger
Utilities
Code Composer Studio
 DSP industry’s first
comprehensive, open
Integrated Development
Environment (IDE)
 Advanced visualization
 Intuitive ease-to-use
 Third-party plug-ins
 Visualization without
stopping the processor
C67x Development Platform (4)
• The Code Composer Studio contains a firmware
kernel called DSP/BIOS,
– provides basic runtime services for managing block-based
data transfers.
– Analog-to-digital (A/D) converter produces samples one by
one, generating a hardware interrupt for each.
• The DSP/BIOS collects the samples into a frame.
– When the frame fills up, a software interrupt is generated
– The control is transferred to the user application.
• The application will receive the whole frame at once,
– It does not need to take care of collecting single samples.
– DSP/BIOS contains routines for outputting framed data via
digital-to-analog (D/A) converter.
C67x Exercises
• All C code can be written by modifying example program:
dsp_lab.c.
• Exercise questions increase in complexity
• Last questions combines results from previous questions:
questions should be done in order
• For doing the exercises, you must understand:
–
–
–
–
–
–
–
Generation of sine signals using IIR filters
Decimation
Interpolation
Implementation of a fast Fourier transform (FFT)
Frame based processing,
Overlap save algorithm, CIC filtering, LMS filtering
Basics of C67x architecture (DSP assembly, DSP architecture)
• Most code should be written on any workstation, but the
final program must run on the DSPs
C67 Exercise (2)
Audio in
USB/
C67 Exercise (2)
Audio in
USB/
C67 Exercise (2)
USB/
Bypass function
C67 Exercise (2)
USB/
C67 Exercise (2)
USB/
C67 Exercise (2)
USB
USB//
Filter
C67 Exercise (2)
USB
USB//
FFT
Filter
C67 Exercise (2)
USB
USB//
Filter
Filter
FFT
Filter
C67 Exercise (2)
USB
USB//
Filter
Filter
Filter
Filter
FFT
Filter
C67 Exercise (2)
USB
USB//
Filter
Filter
Filter
Filter
Filter
FFT
Filter
C67 Exercise (2)
USB
USB//
Filter
Filter
Filter
Filter
Filter
FFT
ASM
Filter
C67x Exercise (3)
• The final version of the exercise
instructions and the final code template
will be published by December 2nd
• Access to the DSP lab will be granted in
two weeks. The lab will be Fully
operative about 15th December
• First steps of the development should be
done on a workstation
How to proceed ?
1.
2.
3.
4.
5.
6.
7.
8.
9.
Study the concepts on the questionary carefully
Study the algorithms and concepts involved
– Convolution, complex multiplication, IIR, FIR, overlap-save
Answer the questions to test your knowledge
Study the EXERCISE INSTRUCTIONS carefully (all of them)
Gather the documentation that you will need
Design the algorithms. Test some parts with MATLAB
– (e.g. FFT)
Start coding on a Unix station
– Test your code against well known results (e.g. in Matlab)
When the final code is working:
– Think about the DSP architecture and make some changes
– Check the memory usage. Check the data types. Check the use of
very slow functions (such as pow() or sinf() )
Move to the DSP platform
In the DSP platform
1. Test the environment
2. Familiarize yourself with the debugging tools
3. Try your code
– Only the code that works on a Unix station has chances of
working on the DSP
4. Debug, debug, debug, debug, debug…
5. Debug a little more
6. When the code works:
– Make the final time measurements.
– Compile your answers into a document.
– Return the exercises including the code (C + assembly)
In case of problems
• Read the instructions and the webpage (FAQ)
It might be that the question is already
answered there
• First, send and email to me.
– Always attatch the code and results
– Specify the problem as much as possible, so it can
be reproduced.
• I will answer with debugging strategies and
suggestions of tests.
• If all fails, I will set up a time to meet you in the
lab.
Questions?
??
??
??
??
??
??
??
??
Schedule
– November 12th: Initial lecture
• Already happened. Download the slides
– November 15th: Preliminary questionary published
• No need to return the answers (but you can)
– December 1st: Groups formed. Key numbers sent.
– December 2nd: Exercise instructions published
• Coding can start in UNIX stations
– December 15th: DSP-Laboratory fully equipped
• At least 2 boards will be operating (C6711 or C6713)
– March 31st: Early bird deadline
• It grants 1 extra point (minimum grade: 2)
– May 31st: Last day to return exercises
• You MUST inform if you are not meeting the deadline