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CS 325: CS Hardware and Software
Organization and Architecture
Exam 1: Study Guide
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Computer Architecture and
Organization
 Computer
Architecture
 Attributes
of the computer that are visible to the
programmer.
 Instruction set
 Techniques for addressing memory
 Computer
 Hardware
Organization
details transparent to the programmer
 Control signals
 Bus interfaces
 Memory type
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Basic Structure of Computers
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 CPU – controls the operation of
There are four
main structural
components
of the computer:
the computer and performs its
data processing functions
 Main Memory – stores data
 I/O – moves data between the
computer and its external
environment
 System Interconnection –
some mechanism that provides
for communication among CPU,
main memory, and I/O
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 Number
Number Systems
Representation
 Decimal
 Binary
 Hexadecimal
 Decimal
vs. Hexadecimal vs. Binary
 Number
Conversions
 Dec
 Bin, Dec  Hex
 Bin  Dec, Bin  Hex
 Hex  Dec, Hex  Bin
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Decimal Numbers: Base 10

Digits: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9

Example:
4923 =
(4x103) + (9x102) + (2x101) + (3x100)
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Binary Numbers: Base 2

Digits: 0, 1
Example:
101011=
(1x25) + (0x24) + (1x23) + (0x22) + (1x21) + (1x20)
32
16
8
4
2
1
25
24
23
22
21
20
1
0
1
0
1
1
= 4310
 What about a base that converts to binary easily?
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Hexadecimal Numbers: Base 16

Digits:
0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, F
 Decimal digits + A – F
A
B
C
D
E
F
10
11
12
13
14
15
Example:
12E =
(1x162) + (2x161) + (Ex160) = 30210
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Decimal vs. Hexadecimal vs. Binary
DEC
HEX
BIN
DEC
HEX
BIN
0
0
0000
16
10
0001 0000
1
1
0001
17
11
0001 0001
2
2
0010
18
12
0001 0010
3
3
0011
19
13
0001 0011
4
4
0100
20
14
0001 0100
5
5
0101
21
15
0001 0101
6
6
0110
22
16
0001 0110
7
7
0111
23
17
0001 0111
8
8
1000
24
18
0001 1000
9
9
1001
25
19
0001 1001
10
A
1010
26
1A
0001 1010
11
B
1011
27
1B
0001 1011
12
C
1100
28
1C
0001 1100
13
D
1101
29
1D
0001 1101
14
E
1110
30
1E
0001 1110
15
F
1111
31
1F
0001 1111
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Number Conversion: Dec  Bin

Converting from base 10 to base 2:
Continue dividing decimal number by
2 and keep the remainder
Example:
1000112
3510
35/2
17
1
17/2
8
1
8/2
4
0
4/2
2
0
2/2
1
0
1/2
0
1
LSB
MSB
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Number Conversion: Dec  Hex

Converting from base 10 to base 16:

Example:
2316
3510
35/16
2
3
LSB
2/16
0
2
MSB
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Number Conversion: Bin  Dec

Converting from base 2 to base 10:

Example: 110102
(1x24) + (1x23) + (0x22) + (1x21) + (0x20)
16 + 8 + 0 + 2 + 0 = 2610
16
8
4
2
1
1
1
0
1
0
MSB
LSB
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Number Conversion: Bin  Hex

Converting from base 2 to base 16:

Example: 110101102



1 Hex digit represents 16 Decimal values
4 Binary digits represent 16 Decimal values
1 Hex digit replaces 4 Binary digits
1
1
0
1
0
13  D
1
1
6
D616
0
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Number Conversion: Hex  Dec

Converting from base 16 to base 10:

Example: 8E316
(8x162) + (Ex161) + (3x160)
2048 + 224 + 3 = 227510
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Number Conversion: Hex  Bin

Converting from base 16 to base 2:

Example: 9A2E16
9
1001
A
1010
2
0010
E
1110
10011010001011102
MSB
LSB
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The Transistor

A controlled switch.
 Collector
– positive lead
 Emitter – negative lead
 Base – control lead
A
binary “1” represents an active
transistor.
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Representing Signed Numbers
3
ways for handling negative numbers
 Sign
and Magnitude
 1’s Complement
 2’s Complement
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Sign and Magnitude

Easiest solution: Define leftmost bit
to be the sign bit.
0
 positive number, 1  negative number
 Other bits represent numerical value of number
 32-bit
example:
0000 0000 0000 0000 0000 0000 0000 0001  +110
1000 0000 0000 0000 0000 0000 0000 0001  -110
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Convert Decimal to Sign and
Magnitude:

S&N requires two things:
Sign: 0  positive, 1  negative
 Magnitude: value to be represented

 16-bit
Example: +7410
0000 0000 0100 1010
 16-bit
Example: -7410
1000 0000 0100 1010
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Convert Sign and Magnitude to
Decimal:

8-bit Example: 1000 01112,
-710
 Another
Example: 1000 00002
0000 00002
Produces: -0 and +0
problems with this?
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1’s Complement

4-bit
Example:
 1’s
Pos
Neg
0
0000
1111
1
0001
1110
2
0010
1101
3
0011
1100
4
0100
1011
5
0101
1010
6
0110
1001
7
0111
1000
comp representation of a 4 bit number
2n-1-1 positive numbers
 2n-1-1 negative numbers

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Converting Decimal to 1’s Comp

Example 8-bit: -4810
 First, convert
to Binary 8-bits:
0011 00002
 Next, compliment the bits:
1100 11112
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Converting 1’s Comp to Decimal

Example 8-bit: 1101 11102
 MSB
is 1 so compliment the bits:
0010 00012
 Next, convert to Base 10:
3310
 Since
the MSB is 1, the Base 10 value is
negative:
-3310
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2’s Complement Number Line

2N-1-1 Pos Nums
2N-1
1
Neg Nums
zero
Must
specify width
 8-bits, 16-bits, 32-bits
Overflow?
 More
on this later
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2’s Complement 24 bits
2’s Comp
Decimal
0111
7
0110
6
0101
5
0100
4
0011
3
0010
2
0001
1
0000
0
1111
-1
1110
-2
1101
-3
1100
-4
1011
-5
1010
-6
1001
-7
1000
-8
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Converting Decimal to 2’s Comp

Example 8-bit: -2710
 First, convert
to Binary 8-bits:
0001 10112
 Next, 1s comp:
1110 01002
 Add 1 to 1s comp value:
1110 01002
+0000 00012
1110 01012
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Converting from 2s Comp to
Decimal

Algorithm for Converting 2s Comp to
Decimal:
 If
the MSB is 1, perform 1s comp and
add 1. If the MSB is 0, go to next step.
 Convert the result to Base 10. This
value should be positive.
 If the MSB was 1, add the negative sign
to the Base 10 number.
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Converting 2’s Comp to Decimal

Example 8-bit: 1010 10102
 MSB
is 1 so compliment the bits:
0101 01012
 And add 1:
0101 01012
+0000 00012
0101 01102
 Since
the MSB is 1, the Base 10 value is
negative:
-8610
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2’s Comp Overflow

Rules for detecting 2s Comp overflow:
If
the sum of two Pos numbers yields a
Neg result, the sum has overflowed.
If
the sum of two Neg numbers yields
a Pos result, the sum has overflowed.
Otherwise, the
overflowed.
sum has not
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2’s Comp Overflow Examples

-39 + 92 = 53
11 11
11011011
+0 1 0 1 1 1 0 0
00110101
Carryout without overflow. Sum is correct
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2’s Complement Binary
Subtraction
 Example:

Subtract 7 from 2 (2 – 7):
 Convert to 4-bit 2s comp:
 7  0111
 2  0010
 Perform 2s comp on 7:
 0111  1001
 Now add:
0010
+1 0 0 1
1011
The value 1011 represented in 2’s comp converts to
-510

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Unsigned Binary Multiplication

Quite Easy.

Rules to remember:
 0*1=0
 1*1=1
 Same as logical “and” operation

Multiplying an m-bit number by and n-bit number results in
an n+m-bit number. This n+m-bit width ensures overflow
cannot occur.

Simple Example: m = n = 2

2x3 = 6
 102 x 112 = 1102
 Largest 2-bit value: 11 or 310
 112 x 112 = 10012 or 910
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Unsigned Binary Multiplication

Example:
1010
x0 1 1 0
0000
1010
1010
+0 0 0 0______
0111100
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2’s Complement Binary
Multiplication

Still Easy:
 Only
difference between 2’s comp
multiply and unsigned multiply:
 Sign extend both values to twice as
many bits.
Ex:
1100 
11111100
x0 1 0 1 
x0 0 0 0 0 1 0 0
 The result will be stored in m+n least
significant bits.
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2’s Complement Binary
Multiplication – Booth’s Algorithm

Multiplication by bit shifting and addition.


Removes the need for multiply circuit
Requires:
 A way to compute 2’s Complement
 Available as fast hardware instructions
 X86 assembly instruction: NEG
 A way to compare two values for equality
A
B
A
 How to do this quickly?
0
0
Exclusive Not OR (NXOR) Gate
Compare all sequential bits of bit string A
0
1
and bit string B. Values are equal if the
1
0
comparison process produces all 1s.
 A way to shift bit strings.
1
1
 Arithmetic bit shift, which preserves the sign bit when shifting to the
right.
10110110
arithmetic shift right
11011011
 x86 assembly instruction: SAR
NXOR B
1
0
0
1
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2’s Complement Binary
Multiplication – Booth’s Algorithm

If the LSB of X is 1, and X-1 is 0, we subtract Y from U.

If LSB of X is 0, and X-1 is 1, then we add Y to U.

If both LSB of X and X-1 are equal, do nothing and skip to shifting stage.
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2’s Complement Binary
Multiplication – Booth’s Algorithm
U
V
X
X-1
0: 0000
0000
1100
0
1: 0000
0000
0110
0
2: 0000
0000
0011
0
3: 1100
1000
1001
1
4: 1110
0100
1100
1
+1001
1001

Result of 7 x -4: UV
11100100  00011100  -2810
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Sign Extension
Convert
2’s comp number using N bits
to more than N bits (int to long int):
 Replicate
the MSB (sign bit) of the smaller
number to fill new bits.
 2’s comp positive number has infinite 0s
 2’s comp negative number has infinite 1s
 Ex: 16bit
-410 to 32-bit:
1111 1111 1111 1100
1111 1111 1111 1111 1111 1111 1111 1100
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Combinational Logic
 Translates
a set of N input variables(0
or 1) by a mapping function.

Uses Boolean operations to produce a set of M output
variables (0 or 1).
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Boolean Functions
 A combination of Boolean operators
𝐹1 𝐴, 𝐵, 𝐶 = 𝐴 + 𝐵𝐶
𝐹2 𝐴, 𝐵, 𝐶 = 𝐴𝐵𝐶 + 𝐴𝐵𝐶 + 𝐴𝐵𝐶 + 𝐴𝐵𝐶 = 𝐶
*Minimizing techniques shown later
 Remember:
+ operator means OR, no operator
(ABC) means AND, or multiply.
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Boolean Function from Truth Table

A Boolean algebra function can be
derived from any truth table.


For each 1 in result, AND the row values.
Then OR those values
 Example:
A
B
X
0
0
1
0
1
0
1
0
1
1
1
0
AND these rows: 𝑨𝑩
𝑨𝑩
Then OR them: 𝑨𝑩 + 𝑨𝑩
𝑿 = 𝑨𝑩 + 𝑨𝑩
Sum-of-product (sop) form for
function
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Boolean Function from Truth Table

Draw circuit for function:
𝑿 = 𝑨𝑩 + 𝑨𝑩
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Digital Logic

Sum of Products (SOP)
Fan-in, Fan-out
Cascading
Boolean
Gate
to Reduce Inputs
Algebra Laws
Reduction using Boolean
Algebra
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Logic Gate Fan-n and Fan-out
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Gate Cascading to Reduce Inputs
Implementing 3-input AND and OR functions with 2-input gates
ABC = (AB)C
A+B+C = (A+B)+C
Implementing a 3-input NAND function with 2-input gates.
NO!
Correct
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Basic Laws of Boolean Algebra

Boolean Algebra follows many algebra rules which can be
used to make simpler circuits.
Name
AND Form
OR Form
Identity Law
1𝐴 = 𝐴
0+𝐴=𝐴
Null Law
0𝐴 = 0
1+𝐴 =1
Idempotent Law
A𝐴 = 𝐴
A+𝐴=𝐴
A𝐵 = 𝐵𝐴
𝐴+𝐵 =𝐵+𝐴
Associative Law
𝐴𝐵 𝐶 = 𝐴(𝐵𝐶)
𝐴 + 𝐵 + 𝐶 = 𝐴 + (𝐵 + 𝐶)
Distributive Law
A + 𝐵𝐶 = (𝐴 + 𝐵)(𝐴 + 𝐶)
A 𝐵 + 𝐶 = 𝐴𝐵 + 𝐴𝐶
Absorption Law
A(𝐴 + 𝐵) = 𝐴
A + 𝐴𝐵 = 𝐴
De Morgan’s Law
𝐴𝐵 = 𝐴 + 𝐵
𝐴 + 𝐵 = 𝐴𝐵
Commutative Law

Example: AB + AC

= A(B + C), Distributive Law
Three gates
Two gates
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Gate Reduction

AB + AC
Three gates

= A(B + C), Distributive Law Two gates
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Functionally Complete Sets of
Gates

Not all gate types are typically implemented in circuit
design.

Simpler if only 1 or 2 types of gates are used.

A functionally complete set of gates means that any Boolean
function can be implemented using only the gates in that set.

Examples of functionally complete sets:

AND, OR, NOT

AND, NOT

OR, NOT

NAND

NOR
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Simplification

Boolean functions, and therefore circuits, can usually be
manipulated using Boolean laws into simpler functions.
𝐴 + 𝐵 𝐴 + 𝐵 = 𝐴𝐴 + 𝐴𝐵 + 𝐵𝐴 + 𝐵𝐵 Distributive Law

= 𝐴 + 𝐴𝐵 + 𝐵𝐴 + 0
Inverse Law
= 𝐴 + 𝐴(𝐵 + 𝐵)
Distributive Law
= 𝐴 + 𝐴(1)
Inverse Law
=𝐴 1
Idempotent Law
=𝐴
Identity Law
How to check for correctness?
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Checking Logic for Correctness

We can check our solution using a truth table

Checking
𝐴+𝐵 𝐴+𝐵 =A
𝐀
𝑩
𝑨+𝑩 𝑨+𝑩
𝑨+𝑩 𝑨+𝑩
𝐀
0
0
0
1
0
0
0
1
1
0
0
0
1
0
1
1
1
1
1
1
1
1
1
1
Correct
+
Another Example

Draw the logic gate diagram for the following Boolean function:
𝑍(𝑌 + 𝑍)(𝑋 + 𝑌 + 𝑍)

Circuit Reduction:
𝑍(𝑌 + 𝑍)(𝑋 + 𝑌 + 𝑍) = (ZY + ZZ)(X + Y + Z) Distributive Law
= (ZY + Z)(X + Y + Z)
Idempotent Law
= Z(X + Y + Z)
Absorption Law
= 𝑍𝑋 + 𝑍𝑌 + 𝑍𝑍

Distributive Law
= 𝑍𝑋 + 𝑍𝑌 + 𝑍
Idempotent Law
= 𝑍𝑋 + 𝑍
Absorption Law
=𝑍
Absorption Law
Check with Truth table for correctness.
+
Converting Boolean Functions to
Standard SOP


Example:
Each product term in an SOP expression that does not
contain all variables in the domain can be expanded to
standard SOP.


A + AB
Use rule: 𝐴 + 𝐴 = 1
Multiply each nonstandard product term by a term made up
of the sum of the missing variable.

𝐴 + 𝐴𝐵 = 𝐴 𝐵 + 𝐵 + 𝐴𝐵

= 𝐴𝐵 + 𝐴𝐵 + 𝐴𝐵
+
Converting Boolean Functions to
Standard SOP

Example:

𝐴𝐵 + 𝐵𝐶
Use rule: 𝐴 + 𝐴 = 1
= 𝐴𝐵 𝐶 + 𝐶 + 𝐵𝐶
= 𝐴𝐵𝐶 + 𝐴𝐵 𝐶 + 𝐵𝐶
= 𝐴𝐵𝐶 + 𝐴𝐵 𝐶 + 𝐵𝐶(𝐴 + 𝐴)
= 𝐴𝐵𝐶 + 𝐴𝐵 𝐶 + 𝐴𝐵𝐶 + 𝐴𝐵𝐶

Using Standard SOP, we can construct the truth table for the
Boolean function.
+
Sum-of-Products
SOP form (standard):


We can use standard SOP to express a sum of minterms who’s
product produces an output of 1.
A
B
C
0
0
0
0
0
0
1
0
0
1
0
1
0
1
1
1
1
0
0
0
1
0
1
0
1
1
0
1
1
1
1
0
𝑭 𝑨, 𝑩, 𝑪
𝑭 = 𝑨𝑩𝑪 + 𝑨𝑩𝑪 + 𝑨𝑩𝑪
010
𝑭=
011
𝒎 𝟐, 𝟑, 𝟔
110
+
Product-of-Sums
POS form (standard):


We can use standard POS to express a product of minterms who’s
sum produces an output of 0.
A
B
C
0
0
0
0
0
0
1
1
0
1
0
1
0
1
1
1
1
0
0
1
1
0
1
1
1
1
0
1
1
1
1
0
𝑭 𝑨, 𝑩, 𝑪
𝑭 = 𝑨 + 𝑩 + 𝑪 (𝑨 + 𝑩 + 𝑪)
000
𝑭=
𝒎(𝟎, 𝟕)
111
+
Karnaugh Maps
Special

form of a given truth table.
Useful for reducing logic functions into minimal Boolean
expressions.
A
B
X
0
0
0
0
1
1
1
0
1
1
1
0
B

A
0
1
0
0
1
1
1
0
+
Karnaugh Maps 4-Variables
 Convert
the following 4-variable truth table to its
Karnaugh map equivalent:
A
B
C
D
X
0
0
0
0
0
0
0
0
1
0
0
0
1
0
0
0
0
1
1
1
0
1
0
0
1
0
1
0
1
1
0
1
1
0
0
0
1
1
1
0
1
0
0
0
1
0
0
1
0
1
CD
00
01
10
11
00
0
0
0
1
01
1
1
0
0
1
10
1
0
0
1
1
0
1
0
0
11
1
0
0
1
0
1
1
1
1
1
0
0
1
1
1
0
1
0
1
1
1
0
0
1
1
1
1
1

AB
+

Exam 1 format
Five questions
 Covers
material from lecture 1 through lecture 8
 May have multiple components (a, b, c, …)
 Circle one you want to omit
 Exam graded out of 4 equally weighted questions
You
may bring one 3” x 5” note card for help
on the exam
 No
calculators!