Power-Aware Computing 101
CS 771 – Optimizing Compilers
Fall 2005 – Lecture 22
Today
• Quick intro to power-aware computing
Special thanks to David Brooks!

• Paper discussion
Heath et al., "Code Transformations for EnergyEfficient Device Management", 2004.
2. Hsu and Kremer, "The Design, Implementation,
and Evaluation of a Compiler Algorithm for CPU
Energy Reduction", 2003.
1.
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Why Worry about Power Dissipation?
Battery
life
Thermal issues: affect
cooling, packaging,
reliability, timing
Environment
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1000
Power Density (W/cm
2
)
Power Dissipation Trends
Nuclear Reactor
100
Pentium 4 (Prescott)
Pentium 4
Pentium 3
Hot Plate
Pentium 2
10
Pentium Pro
Pentium
1
1980
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386
486
1990
2000
2010
4
Cooking-Aware Computing
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Where Does the Juice Go in Laptops?
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Environment
• Environment Protection Agency (EPA): computers consume
•
•
•
•
•
10% of commercial electricity consumption
 This incl. peripherals, possibly also manufacturing
 A DOE report suggested this percentage is much lower (3.03.5%)
 No consensus, but it’s still a lot
 Interesting to look at the numbers:
 http://enduse.lbl.gov/projects/infotech.html
Data center growth was cited as a contribution to the
2000/2001 California Energy Crisis
Equivalent power (with only 30% efficiency) for AC
CFCs used for refrigeration
Lap burn
Fan noise
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Now We Know Why Power is Important
• What can we do about it?
• Two components to the problem:




#1: Understand where and why power is
dissipated
#2: Think about ways to reduce it at all levels of
computing hierarchy
In the past, #1 is difficult to accomplish except at
the circuit level
Consequently most low-power efforts were all
circuit related
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Power: The Basics
• Dynamic “switching” power vs. Static “leakage” power
Dynamic power dominates, but static power increasing
in importance
 Trends in each
Static power: steady, per-cycle energy cost
Dynamic power: capacitive and short-circuit
 Capacitive power: charging/discharging at transitions
from 01 and 10
 Short-circuit power: power due to brief short-circuit
current during transitions.
 Most research focuses on capacitive, but recent work
on others

•
•
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Power Issues in Microprocessors
Capacitive (Dynamic) Power
Static (Leakage) Power
Vdd
VIN
Vin
VOUT
Vout
ISub
IGate
CL
CL
Di/Dt (Vdd/Gnd Bounce)
Voltage (V)
Current (A)
Temperature
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20 cycles
Minimum Voltage
10
Capacitive Power Dissipation
Capacitance:
Function of wire
length, transistor size
Supply Voltage:
Has been dropping
with successive fab
generations
Power ~ ½ CV2Af
Activity factor:
How often, on average,
do wires switch?
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Clock frequency:
Increasing…
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Lowering Dynamic Power
• Reducing Vdd has a quadratic effect

Has a negative (~linear) effect on performance
however
• Lowering CL
May improve performance as well
 Keep transistors small (keeps intrinsic
capacitance (gate and diffusion) small)

• Reduce switching activity



A function of signal transition stats and clock rate
Clock gating idle units
Impacted by logic and architecture decisions
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Power vs. Energy
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Power vs. Energy
• Power consumption in watts


Determines battery life in hours
Sets packaging limits
• Energy efficiency in joules



Rate at which energy is consumed over time
Energy = power * delay (joules = watts * seconds)
Lower energy number means less power to
perform a computation at same frequency
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Power vs. Energy Metrics
• Power-delay Product (PDP) = Pavg * t

PDP is the average energy consumed per
switching event
• Energy-delay Product (EDP) = PDP * t

Takes into account that one can trade
increased delay for lower energy/operation
• Energy-delay2 Product (EDDP) = EDP * t



Why do we need so many formulas?!!?
We want a voltage-invariant efficiency metric!
Why?
Power ~ ½ CV2Af, Performance ~ f (and V)
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On to the Discussion…
1. Heath et al., "Code Transformations for EnergyEfficient Device Management", 2004.
2. Hsu and Kremer, "The Design, Implementation, and
Evaluation of a Compiler Algorithm for CPU Energy
Reduction", 2003.
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