Semiconductor Device Modeling
and Characterization – EE5342
Lecture 10– Spring 2011
Professor Ronald L. Carter
ronc@uta.edu
http://www.uta.edu/ronc/
First Assignment
• e-mail to listserv@listserv.uta.edu
– In the body of the message include
subscribe EE5342
• This will subscribe you to the EE5342
list. Will receive all EE5342 messages
• If you have any questions, send to
ronc@uta.edu, with EE5342 in
subject line.
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Second Assignment
• Submit a signed copy of the document
that is posted at
www.uta.edu/ee/COE%20Ethics%20Statement%20Fall%2007.pdf
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Additional University Closure
Means More Schedule Changes
• Plan to meet until noon some days in
the next few weeks. This way we will
make up for the lost time. The first
extended class will be Monday, 2/14.
• The MT changed to Friday 2/18
• The P1 test changed to Friday 3/11.
• The P2 test is still Wednesday 4/13
• The Final is still Wednesday 5/11.
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MT and P1 Assignment on
Friday, 2/18/11
• Quizzes and tests are open book
– must have a legally obtained copy-no
Xerox copies.
– OR one handwritten page of notes.
– Calculator allowed.
• A cover sheet will be published by
Wednesday, 2/16/11.
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Ideal Junction
Theory
•
•
•
•
•
Assumptions
Ex = 0 in the chg neutral reg. (CNR)
MB statistics are applicable
Neglect gen/rec in depl reg (DR)
Low level injections apply so that
dnp < ppo for -xpc < x < -xp, and
dpn < nno for xn < x < xnc
Steady State conditions
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Forward Bias Energy Bands

nnon equil  ni expEFn  EFi  / kT   dn p  n p 0 eVa Vt  1
q(Vbi-Va)
Imref, EFn
Ec
EFN
EFi
EFP qVa
Imref, EFp




pnon equil  ni exp EFi  EFp / kT  dpn  pn 0 eVa
-xpc
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-xp
0
xn

Ev
Vt
1
x

xnc
7
Law of the junction
(follow the min. carr.)
N N 


p


n
po
a
d   V ln
no .


Vbi  Vt ln

V
ln
t 
t 


 n2 
pno 
n

po


 i 
pno npo
 - Vbi 
,
Invert to get

 exp
ppo nno
 Vt 
pn np
 Va - Vbi 

and when Va  0,

 exp
pp nn
 Vt 
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Law of the
junction (cont.)
 So for pn  ppe
 We have pn 
Va -Vbi
Vt
npo
nno
ppo e
and npo  nno e
Va
Vt

 the Law of the Junction

Va
pnnn x  ni2e Vt ,
n


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
also ppnp
ni2
nno
e
xp
Vbi

Vt
Va
Vt
Va
 ni2e Vt
9
Law of the
junction (cont.)
 Switched to non - eq. not'n for Va  0 .
 So pn  pno  dpn , nn  nno  dnn ,
and np  npo  dnp , pp  ppo  dpp .
 Assume dnn  dpn and dnp  dpp .
 Assume low - level injection 
dpp  ppo  Na and dnn  nno  Nd
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Injection
Conditions
 Va - Vbi 
 giving
 pno  dpn  ppo exp
 Vt 
 Va -Vbi 
 -Vbi 




 dpn  ppoe  Vt   pno , pno  ppoe  Vt  ,

 Va  
 so dpn  pno exp   1, at x  xn
 Vt  


 Va  
 sim. dnp  npo exp   1, at x   xp
V



t
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11
Ideal Junction
Theory (cont.)
Apply the Continuity Eqn in CNR

p dp 1
0

   Jp , - xpc  x   xp
t dt q
and

n dn 1
0

   Jn , xn  x   xnc
t dt q
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12
Ideal Junction
Theory (cont.)
dn
Since Ex  0 in the CNR, Jnx  qDn
dx
dp
and Jpx   qDp
giving
dx
d2 dpn 
dx2
2
dpn

 0, for xn  x  xnc , and
Dp p
 
d dnp
dx2
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
dnp
Dn n
 0, for - xpc  x   xp
13
Ideal Junction
Theory (cont.)
2
2
Define Ln  Dn n and Lp  Dp p . So
dpn  x   Ae
x
Lp
 Be
x
dnp  x   Ce Ln  De
x
x
Lp
, xn  x  xnc
Ln , - x  x   x .
pc
p




dpn xn  dnp  xp
with B.C.

 eVa Vt  1 ,
pno
npo


and dpn xnc   dnp  xpc  0, (contacts)
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Excess minority
carrier distr fctn
For xn  x  xnc , Wn  xnc  xn ,



sinh xnc  x  Lp  Va V
 e t  1
dpn  x   pno


sinh Wn Lp


and for - xpc  x  xp , Wp  xpc  xp ,



 


sinh x  xpc Ln  Va V
 e t  1
dnp  x   npo


sinh Wp Ln


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
Carrier Injection
ln(carrier conc)
ln Na
ln Nd
 Va V

t

dnp  xp  npo e
 1






 Va V

t
dpn xn   pno  e
 1




ln ni
~Va/Vt
~Va/Vt
ln ni2/Nd
ln ni2/Na
-xpc
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-xp
0
xn
x
xnc
16
Minority carrier
currents ddpn 
Jp  x   qDp
2
qni Dp

dx
, for xn  x  xnc


cosh xnc  x  Lp  Va V
 e t  1



NdLp
sinh Wn Lp


Jn  x   qDn

 
d dnp
dx


, for - xpc  x  xp
 


cosh x  xpc Ln  Va V
 e t  1



NaLn
sinh Wp Ln


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qni2Dn

17
Evaluating the
diode current
Assu min g no gen/rec in DR, then

 Va V
J  Jp xn   Jn  xp  Js  e t  1 




where Js  Jsn  Jsp with definitions

Jsn / sp 
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2
qni

Dn / p
Na / dLn / p

coth Wp / n Ln / p

18
Special cases for
the diode current
Long diode : Wn  Lp , or Wp  Ln
Jsn 
2
qni
Dn
2 Dp
, and Jsp  qni
NaLn
NdLp
Short diode : Wn  Lp , or Wp  Ln
Jsn 
qni2
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Dn
2 Dp
, and Jsp  qni
NaWp
NdWn
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Ideal diode
equation
• Assumptions:
–
–
–
–
–
low-level injection
Maxwell Boltzman statistics
Depletion approximation
Neglect gen/rec effects in DR
Steady-state solution only
• Current dens, Jx = Js expd(Va/Vt)
– where expd(x) = [exp(x) -1]
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Ideal diode
equation (cont.)
• Js = Js,p + Js,n = hole curr + ele curr
Js,p = qni2Dp coth(Wn/Lp)/(NdLp)
= qni2Dp/(NdWn), Wn << Lp, “short”
= qni2Dp/(NdLp), Wn >> Lp, “long”
Js,n = qni2Dn coth(Wp/Ln)/(NaLn)
= qni2Dn/(NaWp), Wp << Ln, “short”
= qni2Dn/(NaLn), Wp >> Ln, “long”
Js,n << Js,p when Na >> Nd
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Diffnt’l, one-sided
diode conductance
Static (steadystate) diode I-V
characteristic
 Va 
ID  Is exp d 
 Vt 
ID
 dID 
gD  

dV
 a  VQ
IQ
Va
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VQ
22
Diffnt’l, one-sided
diode cond. (cont.)
ID  JA  JsA exp dVa Vt   Is exp dVa Vt 


Is exp VQ Vt
 dID 
gd VQ  

. If Va  Vt ,

Vt
 dVa  VQ
 
 
then gd VQ 
IDQ
 
, where IDQ  ID VQ .
Vt
Vt
1
The diode resistance, rd VQ 

gd IDQ
 
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Charge distr in a (1sided) short diode
dpn
Wn = xnc- xn • Assume Nd << Na
dpn(xn)
Q’p
x
x
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n
xnc
• The sinh (see L12)
excess minority
carrier distribution
becomes linear for
Wn << Lp
dpn(xn)=pn0expd(Va/Vt)
• Total chg = Q’p = Q’p =
qdpn(xn)Wn/2
24
Charge distr in a 1sided short diode
dpn dp (x ,V +dV) • Assume Quasi-static
n n a
dpn(xn,Va)
dQ’p
Q’p
charge distributions
• Q’p = Q’p =
qdpn(xn)Wn/2
• ddpn(xn) = (W/2)*
{dpn(xn,Va+dV)
- dpn(xn,Va)}
x
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x
xnc
25
Cap. of a (1-sided)
short diode (cont.)
Qp  Q'p A, A  diode area. Define Cd 
dQp
dVa

d  qApn0 Wn
 qAdpn (xn )Wn 




exp
d
V
V



a t 
2
2


 dVa 
IDQ Wn2 IDQ
When Va  Vt , Cd VQ 

transit .
Vt 2Dp
Vt
d
dVa
 
xnc
dpn
Wn2
So, rd VQ Cd VQ  transit   q
dx 
2Dp
xn J p
   
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General timeconstant
For all diodes, long or short, the conductance
 
gd VQ


 d Jn  Jp 
 dID 

 A
  gn  gp

 dVa  VQ
 dVa
 VQ
There is always a characteristic time so that
dQp
dQn
pgp  Cp 
, and n gn  Cn 
, and the
dVa
dVa
total diode capacitance C  Cp  Cn
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General timeconstant (cont.)
For the short diode side, p  p,trans

Wn2
,
2Dp
and n  n,trans 
2
Wp
2Dn
, the
physical charge transit times. For the
long diode side, p  p0 and n  n0 ,
the respective min. carr. life - times.
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General timeconstant (cont.)
Practical diodes are usually one - sided
The effective transition time is the
1
1
1
average given by


and
F min  transit
Cd  gd F
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References
*Fundamentals of Semiconductor Theory and Device
Physics, by Shyh Wang, Prentice Hall, 1989.
**Semiconductor Physics & Devices, by Donald A.
Neamen, 2nd ed., Irwin, Chicago.
M&K = Device Electronics for Integrated Circuits,
3rd ed., by Richard S. Muller, Theodore I. Kamins, and
Mansun Chan, John Wiley and Sons, New York, 2003.
• 1Device Electronics for Integrated Circuits, 2 ed., by
Muller and Kamins, Wiley, New York, 1986.
• 2Physics of Semiconductor Devices, by S. M. Sze,
Wiley, New York, 1981.
• 3 Physics of Semiconductor Devices, Shur, PrenticeHall, 1990.
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