Managing Performance and Efficiency of
a Processor
Master’s Project Defense
Aditi Shinde
Advisor: Dr. Vishwani Agrawal
Committee: Dr. Adit Singh and Dr. Victor Nelson
Department of Electrical and Computer Engineering
Auburn University
November 1, 2012
Aditi Shinde: MEE Project Defense
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OUTLINE








Motivation
 Chip Power Density
 System Optimization Triangle
Performance
 Characteristic of a Performance Metric
 Existing Metrics
Energy Efficiency
 Energy Efficiency Metrics
 Problem Statement
 Proposed Work
Characterization of Intel Pentium M
 Cycle Efficiency
 Cycle Efficiency and Performance
Conclusion
Limitations
Future Work
References
November 1, 2012
Aditi Shinde: MEE Project Defense
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MOTIVATION
VLSI Chip Power Density
Sun’s
Surface
Power Density (W/cm2)
10000
Rocket
Nozzle
1000
Nuclear
Reactor
100
8086
Hot Plate
10 4004
8008 8085
386
286
8080
1
1970
1980
P6
Pentium®
486
1990
Year
2000
2010
Source: Patrick P. Gelsinger , Keynote, ISSCC, Feb. 2001
November 1, 2012
Aditi Shinde: MEE Project Defense
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MOTIVATION (CONTINUED)
System Optimization Triangle
Performance
Power
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Area
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PERFORMANCE

How fast is your computer ?
1
 Performance =
Execution Time
Source: D. A. Patterson and J. L. Hennessy, Computer Organization & Design, the hardware/Software Interface,
Fourth Edition, San Francisco, California: Morgan Kaufman Publishers, Inc., 2008.
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CHARACTERISTIC OF A PERFORMANCE
METRIC

Linearity

Reliability

Repeatability

Easiness of measurement

Consistency

Independence
Source: D. J. Lilja, ”Measuring Computer Performance: A Practitioner’s Guide”, Cambridge University Press, New York, NY,
2000
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EXISTING PERFORMANCE METRICS
Clock Rate
 MIPS
 MFLOPS
 SPEC
 QUIPS
 Synthetic Benchmarks
 Execution Time

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ENERGY EFFICIENCY

Performance achieved per unit power.

Useful in determining battery life of a computer
system.
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ENERGY EFFICIENCY METRICS

Et2 Energy and Time (square) Product

Power × Time (Energy per Operation)
Source: M. Hicks,” Energy Efficient Branch Prediction” in Doctor of Philosophy thesis, University of
Hertfordshire, Dec. 2007
November 1, 2012
Aditi Shinde: MEE Project Defense
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PROBLEM STATEMENT

Given a limited source of energy, can we
determine the number of cycles (and hence the
number of instructions) that can be executed
for a given processor?
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PROPOSED WORK

We characterize the Intel Pentium M processor
and define a new metric called ‘Cycle
Efficiency’ and analyze it.
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ENERGY PER CYCLE OF 8 BIT ADDER

Source: K. Kim, “Ultra Low Power CMOS Design” in Doctor of Philosophy’s dissertation, Auburn University, Dept.
of ECE, Auburn, Alabama, May 2011.
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ENERGY PER CYCLE FOR INTEL PENTIUM M
120
100
Energy per cycle (nJ)
80
60
40
20
0
0
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0.2
0.4
0.6
0.8
Vdd in Volts
1
Aditi Shinde: MEE Project Defense
1.2
1.4
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CYCLE EFFICIENCY

We define new metric, cycle efficiency as

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Energy per Cycle
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0.7
1.4
0.6
1.2
0.5
1
0.4
0.8
0.3
0.6
0.2
0.4
0.1
0.2
0
Frequency (GHz)
Cycle Efficiency (1/nJ)
 and FREQUENCY vs. VOLTAGE
Cycle Efficiency
Frequency
0
0
0.2
0.4
0.6
0.8
1
1.2
1.4
Vdd (Volts)
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EXAMPLE

For a program that executes in 1.3 billion clock cycles.
Voltage
Frequency
Cycle Efficiency
Time
1.2 V
1.3 GHz
15 megacycles/joule 1 seconds
Total Energy
Consumed
86.7 Joules
Fastest !
0.6 V
350 MHz
70 megacycles/joule 4 seconds
18.6 Joules
200 mV
100 MHz
660
megacycles/joule
1.97 Joules
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Aditi Shinde: MEE Project Defense
Lowest Power
Consumption !
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CYCLE EFFICIENCY V/S FREQUENCY PLOT
Cycle Efficiency v/s Frequency

350
Cycle Efficiency (Mega cycles/joule)
300
250
200
150
Cycle Efficiency v/s Frequency
100
50
0
0
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500
1000
Frequency (MHz)
1500
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

vs. PERFORMANCE
f
Performance =
C
Say, Time factor =

1
f
Energy Efficiency =
=
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1
C * EPC
η
C
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CONCLUSION

Performance proportional to Time Factor.

Energy Efficiency proportional to Cycle
Efficiency.

Role played is analogous.
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CONCLUSION

Number of cycles that can be completed per
given energy resource can be determined.

Number of instructions and hence what part of
the program that can be executed knowing the
cycles taken per instruction can be determined.
November 1, 2012
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LIMITATIONS

Power values are benchmark program
dependent.

‘Almost Perfect Approximation’ by curve fitting
and trend line insertion techniques.
November 1, 2012
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FUTURE WORK

Running benchmark programs on actual
processor and finding the energy per cycle.

Averaging values over number of benchmark
programs to reduce program dependency.
November 1, 2012
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FUTURE WORK

Other approaches, like using the Alpha Power
Law Model for MOSFETS can also be used for
characterization.

Designing a method where operating points
between ‘best energy efficient’ and ‘best
performance’ can be derived depending on our
requirements.
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REFERENCES
1.
2.
3.
4.
5.
6.
Synopsys, Inc., “HSPICE User Guide: Simulation and Analysis”, www.synopsys.com.
H. Hanson, K. Rajamani, S. Keckler, F. Rawson, S. Ghiasi, J. Rubio, “Thermal
Response to DVFS: Analysis with an Intel Pentium M,” In Proceedings of International
Symposium on Low Power Electronics and Design, August 27–29, 2007, Portland,
Oregon, pp. 219-224
M. Hicks,” Energy Efficient Branch Prediction” in Doctor of Philosophy thesis,
University of Hertfordshire, Dec. 2007.
D. J. Lilja, ”Measuring Computer Performance: A Practitioner’s Guide,” Cambridge
University Press, New York, NY, 2000.
K. Kim, “Ultra Low Power CMOS Design,” Doctor of Philosophy’s dissertation, Auburn
University, Dept. of ECE, Auburn, Alabama, May 2011.
Patrick P. Gelsinger , Keynote, ISSCC, Feb. 2001.
November 1, 2012
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REFERENCES
7.
D. A. Patterson and J. L. Hennessy, Computer Organization & Design, the
Hardware/Software Interface, Fourth Edition, San Francisco, California: Morgan
Kaufman Publishers, Inc., 2008.
8. W. Zhao and Y. Cao, “New Generation of Predictive Technology Model for Sub-45nm
Early Design Exploration,“ IEEE Transactions on Electron Devices, vol. 53, no. 11,
pp. 2816–2823, 2006.
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QUESTIONS ?
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
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