Non-SULI Books and Other Scientific Materials (International Only

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Textbook Citations (non-SULI) = 47 (22.09.97)

This list includes textbooks outside the field of Computer Architecture, foreign thesis publications, and foreign univerity technical reports.

Non-SULI books = 20

1.

Tabak, Daniel, Multiprocessors , Prentice Hall, Englewood Cliffs, New Jersey, U.S.A., 1990., pp.22. (1)

2.

Wah, Bejamin, and Li, Guo-Jie, Computer for Artificial Intelligence Applications , IEEE Computer

Society, Washington, D.C., U.S.A., 1990., pp. 522-531. (1)

3.

Sami, Mariagiovanna, and Calzadilla-Daguerre, Jesus, Silicon Architectures for Neural Nets , North-

Holland, Amsterdam, Netherlands, 1990., pp. 283-304. (1)

4.

Turk, Stanko, Arhitektura i organizacija digitalnih računara , Školska knjiga, Zagreb, Hrvatska, 1988., pp. 254. (2)

5.

Ribarić, Slobodan, Naprednije arhitekture mikroprocesora , Školska knjiga, Zagreb, Hrvatska, 1990., pp. 198.

(2)

6.

Geddes, L.A., A Century of Progress: The History of Electrical Engineering at Purdue , Purdue

Research Foundation, West Lafayette, Indiana, U.S.A., 1988., pp. 264. (2)

7.

Paper:

Milutinović, V.M., Fura, D.A., Helbig, W.A., "An Introduction to GaAs Microprocessor Architecture for VLSI," IEEE Computer, Vol. 19, No. 3, March 1986, pp. 1221-1246. in:

Geideman, W.A., "A 32-Bit Microprocessor Implemented in GaAs JFET," Chapter #5 in

Microprocessor Design for GaAs Technology , Edited by Milutinović, V.M., Prentice-Hall, Englewood

Cliffs, New Jersey, USA, 1990. (1)

8.

Papers:

Milutinović, V.M., Editor, "Tutorial on Advanced Microprocessors and HLL Computer Architecture,"

IEEE CS PRESS, Los Alamitos, California, USA, 1986. and

Silbey, A., Milutinović, V.M., Mendoza-Grado, V., "A Survey of HLL Computer Architecures," IEEE

Computer, Vol. 19, No. 8, June 1986, pp. 72-85. in:

Furht, B., "Language-Directed CISC Architectures," Chapter #4 in HLL Computer Architecture , Edited by Milutinović, V.M., Freeman Computer Science Press, Rockville, Maryland, USA, 1989. (2)

9.

Papers:

Gimarc, C.E., Milutinović, V.M., "A Survey of RISC Processors and Computers of the Mid-1980s,"

IEEE Computer, Vol. 20, No. 9, September 1987, pp. 59-69. and

Milutinović, V.M., "A High-Level Language Architecture: Bit-Slice Based Processor and Associated

System Software," Microprocessing and Microprogramming, Vol. 12, No. 3/4, October/November

1983, pp. 143-152. and

Milutinović, V.M., Editor, "Special Issue on GaAs Microprocessor Architecture," IEEE Computer, Vol.

19, No. 10, October 1986. in:

Tabak, D., “Bit-Slice Systems,” Chapter #2 in Introduction to Microprogramming , Edited by

Milutinović, V., Prentice-Hall, New Jersey, USA, 1991 (3).

10.

James Nechvatal, "PUBLIC-KEY CRYPTOGRAPHY," NIST Special Publication 800-2, Security

Technology Group,

National Computer Systems Laboratory, National Institute of Standards and Technology, Gaithersburg,

MD 20899 http://csrc.ncsl.nist.gov/nistpubs/800-2.txt (1997)

Citation:

V. M. Milutinovic, Computer Architecture: Concepts and Systems. New York: North-Holland, 1988.

(1)

11.

"Closeup Corner" DACS Newsletter, Volume XI, Number 4, Summer 1993, Data & Analysis Center for Software http://www.utica.kaman.com/awareness/newsletters/summer93/closeup.html (1993)

Citation:

Antognetti, P. and Milutinovic, V., Eds. "Neural Networks: Concepts, Applications, and

Implementations." Volumes I-IV, Prentice Hall, Englewood Cliffs, NJ, 1991. (1)

12.

"CS251B -- PARALLEL COMPUTER ARCHITECTURES," UCLA Computer Science Department

Handbook http://www.cs.ucla.edu/csd/textpages/CS_Handbook_text.html (1997)

Citation:

[DENN88] J. Dennis, "Dataflow Computation: A Case Study," In Computer Architecture , V.

Milutinovic, ed., North Holland, 1988. (1)

13.

JOHN F. MCDONALD "F-RISC - A 1.0 GOPS FAST REDUCED INSTRUCTION SET COMPUTER

FOR SUPER WORKSTATION AND TERAOPS PARALLEL PROCESSOR APPLICATIONS

FINAL CONTRACT REPORT" U. S. ARMY RESEARCH OFFICE, http://inp.cie.rpi.edu/research/mcdonald/frisc/finalreports/summer96/fin007.html (1996)

Citation:

V. Milutinovic, Ed., "Microprocessor Design for GaAs Technology," Prentice Hall Advanced

Reference Series in Engineering, 1990. (1)

14.

"AT02.04 Computer Organization and Architecture 3(3-0)" http://www.cs.ait.ac.th/csinfo/courses.html

(1997)

Citation:

V.M. Milutinovic, Ed. (1987): Computer Architectures: Concepts and Systems, North Holland. (1)

Foreign Thesis Publications = 25

1.

Fura, D., Purdue University, 1985 (2)

2.

Bettinger, M., Purdue University, 1986 (2)

3.

Chow, P., Purdue University, 1987 (2)

4.

Kabakibo, A., Purdue University, 1988 (2)

5.

Gimarc, C., Purdue University, 1990 (6)

6.

Lakhani, S., Purdue University, 1990 (2)

7.

Jung, G., Purdue University, 1991 (3)

8.

Upatising, V., Purdue University, 1993 (2)

9.

Sernec, P., University of Ljubljana, 1997 (2)

10.

Chong, P., Seoul University, 1997 (2)

Foreign Univerity Technical Reports = 2

1.

Giorgi, R, Prete, C. A., Prina, G., Riccardi, L.,

“Trace Factory,”

Internal Report DII-CL-002-96, Univerity of Pisa, Pisa, Italy, 1996.

References:

M. Tomašević, V. Milutinović, eds.,

The cache coherence problem in shared-memory multiprocessors – Hardware solutions ,

IEEE Computer Society Press, Los Alamitos, CA, April 1993. (1)

2.

Prete, C. A.,

“A Cache Coherence Protocol Based on Selective Invalidation for Shared-Bus Shared-Memory Multiprocessors,”

Internal Report DII-CL-002A-96, Univerity of Pisa, Pisa, Italy, 1996.

References:

M. Tomašević, V. Milutinović,

Hardware approach to cache coherence in shared-memory multiprocessors ,

IEEE Micro, vol. 14, n. 5, October 1994. (1)

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