DINESH V. KATKAR
Contact No.: +919860333364
E-Mail: dineshkatkar_wit@yahoo.co.in/dinesh.eln@gmail.com
Seeking a job position that utilizes my quick learning abilities & Knowledge in the field of FPGA Design &
Embedded system to enhance professional growth.
OVERVIEW
 01 Year of Experience in projects involving Embedded system architecture & Board design.
 Development Experience in System architecture design, Hardware design, Component selection.
 Experience in Hardware design of FPGA, 8-bit & 32-bit CPU, Analog & Digital signal design.
 Experience in Schematics design, Board bring up, Hardware debugging & Integrated testing
 Have extensively worked on Documentation, BOM preparation & Test plan.
PROFESSIONAL EXPERIENCE
 Jr. Design Engineer at Bitmapper Integration Technologies Pvt. Ltd., Pune from JAN’2011-MAR’2012.
 Job Profile – Worked as a Design Engineer, which -involves:

Development of hardware and System design which mainly includes Understanding specifications,
component selection, board design, schematic design, netlist checking, component procurement, testing
and hardware debugging, Preparation of BOM and Documentation.
ACADEMIA
 PG Diploma in Advanced Embedded System Design Course (AESD) from Oasis Technologies Pvt. Ltd., Pune, in
2010. Secured A+ Grade.
 B.E. (Electronics) from Walchand Institute of Technology, Solapur, University of Solapur, in 2008. Secured 62.42%.
 Diploma in Electronics and Communication from Solapur Education Society Polytechnic College , Solapur,
MSBTE, Mumbai, in 2005.Secured 63.68%.
 10th from Vidya Niketan High School, Solapur, Pune Board, in 2000. Secured 64.80%.
SKILLS
 Processing/Controlling devices : FPGA (Virtex-4, Spartan 3, Virtex-5, Spartan-6), Microcontroller ATtiny26L
 Communications/BUS Interfaces: I2C, SPI, RS232.
 Memory Interface: SRAM, ZBT SRAM, FLASH, EERPOM.
 EDA Tools: Xilinx ISE Design Suite 12.4, ZUKEN CADSTAR & ALLEGRO for schematic entry.
 Programming Languages: 8051 Assembly Language, Introductory Knowledge of C & VHDL language.
 Hardware Debug Tools: Digital Oscilloscope, DMM.
PROJECTS UNDERTAKEN
1) Project Title
: Virtex-4 Video Processing Board.
The project dealt with R & D on Video Frame. It includes Video decoder for receiving analog video signals, Video
Encoder is used to generate composite, S-video or component video & Video DAC to generate RGB channel video
output. Video processing is done in FPGA as well as there is streaming of video on GUI through Cypress USB 2.0
at 128Mbps including all overhead in Synchronous FIFO mode of Cypress USB.
 Technologies involved: Virtex-4 FPGA from Xilinx, 4-SRAM, 1- ZBT SRAM & FLASH Memory, USB2.0 and
Serial Interface.
 Responsibilities: Understanding Specifications & Project execution cycle, Component selection, Design of
Circuit, Schematic Design, BOM preparation, Component procurement, Implementation, Hardware &
functional testing, Documentation.

Hardware Design: Involved in design of configuration of FPGA, Video Encoder & Video Decoder
interfacing with FPGA.Also involved in design of USB 2.0 & serial interfacing with FPGA.
2) Project Title
: Video Card Thermal Imager Board.
The project dealt with R & D on Video Frame. It includes Video decoder for receiving analog video signals; Video
Encoder is used to generate composite, S-video or component video output. Applications include Analog video
signals from Sensors, Processing is done in FPGA & displaying it on LCD display or TV Screen.
 Technologies involved: Virtex-5 FPGA from Xilinx, 8-SRAM, 4-FLASH, DVI interface, LCD display driver,
Serial Interface.
 Responsibilities: Understanding Specifications & Project execution cycle, Component selection, Design of
Circuit, Schematic Design, BOM preparation, Component procurement, Implementation, Hardware &
functional testing, Documentation.

Hardware Design: Involved in design of configuration of FPGA, Video Encoder & Video Decoder
interfacing with FPGA.Also involved in design of serial interfacing with FPGA.
3) Project Title
: FOV/FOC Drive Controller Board.
The project dealt with R & D on Video Frame. It includes motor driver interfacing with ATtiny26L Microcontroller
for FOV/FOC drive control of video signal.
 Technologies involved: AVR Microcontroller ATtiny 26L from Atmel, HIP4020 Motor driver.
 Responsibilities: Understanding Specifications & Project execution cycle, Component selection, Design of
Circuit, Schematic Design, Implementation, Hardware & functional testing.

Hardware Design: Involved in design of HIP4020 motor driver interfacing with Microcontroller.
ACADEMIC PROJECT
Title:
Interactive Voice Response System (IVRS) for College Automation.
Our project allows the user to know the student’s Attendance and marks quickly through the telephone line
without the intention of the college authority. In the hardware side embedded system has been used. A 20 pin
microcontroller 89C2051 is used because of its compatibility with our hardware. This microcontroller controls the
whole hardware. Telephone Line is used for communication purpose. Visual Basic has been used for Software
programming. Presentation in the class and outcome of the university are made reachable to the parents by our
project.
 Technologies involved: AT89c2051 Microcontroller from Atmel, DTMF decoder MT8870.
 Responsibilities: Understanding Specifications, Component selection, Design of Circuit, Schematic Design,
Implementation, Hardware & functional testing.
HOBBIES
 Making New Photo Album.
 Listening to Music.
 Learning New Languages.
PERSONAL INFORMATION
Date of Birth
:
09th JUNE, 1985
Languages Known
:
English, Hindi and Marathi
Address
:
Permanent: 5/A, Kalpak Housing Society, Near Videe Gharkul, J Group, Hyderabad
Road, Solapur- 413005, Maharashtra.
DECLARATION
I hereby declare that the above written particulars are true to the best of my knowledge and belief.
(DINESH VINAYAK KATKAR)