DIGITAL COMPUTER
(Discrete Information Processing System)
System
is an organized collection of components that interact via links
among themselves and with their environment
to provide a pre-defined functionality
System Structure
defines the composition of the system
in terms of system components and links
System Functionality
defines the behavior of the system
in terms of system inputs and outputs
2..
The structure of a system is given at different levels of detail
e.g.,
a) Compositional
b) Logical
c) Physical
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..' '
Central processing unit
(CPU)
Arilhmelic logic unit
Cd.ltaprocessing)
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Instruction
decoding
unit
Register
Iile (data
storagc)
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j}2~:;a
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"i~
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0
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Bus interface circuit
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Bus intcrf<lcecircuit
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(b)
Muin
memory
(instruction
and dal.l
s(()ruge)
Input/output
controllers
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" ~"..,;
To pcriphcrul
devices
(disk mcmory,
tcrminal, printer)
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(0)
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,
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(c)
3
The functionality
of a system with
Xl' X2, ... ., Xn
n inputs
m outputs
Zl, Z2' ... , Zm
is defined by
Zl
= f(XI' X2, ... , Xn)
Z2
= f(XI' "2' ... , Xn)
-
Zm
= f( XI'
X2,
... , Xn)
e.g.,
x~
Xl
l
~)(3
~-
j)eJ.t
.'
---~.
.'
t
Zl
Z2
X2, X3)
I
Zl
f
= (XIEBX2)-X3 + XI-X2~~
= f(XI'
X2,X3)= (XIEBX2)EBX3
I
= f(XI'
Z(
4
Discrete Information
Numeric Information is in Binary Number System
:. Number Systems
(Binary, Octal, Decimal, Hexadecimal)
Representation
Con version
Arithmetic Operations
AlphanumericInformation is in Binary Coding Systems
:. Coding Systems
Encoding
Decoding
Error Detecting Codes
Error Correcting Codes
Discrete Information
Processing
* is expressed in a two valued Boolean Algebra as Boolean functions
:.
Switching Algebra
Boolean Expressions (e)
Truth Tables (TT)
Conversion between e and TT
* is realized by means of Logic Circuits
:. Logic Circuits
Logic Gates
Minimization
Com binational Circuits
Sequential Circuits
-
5"
Com binational Circuits (CC)
i.e.,
~~Zl
XI -~
IIinput XI-J-
:.
variables
. x" -r
where
-
~
Combinational
circuit
:.
%2 /II output
variables
.
-~Zm
Zi = f(Xl' X2' ... , Xn)' 1 ~ i ~ m
Half Adder
Full Adder
Binary Ripple Adder/SubtractorO
Look-Ahead Carry Adder
Magnitude Comparator
Code Converter
Decoder
Enco'der
Demultiplexer
Multiplexer
ROM
(Read-Only Memory)
PLA
(Programmable Logic Array)
AL U
(Arithmetic Logic Unit)
6
Sequential Circuits (SC)
...
x.
%2 In output
variables
-
XII
where
-
%m
Combinational
circuit
y.
y.
Y2
Y2
Yk
1'I)(1Y)OY2r
%.
n input x2
variables
k secondary
variables
(present.
state)
rNt'~
C:y-~k
.
.
f.1-.ua-1\ts1uJL
~~~
k excitation
variables
(next state)
~k
f.y~e'YI+)YlPvd-
Zi = f(YI' Y2,... , Yk,xl' X2,... , Xn)' .1~ i ~ m
Yj = f(YI' Y2,... , Yk,xl' X2, ... , Xn)' .1~ j ~ k
Asynchronous Sequential Circuits (ASC)
Latches.
Analysis
-
--' ~~
c/oCl(
Design
. .J.J-
Synchronous Sequential Circuits (SSC)
- Flip-Flops
- - .N-CI~
~
- Analysis
- Design
Counters
(
Registers
J
.
fx:~rn.fb
1-
S:e-7)e.>1t-tNC
n
CyiY-,!":
I
CI()~
1Basic Computer Organization and Design
- DatalAddress/Control
Transfer Units
- Memory
Units
- Input/Output Control Units
- Central Processing Up.its
- Interrupts
- Addressing Modes
- Instruction Types
- Instruction Sets
- Assembly Language Programming
THEN, ...
CS12121. Computer Architecture II (2 h.p.w.t.,. 2 h.lab.t.--3. cr.).
Data representations. Assembly language concepts. Programming a
typical microprocessor, e.g. 386. Basic input/output devices.
Programming input/output operations; interrupts, e.g. disk controllers.
Prerequisi.te(s): CS12111.