Cellphone design using
highly integrated GSM
radio chipset
Larry Li, Rahul Magoon, Al Molnar, Jackie Cheng,
Matteo Conta, and Akbar Ali
Conexant Systems, Inc.
Abstract
The highly integrated RF subsystem for GSM900MHz and
DCS1800MHz (or PCS1900MHz) with minimal external component count and low power is presented. The entire subsystem
include RF front-end IC in receive path, power amplifier (PA),
transceiver with integrated dual loop synthesizer, and power
amplifier controller.
Introduction
The growth in the global cellular telephone market has increased
the need for communication system that are low cost, low power,
high integration, and have multiband capabilities. This requires
the minimum number of integrated circuits and passive components in radio-frequency (RF) subsystem. This paper presents
a highly integrated RF subsystem for GSM900MHz and
DCS1800MHz (or PCS1900MHz) with minimal external component count. The entire radio subsystem described in this paper include RF front-end IC(RF212) in receive path, transceiver
IC with the dual loop synthesizer(RF137), power amplifier IC
(RM008), and power amplifier controller IC (RF142).
optimized for use in 900 MHz, 1800 MHz, and 1900 MHz GSM
and other TDMA applications.
RF front-end IC
Receiver design typically consists of tradeoffs, such as the number IF’s, IF frequency, distributions of gain, linearity, and noise
figures (NF) in the chain. In addition, other important parameters such as power consumption, cost, and size must be carefully taken into consideration. The block diagram of RF frontend IC(RF212) is shown in figure 1 of RF212 section. The Low
noise amplifier (LNA) and image reject down converter for triple
bands are integrated into one chip. An image reject external
SAW filter is eliminated by on-chip image reject mixer. The
RF212 down converts RF frequencies to 400MHz IF frequency.
Features of the RF212 include 20dB or 12dB selectable gain,
35dB of image rejection, and 2.7V - 3.6V supply range. The
total operating current for GSM is 15mA and 20mA for DCS
or PCS band. The chip is packaged in a 20 pin thin shrink small
outline package (TSSOP).
RF Transceiver
Transceiver architecture
The dual band RF subsystem is shown in figure 1. It compose
of a receiver, a transmitter, and frequency synthesizers. The
transmit/receive and GSM/DCS band switches are connected
to the dual band antenna. The received signals are fed into the
GSM/DCS band pass SAW filters and are amplified and mixed
down to IF by the RF212. The RF front-end IC(RF212) include
a dual low noise amplifier(LNA) and dual image reject mixers.
The transceiver IC(RF137) interfaces with a data conversion
IC that processes the received 2nd intermediate frequency (IF)
signal, provides automatic gain control (AGC) through a 3-wire
serial interface and supplies modulated baseband transmit signals. Both the 1st receive IF and the transmit IF cover a range
of 70 MHz to 450 MHz while the 1st local oscillator (LO) and
VHF voltage-controlled oscillator (VCO) ranges are from 800
MHz to 2 GHz and 300 MHz to 900 MHz respectively. The
dual-band Power Amplifier (RM008) Multiple Chip Module
(MCM) is intended for GSM900 and DCS1800 operation. The
MCM contains internal components for input and output matching to 50 Ohms. The Power Amplifier controller IC(RF142) is
The RF transceiver IC(RF137) provides the interfaces between
the base band data conversion IC and the RF front-end IC. The
block diagram of the RF transceiver is shown in figure 1 of RF137
section. The received signal from the output of RF212 goes through
the IF SAW filter and gets into the first IF input of transceiver IC.
The receiver path of transceiver IC comprise the blocks needed for
down-conversion and amplification of the incoming first IF signal
(400MHz) to the second IF of 14.6MHz. The first IF stage is a
programmable gain amplifier (PGA) with a gain range of 24 dB. It
is followed by an image reject mixer with 0 dB of conversion gain.
The limiters driving the LO ports of the mixer are designed to
allow high or low - side injection for frequency plan flexibility.
The I and Q mixer-outputs are then combined in a three stage polyphase filter. A buffer amplifier next drives an off-chip ceramic
filter. A final amplifier with a selectable gain of 6 dB or 18 dB
drives the external band-pass sigma-delta converter. Sampling the
receive signal at a finite IF eliminates the need for performing
DC offset correction which is required in the case of sampling
at baseband frequencies. It also reduces the amount of variable
gain range needed at the IF and provides better demodulation
International IC — Taipei • Conference Proceedings 5
controlled by the PA control IC.
accuracy.
The dual band controller (RF142) is designed to control HBT
The transmit path in the transceiver IC consists of a quadrature modulator and a frequency translation loop in order to mini- power amplifiers. The block diagram is shown in figure 1 of RF142
mize the post PA filtering requirements (and hence any addi- section. It combines the functions of a broadband RF detector and
tional post PA losses) and the cost in the transmit path. The modu- an error amplifier/integrator to provide transmit burst control for dual
lated I and Q baseband signals are up-converted to the IF by or multi-band HBT PAs. It has two separate dedicated output stages
double-balanced mixers. After some external filtering, the IF sig- and pins for GSM 900 MHz PAs and DCS 1800 MHz/PCS 1900
nal is then fed into the frequency translation loop that performs MHz PAs. The device, when connected to dual or multi-band HBT
the up-conversion to the RF band. The translation loop consists PAs with a coupler, forms a loop to control the transmit power in a
of a phase-frequency detector (PFD) and charge-pump, a mixer dual or multi-band wireless application. The transmit power is con(with an operating range from 900 MHz to 2 GHz) and an on- trolled by a balanced analog reference voltage input to the RF142.
An external RF coupler is required at the PA output to couple a
chip low pass filter (LPF). As can be seen from the block diagram in figure 1, the loop functions as a PLL with a mixer for part of its power to the RF logarithmic detector input. The input to
frequency translation in the feedback path. When the loop is the detector must be within the range -40 dBm to +10 dBm. The
locked, the IF signal at the first input of the PFD is compared output from the detector is a DC voltage that is proportional to the
against the second input which is fed by the product of the RF RF power (in dBm) at the RFPC input to the device. The dynamic
and LO signals coming from the mixer. The on-chip LPF follow- range of the detector is 50 dB. The integrating error amplifier (Amp2)
ing the mixer attenuates the unwanted component as well as har- amplifies and integrates the voltage difference between the detector
monics. Also, the PFD can be programmed to lock onto a low- output and the power control input. Each of the two output stages is
side IF (IF=RF-LO) or a high-side IF (IF=LO-RF) for dual-band dedicated to a frequency band. One is intended for GSM 900 MHz
operation. An on-chip buffer feeds the RF signal (with an input and one for DCS 1800 MHz/PCS 1900 MHz. The output stage is
frequency range from 800 MHz to 2 GHz) into the mixer at a selected by the BAND select signal. A high logic level selects the
constant amplitude. This is done with an amplitude leveling loop that can accommodate a wide
range of RF signal power level (-17 to -7 dBm),
thus optimizing the power consumption of the
mixer for a given linearity.
The transceiver chip also include the dual loop
synthesizer which provide two precision frequency sources used in the transmit and receive
path of the radio. The ultra high frequency (UHF)
synthesizer comprise of the following blocks: a)
dual modulus prescaler providing a 32/33 divide
ratio, b) a 13 bit R counter, c) an 13 bit N counter,
d) a phase detector with lock detector, and e) a
charge pump. The very high frequency(VHF) synthesizer constitute the similar blocks, except a 8/
9 prescaler. The input frequency ranges are
500MHz — 2.0GHz for UHF synthesizer and
50MHz — 450Mhz for the VHF synthesizer. The
UHF and VHF frequency synthesizers share a
common three-wire serial programming interface
Figure 1: The dual band RF subsystem architecture. The entire RF subsystem consists of 4 chips
and MUX (LD/Test) output.
RF137, RF142, and RM008) and other components which include VCOs, SAW filters, an
A fully differential VHF voltage-controlled (RF212,
antenna duplexer, a ceramic coupler, and passive components.
oscillator (VCO) is also integrated into the transceiver chip with an external LC tank. The fully differential archi- VPCDCS as the output pin and a low level selects VPCGSM as the
tecture of the VCO inherently provides low even order harmonics output pin. When either output is inactive, its residual output level is
minimizing the phase inaccuracy of the phase shifters used for extremely low to ensure that the inactive PA is completely off.
generating quadrature local oscillator signals. It also provides better power supply rejection as well as more common mode radia- Conclusion
tion immunity as compared to single-ended designs. Better radia- A highly integrated, low power, low cost, dual band GSM ration immunity of the resonators helps minimize the extent of pull- dio subsystem is presented in this paper. The entire radio coning of the center frequency of the VCO due to the presence of a sists of 4 chips and other components.
large signal in its spectral proximity.
Author’s contact details
PA and PA controller
The block diagram of the dual band power amplifier (PA) multiple
chip module(MCM) for GSM900 and DCS1800 is shown in figure
1 of RM008 section. The MCM consists of two Heterojunction Bipolar Transistor (HBT) power amplifiers, optimized for three cell
operation. The MCM contains internal components for input and
output matching to 50 Ohms. The power efficiencies are 50% for
GSM and 45% for DCS in typical condition. The output power is
6 International IC — Taipei • Conference Proceedings
Larry Li
Senior Staff Engineer
Conexant Systems, Inc.
4311 Jamboree Road, Newport Beach, CA 92620
Phone: 1 949 383 7844
Fax: 1 949 483 7599
Email: larryli@nb.conexant.com
Presentation Materials
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