Chapter 17
Microprogrammed
Control
Yonsei University
Contents
•
•
•
•
•
17-2
Basic Concepts
Microinstruction Sequencing
Microinstruction Execution
TI 8800
Applications of Microprogramming
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Introduction
Basic Concepts
• An alternative to a hardwired control unit is
a microprogrammed control unit(specified
by a microprogram)
• Microprogrammed control unit
– Sequencing through microinstructions
– Generating control signals to execute each
microinstruction
• A control signals are used to cause register
transfers and ALU operations
• An approach to control unit design that was
organized and systematic and avoid the
complexities of a hardwired implementation
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Microinstructions
Basic Concepts
• To implement a control unit as an
interconnection of basic logic elements is no
easy task
• An alternative, which is quite common in
contemporary CISC processors, is to
implement a microprogrammed control unit
• Microprogramming language
• Microinstruction
– A sequence of instructions is a microprogram, or
firmware
– Easier to design in firmware than hardware
– More difficult to write a firmware than a software
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Microinstructions
Basic Concepts
• All that the control unit is allowed to do is
generate a set of control signals
• This condition(either on and off) can be
represented by a binary digit for each control
line
• So we construct a control word in which each
bit represents one control line
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Horizontal Microinstruction
Basic Concepts
• A sequence of control words to represent the
sequence of micro-operations
• The sequence of micro-operations is not fixed.
• Put our control words in a memory(with
unique address)
• Add an address field to each control word.(the
location of the next control word to be
executed)
• Add a few bits to specify the condition
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Typical Microinstruction Formats
Basic Concepts
Microinstruction Address
Jump Condition
Internal CPU Control Signals
-Unconditional
-Zero
System Bus Control Signals
-Overflow
-Indirect Bit
(a) Horizontal Microinstruction
Microinstruction Address
Function Codes
Jump Condition
(b) Vertical Microinstruction
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Format of Microinstruction
•
•
•
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Basic Concepts
One bit for each internal processor control
line
One bit for each system bus control line
Condition field(to be executed next)
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Interpretation of Microinstruction
Basic Concepts
• To execute this microinstruction, turn on all
the control lines indicated by a 1 bit; leave off
all control lines indicated by a 0 bit. -> one or
more micro-operations to be performed
• If the condition indicated by the condition bits
is false, execute the next microinstruction in
sequence
• If true, the next microinstruction to be
executed is indicated in the address field.
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Organization of Control Memory
Basic Concepts
Fetch Cycle Routine
Jump to Indirect or Execute
Indirect Cycle Routine
Jump to Execute
Jump to Fetch
Jump to Opcode Routine
Interrupt Cycle Routine
Execute Cycle Beginning
AND Rou Routine
Jump to Fetch or Interrupt
ADD Routine
Jump to Fetch or Interrupt
IOF Routine
Jump to Fetch or Interrupt
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Control Memory
Basic Concepts
• A concise description of the complete
operation of the control unit
• The sequence of micro-operations to be
performed during each cycle (fetch, indirect,
execute, interrupt)
• It specifies the sequencing of these cycles
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Microprogrammed Control Unit
Basic Concepts
• The control memory contains the set of
microinstructions
• The control address register contains the
address of the next microinstruction to be
read
• When a microinstruction is read from the
control memory, it is transferred to the
control buffer register
• Reading a microinstruction from the control
memory is the same as executing that
microinstruction
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Control Unit Microarchitecture
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Basic Concepts
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Control Unit Functions
•
•
•
•
•
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Basic Concepts
To execute an instruction sequencing logic unit
issues a READ command to the control memory
The word whose address is specified in the control
address register is read into the control buffer
register
The content of the control buffer register generates
control signals and next-address information for the
sequencing logic unit
The sequencing logic unit loads a new address into
the control address register based on the nextaddress information from the control buffer register
and the ALU flags
All this happens during one clock pulse
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Three Decisions
Basic Concepts
• Depending on the value of ALU flags and the control
register, one of the three decisions are made
• Get the next instruction
– Add 1 to the control address register
• Jump to a new routine based on a jump
microinstruction
– Load the address field of the control buffer register into the
control address register
• Jump to a machine instruction routine
– Load the control address register based on the opcode in the IR
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Functioning of MCU
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Basic Concepts
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Decoder
Basic Concepts
• The upper decoder
– Translate the opcode of the IR into a control memory
address
• The lower decoder
– Used for vertical microinstructions (not for horizontal
microinstructions)
• The advantage of vertical microinstruction
– More compact (fewer bits) at the expense of a small
additional amount of logic and time delay
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Wilkes’s Control Unit
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Basic Concepts
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Wilkes Control
Basic Concepts
• Matrix partially filled with diodes
• During a machine cycle, one row of the matrix
is activated with a pulse
• This generates signals at those points where a
diode is present
• Each row of the matrix is one microinstruction,
and the layout of the matrix is the control
memory
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Wilkes Control
Basic Concepts
• The difference with horizontal
microprogramming
– In the previous description, the control address register
could be incremented by one to get the next address
– The next address is contained in the microinstruction
– To permit branching, a row must contain two address
parts, controlled by a conditional signal
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Wilkes Control
Basic Concepts
• The processor of the hypothetical machine
includes the following registers
–
–
–
–
A : multiplicand
B : accumulator(least-significant half)
C : accumulator(most-significant half)
D : shift register
• Three registers
– E : serves as both a MAR and temporary storage
– F : program counter
– G : another temporary register; used for counting
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Machine Instruction Set for Wilkes
Order
Effect of order
An
Sn
Hn
Vn
Tn
Un
Rn
Ln
Gn
In
On
C(Acc) + C(n) to Acc1
C(Acc) – C(n) to Acc1
C(n) to Acc2
C(Acc2) × C(n) to Acc, where C(n) ≥ 0
C(Acc1) to n, 0 to Acc
C(Acc1) to n
C(Acc) ×
to Acc
− ( n +1)
C(Acc) × 2
to Acc
Basic Concepts
n +1
IF C(Acc) < 0,2transfer
control to n; if C(Acc) ≥ 0, ignore(I.e.,proceed serially)
Read next character on input mechanism into n
Send C(n) to out put mechanism
Notation Acc = accumulator
Acc1 = most significant half of accumulator
Acc2 = least significant half of accumulator
n = storage location n
C(X) = contents of X (X = register or storage location)
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Microinstruction for Wilkes
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Basic Concepts
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Microinstruction for Wilkes
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Basic Concepts
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Microinstruction for Wilkes
The action of
The address
of each micro- to be taken by
the ALU
instruction
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Basic Concepts
The action of
the setting the using
address of the
to be taken by of the two of the two
next microthe control unit flag(flip-flop)flag(filp-flop) instruction
to be fetch
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Microinstruction for Wilkes
Basic Concepts
• Column 1
– The address of each micro-instruction
• Column 2
– The actions to be taken by the ALU
• Column 3
– The actions to be taken by the control unit
• Column 4
– specifies the signal that sets the flag
• Column 5
– use of the two flags(flip-flop)
• Columns 6 and 7
– The address of the next microinstruction to be fetched
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Advantages and Disadvantages
Basic Concepts
• Advantages
– Simplifies the design of the control unit
• Cheaper and less error-prone to implement
– The decoders and sequencing logic unit of a
microprogrammed control unit are very simple pieces
of logic
• Disadvantages
– Slower than a hardwired unit of comparable technology
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Advantages and Disadvantages
Basic Concepts
• Despite this, microprogramming is the
dominant technique for implementing control
units in contemporary CISC, due to its ease of
implementation
• RISC processors typically use hardwired
control units
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Design Consideration
Microinstruction
Sequencing
• The two basic task(microprogrammed control
unit)
– Microinstruction sequencing : Get the next
microinstruction from the control memory
– Microinstruction execution : Generate the control
signals needed to execute the microinstruction
• Design Consideration
– The address of the next microinstruction to be executed
• Determined by instruction register – occurs once
per instruction cycle
• Next sequential address – most common
• Branch – necessary part of a microprogram
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Sequencing Techniques
Microinstruction
Sequencing
• Condition flags, the contents of the instruction
register and a control memory address must
be generated for the next microinstruction
• Based on the format of the address
information
– Two address fields
– Single address field
– Variable format
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Two Address Fields
Microinstruction
Sequencing
• The simplest approach is to provide two
address fields in each microinstruction
• A multiplexer is provided that serves as a
destination for both address fields plus the
instruction register
• This scheme requires more bits in the
microinstruction than other approaches
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BCL Two Address Fields
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Microinstruction
Sequencing
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Single Address Field
Microinstruction
Sequencing
• A common approach is to have a single
address field
– Options for next address are as follows
• Address field
• Instruction register code
• Next sequential address
• The address-selection signals determine
which option is selected
– Reduces the number of address fields to one
– The address field often will not be used
– There is some inefficiency in the microinstruction
coding scheme
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BCL Single Address Field
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Microinstruction
Sequencing
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Variable Format
Microinstruction
Sequencing
• Two entirely different microinstruction
formats
– The first format
• The next address is either the next sequential
address or an address derived from the instruction
register
– The second format
• Either a conditional or unconditional branch is being
specified
– One disadvantage of this approach is that one entire
cycle is consumed with each branch microinstruction
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BCL Variable Format
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Microinstruction
Sequencing
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Address Generation
Microinstruction
Sequencing
• Various address-generation techniques
– Explicit
– Implicit
• Conditional branch instruction depends on
the following information
– ALU flags
– Part of the opcode or address mode fields of the
machine instruction
– Parts of a selected register, such as the sign bit
– Status bits within the control unit
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Variable Address Generation
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Microinstruction
Sequencing
Explicit
Implicit
Two-field
Unconditional branch
Conditional branch
Mapping
Addition
Residual control
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IBM 3033 Control Address Register
BA (8)
BB (4)
BD (4)
BC (4)
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Microinstruction
Sequencing
BF (4)
BE (4)
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Address Generation
Microinstruction
Sequencing
• The opcode portion of a machine instruction
must be mapped into a microinstruction
address
• A common implicit technique
– One that involves combining or adding two portions of
an address to form the complete address – IBM 3033,
IBM S/360
– Residual control
• The use of a microinstruction address that has
previously been saved in temporary storage within
the control unit
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LSI-11 Microinstruction Sequencing
Microinstruction
Sequencing
• Microcomputer version of a PDP-11
• Use a 22-bit microinstruction and a control
memory of 2K22-bit words
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LSI-11 Microinstruction Sequencing
Microinstruction
Sequencing
• The next microinstruction address is
determined in one of five ways
– Next sequential address : In the absence of other
instructions, the control unit’s control address register
is incremented by 1
– Opcode mapping : At the beginning of each
instruction cycle, the next microinstruction address is
determined by the opcode
– Subroutine facility : One level
– Interrupt testing : Certain microinstructions specify a
test for interrupts. If an interrupt has occurred, this
determines the next microinstruction address
– Branch : Conditional and unconditional branch
microinstructions are used
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Microinstruction Execution
Microinstruction
Execution
• The microinstruction cycle is the basic event
• Each cycle is made up of two cycle
– Fetch and execute
• This section deals with the execution of a
microinstruction
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Control Unit Organization
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Microinstruction
Execution
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Taxonomy of Microinstruction
•
•
•
•
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Microinstruction
Execution
Vertical/horizontal
Packed/unpacked
Hard/soft microprogramming
Direct/indirect encoding
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Taxonomy of Microinstruction
Microinstruction
Execution
• We can do better than Wilkes’s scheme if
we observe that not all of the possible
combinations will be used
– Two sources cannot be gated to the same
destination
– A register cannot be both source and destination
C
C
– Only one pattern of control
signals
can be presented
to the ALU at a time
– Only one pattern of control signals can be presented
to the external control bus at a time
5
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Taxonomy of Microinstruction
Microinstruction
Execution
• Given some number Q < 2 K possibilities
– These could be encoded with log 2 Q bits, with
( log 2 Q < K )
– Tightest possible form – not used
• It is as difficult to program as a pure decoded
(Wilkes) scheme.
• It requires a complex and therefore slow control
logic module.
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Taxonomy of Microinstruction
Microinstruction
Execution
• Some compromises are made
– More bits than are strictly necessary are used to
encode the possible combinations
– Some combinations that are physically allowable are
not possible to encode
• Reduce the number of bits
• The net result is to use more than log 2 Q bits
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The Microinstruction Spectrum
Microinstruction
Execution
Characteristic
Unencoded
Many bits
Detailed view of hardware
Difficult to program
Concurrency fully exploited
Little or no control logic
Fast execution
Optimize performance
Highly encoded
Few bits
Aggregated view of hardware
Easy to program
Concurrency not fully exploited
Complex control logic
Slow execution
Optimize programming
Terminology
Unpacked
Horizontal
Hard
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Packed
Vertical
Soft
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Taxonomy of Microinstruction
Microinstruction
Execution
• As the bits become more packed, a given
number of bits contains more information
• The term horizontal and vertical relate to the
relative width of microinstructions
• The term hard and soft microprogramming
are used to suggest the degree of closeness
to the underlying control signals and
hardware layout
– Hard microprograms are generally fixed and
committed to read-only memory
– Soft microprograms are more changeable and are
suggestive of user microprogramming
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Microinstruction Encoding
Microinstruction
Execution
(a) Direct Signals
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Microinstruction Encoding
Microinstruction
Execution
(b) Indirect Encoding
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Microinstruction Encoding
Microinstruction
Execution
• The design of an encoded microinstruction
format
– Organize the format into independent fields. Each field
depicts a set of actions such that actions from different
fields can occur simultaneously
– Define each field such that the alternative actions that
can be specified by the field are mutually exclusive
– Only one of the actions specified for a given field could
occur at a time
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Microinstruction Encoding
Microinstruction
Execution
• Functional encoding
– Identify functions within the machine and designates
fields by function type
– For example, if various sources can be used for
transferring data to the accumulator, one field can be
designated for this purpose
• Resource encoding
– View the machine as consisting of a set of
independent resources and devotes one field to
each.(e.g., I/O, memory, ALU)
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Microinstruction Encoding
Microinstruction
Execution
• Another aspect of encoding
– Whether it is direct or indirect
– With indirect encoding, one field is used to
determine the interpretation of another field
• For example
– ALU with eight different arithmetic operation and
eight different shift operations
– A 1-bit field could be used to indicate whether a shift
or arithmetic operation is to be used; a 3-bit field
would indicate the operation
– This technique generally implies two levels of
decoding, increasing propagation delay
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Alternative Microinstruction Formats
Microinstruction
Execution
(a) Vertical Microinstruction Repertoire
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Alternative Microinstruction Formats
Microinstruction
Execution
(b) Horizontal Microinstruction Format
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LSI-11 Microinstruction Execution
Microinstruction
Execution
• LSI-11 Control Unit Organization
• LSI-11 Microinstruction Format
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LSI-11 Control Unit Organization
Microinstruction
Execution
• The board contains three LSI chips, an internal
bus known as the microinstruction bus(MIB),
and some additional interfacing logic
• The organization of the LSI-11 processor
• The control store chip or chips contain the 22bit-wide control memory
• MIB ties all the component together
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Block Diagram of the LSI-11
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Microinstruction
Execution
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Organization of LSI-11 Control Unit
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Microinstruction
Execution
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LSI-11 Microinstruction Execution
Microinstruction
Execution
• The Translation array
– The opcode us used to determine the start of a
microroutine
– At appropriate times, address mode bits of the
microinstruction are tested to perform appropriate
addressing
– Interrupt conditions are periodically tested
– Conditional branch microinstructions are evaluated
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Some LSI-11 Microinstruction
Arithmetic Operations
Microinstruction
Execution
General Operation
Add word (byte, literal)
MOV word (byte)
Test word (byte, literal)
Jump
Increment word (byte) by 1
Return
Increment word (byte) by 2
Conditional jump
Negate word (byte)
Set (reset) flags
Conditionally increment (decrement) byte
Load G low
Conditionally add word(byte)
Conditionally MOV word (byte)
Add word(byte) with carry
Input/Output Operations
Conditionally add digits
Input word (byte)
Subtract word(byte)
Input status word (byte)
Compare word(byte, literal)
Read
Subtract word(byte) with carry
Write
Decrement word(byte) by 1
Read (write) and increment word (byte) by 1
Logical Operations
Read (write) and increment word (byte) by 2
AND word (byte, literal)
Read (write) acknowledge
Test word (byte)
Output word (byte, status)
OR word (byte)
Exclusive-OR word (byte)
Bit clear word (byte)
Shift word (byte) right (left) with (without) carry
Complement word (byte)
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LSI-11 Microinstruction Format
Microinstruction
Execution
• LSI uses an extremely vertical
microinstruction format, which is only 22 bits
wide
• Optimize the performance of the control unit
within the constraint of a vertical, easily
programmed design
• The high-order 4bit control special functions
on the processor board
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LSI-11 Microinstruction Format
Microinstruction
Execution
(a) Format of the Full LSI-11 Microinstruction
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LSI-11 Microinstruction Format
Microinstruction
Execution
(b) Format of the Encoded Part of the LSI-11 Microinstruction
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IBM 3033 Microinstruction Execution
Microinstruction
Execution
• The Control memory consists of 4K words
• The first half of these (0000-07FF) contain 108bit microinstruction
• The remainder (0800-0FFF) are used to store
126-bit microinstruction
• Although this is a rather horizontal format,
encoding is still extensively used
• The ALU operates on inputs from four
dedicated, non-user-visible registers A, B, C,
D
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IBM 3033 Microinstruction Format
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Microinstruction
Execution
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IBM 3033 Control Fields
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Microinstruction
Execution
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Texas Instrument 8800
TI 8800
• The 8800 SDB consists of the following
components
–
–
–
–
–
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Microcode memory
Microsequencer
32-bit ALU
Floating-point and integer processor
Local data memory
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TI 8800 Block Diagram
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TI 8800
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Microinstruction Format
TI 8800
• The microinstruction format for the 8800
consists 128 bits broken down into 30
functional fields
• The fields are grouped into five major
categories
–
–
–
–
–
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Control of board
8847 floating-point and integer processor chip
8832 registered ALU
8818 microsequencer
WCS data field
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TI 8800 Microinstruction Format
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TI 8800
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TI 8800 Microinstruction Format
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TI 8800
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Microsequencer
TI 8800
• To generate the next microinstruction address
for the microprogram
• This 15-bit address is provided to the
microcode memory
• Five source
–
–
–
–
–
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Microprogram counter(MPC) register
Stack
DRA and DRB port
Register counters RCA and RCB
External input onto the bidirectional Y port
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Microsequencer
TI 8800
• Principal functional groups
–
–
–
–
–
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16-bit microprogram counter(MPC)
Two register counters, RCA and RCB
65-word by 16-bit stack
Interrupt return register and Y output
Y output multiplexer by which the next address can be
selected from MPC, RCA, RCB, external buses DRA
and DRB, or the stack
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TI 8800 Microsequencer
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TI 8800
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Registers/Counters
TI 8800
• Registers RCA and RCB may be loaded from
the DA bus
• The values may be used as counters to
control the flow of execution and may be
automatically decremented when accessed
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Stack
TI 8800
• The stack allows multiple levels of nested
calls or interrupts and it can be used to
support branching and looping
• Six stack operation are possible
–
–
–
–
–
–
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Clear
Pop
Push
Read
Hold
Load stack pointer
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Control of Microsequencer
TI 8800
• The microsequencer is controlled by the 12-bit
field of the current microinstruction, field 28
• Subfield
–
–
–
–
–
–
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OSEL (1bit)
SELDR (1bit)
ZEROIN (1bit)
RC2-RC0 (3bits)
S2-S0 (3bits)
MUX2-MUX0
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Control of Microsequencer
TI 8800
• As an example, the instruction INC88181 is
used to cause the next microinstruction in
sequence to be selected, If the currently
selected condition code is 1
• INC88181 = 000000111110
– Decode directly into
• OSEL = 0
• SELDR = 0
• ZEROIN = 0
• R = 000
• S = 111
• MUX = 110
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Microsequencer Microinstruction Bits
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TI 8800
TI 8832 ALU Instruction Field
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TI 8800
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TI 8832 ALU Instruction Field
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TI 8800
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TI 8832 ALU Instruction Field
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TI 8800
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TI 8832 ALU Instruction Field
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TI 8800
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TI 8832 ALU Instruction Field
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TI 8800
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Applications of Microprogramming
Applications of
Microprogramming
• The set of current applications for
microprogramming includes the following
–
–
–
–
–
–
–
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Realization of computers
Emulation
Operating system support
Realization of special purpose devices
High level language support
Microdiagnostics
User tailoring
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