Experiment No. -1 Aim: To Plot the Frequency Response of a single stage RC Coupled Amplifier with feed back and without feedback and find the following: 1. Voltage Gain 2. Lower cut off Frequency 3. Upper cut off Frequency 4. Bandwidth 5. Gain Bandwidth Product Apparatus: 1. Digital Storage Oscilloscope (DSO) 2. Power Supply 3. Bread Board 4. Signal Generator Component: Resistances: 100k Ω = 01, 4.7k Ω = 01, 22k Ω = 01, 220k Ω = 01, 220 Ω = 01 Capacitors: 10µf = 02, 47 µf = 01 Transistor BC107 = 01 Connecting wire and DSO Probe Introduction A practical amplifier circuit is meant to raise the voltage level of the input signal. This signal may be obtained from anywhere e.g. radio or TV receiver circuit. Such a signal is not of a single frequency. But it consists of a band of frequencies, e.g. from 20 Hz to 20 KHz. If the loudspeakers are to reproduce the sound faithfully, the amplifier used must amplify all the frequency components of signal by same amount. If it does not do so, the output of the loudspeaker will not be the exact replica of the original sound. When this happen then it means distortion has been introduced by the amplifier. Consider an RC coupled amplifier circuit shown fig 1 shows frequency response curve of a RC coupled amplifier. The curve is usually plotted on a semi log graph paper with frequency range on logarithmic scale so that large frequency range can be accommodated. The gain is constant for a limited band of frequencies. This range is called mid-frequency band and gain is called mid band gain. AVM. On both sides of the mid frequency range, the gain decreases. For very low and very high frequencies the gain is almost zero. In mid band frequency range, the coupling capacitors and bypass capacitors are as good as short circuits. But when the frequency is low. These capacitors can no longer be replaced by the short circuit approximation. At low frequency, output capacitor reactance increases. The voltage across RL reduces because some voltage drop takes place across XC. Thus output voltage reduces. The XC reactance not only reduces the gain but also change the phase between input and output. It would not be exactly 180o but decided by the reactance. At zero frequency, the capacitors are open circuited therefore output voltage reduces to zero. Page 1 of 26 The gain is constant over a frequency range. The frequencies at which the gain reduces to 70.7% of the maximum gain are known as cut off frequencies, upper cut off and lower cut off frequency fig. 2, shows these two frequencies. The difference of these two frequencies is called Band width (BW) of an amplifier. BW = f2 – f1. Fig. 2 At f1 and f2, the voltage gain becomes 0.707 Am(1 / 2). The output voltage reduces to 1 / 2 of maximum output voltage. Since the power is proportional to voltage square, the output power at these frequencies becomes half of maximum power. The gain on dB scale is given by 20 log10(V2 / V1) = 10 log 10 (V2 / V1)2 = 3 dB. 20 log10(V2 / V1) = 20 log10(0.707) =10 log10 (1 / 2)2 = 10 log10(1 / 2) = -3 dB. If the difference in gain is more than 3 dB, then it can be detected by human. If it is less than 3 dB it cannot be detected. Procedure: 1. 2. 3. 4. 5. Connect the circuit as shown in the diagram. Apply a sinusoidal input signal of = from a signal generator. Connect the output to the DSO Measure output voltage and calculate gain Keeping the input voltage constant vary the input frequency and note the output voltage of the Amplifier till the output decrease upto a -3dB point. 6. Draw a graph between input frequency Vs output voltage 7. For without feedback short terminal A and B by a connecting wire and repeat procedure 1 to 6. Page 2 of 26 Circuit: VDC = + 12V R1 100K R3 4.7K C2 To Digital Storage Oscilloscope (DSO) Q1 C1 Signal Generator 10UFD 1n BC107A A VOFF = 0V VAMPL = 20MV FREQ = 1KHZ R2 22K R4 220 C2 10UFD B 0 Observation table Vin = 20mv S. No Frequency Output voltage Voltage Gain Voltage gain in dB 10 Hz 100 Hz 1k Hz 10 kHz 100 kHz 1MHz Result: 1. Voltage Gain …………………………. 2. Lower cut off Frequency …………………………… 3. Upper cut off Frequency ……………………………. 4. Bandwidth …………………………… 5. Gain Bandwidth Product ………………………….. Page 3 of 26 Experiment No. -2 Aim: To Plot the Frequency Response of a Double stage RC Coupled Amplifier find the following: 1. Voltage Gain 2. Lower cut off Frequency 3. Upper cut off Frequency 4. Bandwidth 5. Gain Bandwidth Product and loading effect Apparatus: 1. Digital Storage Oscilloscope (DSO) 2. Power Supply 3. Bread Board 4. Signal Generator Component: Resistances: 100k Ω = 02, 4.7k Ω = 02, 22k Ω = 02, 220k Ω = 02, 220 Ω = 02 Capacitors: 10µf = 04, 47 µf = 02 Transistor BC107 = 02 Connecting wire and DSO Probe Introduction To increases the voltage gain of the amplifier, multiple amplifier are connects in cascade. The output of one amplifier is the input to another stage. In this way the overall voltage gain can be increased, when number of amplifier stages are used in succession it is called a multistage amplifier or cascade amplifier. The load on the first amplifier is the input resistance of the second amplifier. The various stages need not have the same voltage and current gain. In practice, the earlier stages are often voltage amplifiers and the last one or two stages are current amplifiers. The voltage amplifier stages assure that the current stages have the proper input swing. The amount of gain in a stage is determined by the load on the amplifier stage, which is governed by the input resistance to the next stage. Therefore, in designing or analyzing multistage amplifier, we start at the output and proceed toward the input. A n-stage amplifier can be represented by the block diagram as shown in fig. 1 Fig. 1 Page 4 of 26 In fig. 1, the overall voltage gain is the product of the voltage gain of each stage. That is, the overall voltage gain is ABC. To represent the gain of the cascade amplifier, the voltage gains are represents in dB. The two power levels of input and output of an amplifier are compared on a logarithmic scale rather than linear scale. The number of bels by which the output power P2 exceeds the input power P1 is defined as Because of dB scale the gain can be directly added when a number of stages are cascaded. Types of Coupling: In a multistage amplifier the output of one stage makes the input of the next stage. Normally a network is used between two stages so that a minimum loss of voltage occurs when the signal passes through this network to the next stage. Also the dc voltage at the output of one stage should not be permitted to go to the input of the next. Otherwise, the biasing of the next stage are disturbed. The three couplings generally used are. 1. RC coupling 2. Impedance coupling 3. Transformer coupling. Page 5 of 26 RC coupling: Fig. 2 shows RC coupling the most commonly used method of coupling from one stage to the next. An ac source with a source resistance R S drives the input of an amplifier. The grounded emitter stage amplifies the signal, which is then coupled to next CE stage the signal is further amplified to get larger output. In this case the signal developed across the collector resistor of each stage is coupled into the base of the next stage. The cascaded stages amplify the signal and the overall gain equals the product of the individual gains. The coupling capacitors pass ac but block dc Because of this the stages are isolated as for as dc is concerned. This is necessary to avoid shifting of Q-points. The drawback of this approach is the lower frequency limit imposed by the coupling capacitor. The bypass capacitors are needed because they bypass the emitters to ground. Without them, the voltage gain of each stage would be lost. These bypass capacitors also place a lower limit on the frequency response. As the frequency keeps decreasing, a point is reached at which capacitors no longer look like a.c. shorts. At this frequency the voltage gain starts to decrease because of the local feedback and the overall gain of the amplifier drops significantly. These amplifiers are suitable for frequencies above 10 Hz. Circuit: VDC = + 12V R1 100K R3 4.7K R6 100K R5 4.7K C2 C4 To Digital Storage Oscilloscope (DSO) Q1 C1 Signal Generator 10UFD 10UFD Q2 BC107A 1n BC107A A VOFF = 0V VAMPL = 20MV FREQ = 1KHZ R2 22K R4 220 A C3 10UFD B 0 R7 22K R8 220 C5 10UFD B 0 Fig. 2 Procedure: Page 6 of 26 1. Connect the circuit as shown in the diagram. 2. Apply a sinusoidal input signal of 20mv from a signal generator. 3. Connect the output to the DSO 4. Measure output voltage and calculate gain 5. Keeping the input voltage constant vary the input frequency and note the output voltage of the Amplifier till the output decrease upto a -3dB point. 6. Draw a graph between input frequency Vs output voltage Observation table Vin = 20mv S. No Frequency Output voltage Voltage Gain Voltage gain in dB 10 Hz 100 Hz 1k Hz 10 kHz 100 kHz 1MHz Result: 1. Voltage Gain …………………………. 2. Lower cut off Frequency …………………………… 3. Upper cut off Frequency ……………………………. 4. Bandwidth …………………………… 5. Gain Bandwidth Product ………………………….. Page 7 of 26 Experiment No. -3 Aim: To Plot the Frequency Response of a FET Common Source Amplifier find the following: 1. Voltage Gain 2. Lower cut off Frequency 3. Upper cut off Frequency 4. Bandwidth 5. Gain Bandwidth Product Apparatus: 1. Digital Storage Oscilloscope (DSO) 2. Power Supply 3. Bread Board 4. Signal Generator Component: Resistances: 8.2kΩ = 01, 4.7kΩ = 01, 470Ω = 01, 100Ω = 01 Capacitors: 10µf = 02, 100µf = 01 FET BFW 11 = 01 Connecting wire and DSO Probe Introduction When a small ac signal is coupled into the gate it produces variations in gate source voltage. This produces a sinusoidal drain current. Since an ac current flows through the drain resistor. An amplified ac voltage is obtained at the output. An increase in gate source voltage produces more drain current, which means that the drain voltage is decreasing. Since the positive half cycle of input voltage produces the negative half cycle of output voltage, we get phase inversion in a CS amplifier. The ac equivalent circuit is shown in fig. 1 Fig. 1 The ac output voltage is vout = - gm v gS RD Page 8 of 26 Negative sign means phase inversion. Because the ac source is directly connected between the gate source terminals therefore ac input voltage equals Vin = Vgs The voltage gain is given by Circuit: VDC = + 12V R1 8.2K R3 470 C2 To Digital Storage Oscilloscope (DSO) C1 FET 10UFD D BFW11 Signal Generator G 10UFD S A VOFF = 0V VAMPL = 20MV FREQ = 1KHZ R2 4.7K R4 100 C3 100UFD B 0 Procedure: 1. Connect the circuit as shown in the diagram. 2. Apply a sinusoidal input signal of 20mv from a signal generator. 3. Connect the output to the DSO 4. Measure output voltage and calculate gain 5. Keeping the input voltage constant vary the input frequency and note the output voltage of the Amplifier till the output decrease upto a -3dB point. 6. Draw a graph between input frequency Vs output voltage Page 9 of 26 Observation table Vin = 20mv S. No Frequency Output voltage Voltage Gain Voltage gain in dB 10 Hz 100 Hz 1k Hz 10 kHz 100 kHz 1MHz Result: 1. Voltage Gain …………………………. 2. Lower cut off Frequency …………………………… 3. Upper cut off Frequency ……………………………. 4. Bandwidth …………………………… 5. Gain Bandwidth Product …………………………… Page 10 of 26 Experiment No. -4 Aim: To study and calculate the input and output impedance of Darlington Amplifier and also calculate the amplification factor. Apparatus: 1. Power Supply 2. Bread Board 3. DMM Component: Resistances: 100Ω = 01 Transistor BC107 = 01 Transistor SL100 = 01 Connecting wire and DSO Probe Introduction Theory: consists of two emitter followers in cascaded mode as shown in fig. 1. The overall gain is close to unity. The main advantage of Darlington amplifier is very large increase in input impedance and an equal decrease in output impedance . Fig. 1 Page 11 of 26 Output impedance: The Thevenin impedance at the input is given by RTH = RS || R1 || R2 Similar to single stage common collector amplifier, the output impedance of the two stages zout(1) and zout(2) are given by. Therefore, t he output impedance of the amplifier is very small. Circuit: Darlington Trasistor Amplifier VDC= +12V C + VDC - C B Driver BC107A B E SL100 Vin E Output + R1 1k Vout Page 12 of 26 Procedure: 1. Connect the circuit as shown in diagram. 2. Connect the DC voltage source to the input of BC 107 transistor through a DMM connected in a ammeter mode. 3. Connect 100Ω resistance to the emitter , through another DMM connected as an ammeter 4. Adjust the input voltage to 5v and note down the reading of input current and output current. 5. Also measure the output voltage (voltage gain is less then 1) 6. With the value of ammeter , calculate the amplification factor of a transistor β1 7. Repeat same procedure for SL 100 transistor and find out the amplification factor of SL100, is β2 8. Now, connect dc voltage to the base of transistor BC107 , connect BC 107 emitter to base of SL100 and 100Ω resistance to SL 100 emitter , which form the Darlington circuit. 9. Measure the input current and voltage , output current and voltage. 10. Total current gain = β1× β2 11. Ration of input voltage and input current gives impedance and ration of output voltage and output current gives output impedance Result: 1. Amplification factor β1………………………………… 2. Amplification factor β2 ………………………………….. 3. Total current gain β1× β2 ……………………………… 4. Input impedance……………………………….. 5. output impedance…………………………….. Page 13 of 26 Experiment No. -5 Aim: To Study BJT Differential Amplifier and measure its CMRR Apparatus: 1. Digital Storage Oscilloscope (DSO) 2. Power Supply 3. Bread Board 4. Signal Generator 5. Multi meter Component: Resistances: 1kΩ = 02, 470Ω = 02, 5.6KΩ = 01, Transistor BC107 = 02 Connecting wire and DSO Probe Introduction A long tailed pair is a common design in electronics for implement a differential amplifier. Its amplifies the current with very little voltage gain. It consist of two bipolar junction transistor (BJT) , FET connected so that the BJT emitters or FET sources are connected together. The common electrode s are then connected to a large voltage source through a large resistor forming the long tail of the name the long tail providing an approximate constant current source. In more sophisticated designs a true (active ) constant current source may be substitute for a long tail. Connect in fashion , this gives the circuit two input which are differentially amplifies (Subtracted and multiplied) by the pair. The output may be a single ended or differential depended on the need of the subsequent circuitry. Circuit: Emitter Coupled Diffential Amplifier +12v R1 1k R2 1k VC1 out + BC107 R4 VDC 470 - VC2 out R5 470 BC107 V1 in V2 in R3 5.6k -12v Fig. 1 Page 14 of 26 Procedure: for DC characteristics 1. Connected the circuit as shown in figure. 2. Adjust the dc voltage of the voltage source to 0.15v with multi meter . 3. Connect DC voltage source output to one of the input terminals of the differential amplifier and short the other input to ground. 4. Measure the DC out put voltage between two collector of the differential amplifier with DMM 5. Calculate differential Gain AV output/ input 6. Now connect both the inputs together to the DC voltage source , and adjust the voltage to 2V 7. Again measure the DC output voltage between two collector out put of differential amplifier with DMM 8. Calculate the common mode gain AC output/input 9. With the above value calculate the CMMR = Ad/AC Procedure: for AC Characteristic 1. Adjust the AC voltage of the signal generator to 10mv RMS voltage (IKHz) 2. Connect signal generator out put to one of the input terminal of a differential amplifier and short the other input to ground. 3. Measure the AC output voltage between two collector output of a differential amplifier with DMM 4. Calculate the differential gain Ad = output/input 5. Now connect both input together to the signal generator , and adjust the voltage to 200mv 6. Again measure the AC output voltage between two collector outputs of the differential amplification with DMM 7. Calculate the common mode gain Ac output / input 8. With the above values calculate the CMRR = Differential gain / common mode gain Result: Differential gain :…………………………. Common mode gain………………………. CMRR :………………………………….. Page 15 of 26 Experiment No. -6 Aim: To Construct RC phase shift oscillator and to measure the output frequency Apparatus: 1. Digital Storage Oscilloscope (DSO) 2. Power Supply 3. Bread Board 4. Signal Generator 5. Multi meter Component: Resistances: 100kΩ = 01, 10kΩ = 01, 5.1KΩ = 01, 1kΩ = 04 Variable resistance = 10kΩ = 01 Transistor SL100 = 01 Capacitor 0.1ufd = 06 Connecting wire and DSO Probe Introduction Transistor Phase Shift Oscillator: At low frequencies (around 100 kHz or less), resistors and capacitors are usually employed to determine the frequency of oscillation. Fig shows transistorized phase shift oscillator circuit employing RC network. If the phase shift through the common emitter amplifier is 180°, then the oscillation may occur at the frequency where the RC network produces an additional 180° phase shift. Since a transistor is used as the active element, the output across R of the feedback network is shunted by the relatively low input resistance of the transistor, because input diode is a forward biased diode Hence, instead of employing voltage series feedback, voltage shunt feedback is used for a transistor phase shift oscillator. Circuit: +12V R2 100K R1 5.1k C2 B A signal generator Q1 C1 DSO 0.1uf d OUTPUT 0.1uf d BC107A V1 VAMPL = 20mv FREQ = 1kHz R3 10K R6 1k C3 0.1uf d 10K R5 Page 16 of 26 Fig.1 Feedback C4 0.1uf d C5 C6 0.1uf d 0.1uf d R7 1k R10 1k R11 1k +12V R2 100K R1 5.1k C2 B Q1 C1 0.1uf d 0.1uf d DSO OUTPUT BC107A R3 10K R6 1k C3 0.1uf d 10K R5 0 Fig.2 Procedure : 1. Connect the circuit diagram shown in fig.1 2. Apply a sine wave from a signal generator to the input terminal of the network and observe the out put of the circuit on DSO 3. Vary the frequency of the signal generator and find out the amplitude of output at each frequency. 4. Find the frequency of signal generator at which the output of circuit becomes 1/29of the input. 5. Also make sure that at this frequency the output and inputs of RC network are exactly 180o out of phase. 6. Now connect the circuit shown in fig.2 7. Observe the output of the RC phase shift oscillator 8. Adjust the variable resistance until we get undistorted output 9. Find frequency of the out put 10. Calculate the theoretical frequency by fo = 1/2Π√6RC Result: Compare both theoretical and practical frequencies Page 17 of 26 Page 18 of 26 Experiment No. -7 Aim: To study Wein Bridge Oscillator and to measure the output frequency Apparatus: 1. Digital Storage Oscilloscope (DSO) 2. Power Supply 3. Bread Board 4. Multi meter Component: Resistances: 10kΩ = 03, 2.7kΩ = 02, 100Ω = 01, 1kΩ = 03 Variable resistance = 1kΩ = 01 Transistor SL100 = 02 Capacitor 0.1ufd = 02, 47ufd = 03 Connecting wire and DSO Probe Theory Wien Bridge Oscillator: The Wien Bridge oscillator is a standard oscillator circuit for low to moderate frequencies, in the range 5Hz to about 1MHz. It is mainly used in audio frequency generators. The Wien Bridge oscillator uses a feedback circuit called a lead lag network as shown in fig 1 Fig.1 At very low frequencies, the series capacitor looks open to the input signal and there is no output signal. At very high frequencies the shunt capacitor looks shorted, and there is no output. In between these extremes, the output voltage reaches a maximum value. The frequency at which the output is maximized is called the resonant frequency. At this frequency, the feedback fraction reaches a maximum value of 1/3. At very low frequencies, the phase angle is positive, and the circuit acts like a lead network. On the other hand, at very high frequencies, the phase angle is negative, and the circuit acts like a lag network. In between, there is a resonant frequency fr at which the phase angle equals 0°. Page 19 of 26 Circuit: R9 1k +12V R10 1k R1 10k R3 100 C3 0.1uf d C1 C Q1 D E 0.1uf d R11 1k R5 15k B C2 47uf d Q2 SL100 R12 1k R2 2.7k R4 1k F R7 1k B 0.1uf d TO DSO SL100 R6 2.7k R8 1K C3 47uf d OUTPUT Feedback A 0 Fig.1 Procedure : 1. 2. 3. 4. 5. Connect the circuit diagram shown in fig.1 Observe the output of the Wein Bridge Oscillator Adjust the variable resistance until we get undistorted output Find frequency of the out put Calculate the theoretical frequency by fo = 1/2ΠRC Result: Compare both theoretical and practical frequencies Page 20 of 26 Experiment No. -8 Aim: To study Hartley and colpitts oscillator and to measure the output frequency Apparatus: 1. Digital Storage Oscilloscope (DSO) 2. Power Supply 3. Bread Board 4. Signal Generator 5. Multi meter Component: Resistances: 100kΩ = 01, 10kΩ = 01, 5.1KΩ = 01, 1kΩ = 04 Variable resistance = 10kΩ = 01 Transistor SL100 = 01 Capacitor 0.1ufd = 06 Connecting wire and DSO Probe Introduction Wein bridge and RC phase shift oscillator is not suited to high frequencies (above 1MHz). The main problem is the phase shift through the amplifier. The alternative is an LC oscillator, a circuit that can be used for frequencies between 1MHz and 500MHz.. With an amplifier and LC tank circuit, we can feedback a signal with the right amplitude and phase is feedback to sustain oscillations. shows the circuit of LC oscillator. The voltage divider bias sets up a quiescent operating point. The circuit then has a low frequency voltage gain of rc / r'e where rc is the ac resistance seen by the selector. Because of the base and collector lag networks, the high frequency voltage gain is less then rc / r'e. Circuit: Colpitt Oscillator +12V R3 5.1k 100K B C2 Q2 C1 C D 0.1uf d TO DSO SL100 0.1uf d R2 10K 2 R4 1k 0.1uf d 10mh OUTPUT 0.1uf d R5 0 1 .01uf d 1K A Fig.1 Page 21 of 26 Circuit: Hartley Oscillator +12V R3 5.1k 100K C 0.1uf d TO DSO SL100 10mh R2 10K 0.1uf d R4 1k 0.1uf d 10mh OUTPUT 0.1uf d 1 2 0 Q2 C1 2 B C2 D R5 1 A 1K Fig.2 Procedure: for colpitts oscillator 1. Connect the circuit diagram shown in fig.1 2. Observe the output of the colpitts Oscillator 3. Adjust the variable resistance until we get undistorted output 4. Find frequency of the out put 5. Calculate the theoretical frequency by fo = 1/√2ΠLC Result: Compare both theoretical and practical frequencies Procedure: Hartley oscillator 1. Connect the circuit diagram shown in fig.2 2. Observe the output of the Hartleys Oscillator 3. Adjust the variable resistance until we get undistorted output 4. Find frequency of the out put 5. Calculate the theoretical frequency by fo = 1/√2ΠLC Result: Compare both theoretical and practical frequencies Page 22 of 26 DELHI TECHNOLOGICAL UNIVERSITY ELECTRONICS & COMMUNICATION ENGG. DEPTT. ELECTRONICS DEVICES AND CIRCUITS- I LAB List of Experiments for Odd Semester 1. To become familiar with the operation of basic laboratory instruments 1. Power supply 2. Signal generator 3. Digital Storage Oscilloscope (DSO) 4. Multi meter 2. To study the active and passive Electronic components 3. To plot forward and reverse bias characteristics for PN Junction diode and Zener diode 4. To study and plot the input and out put characteristics of the given transistor in CB (common base) configuration. 5. To study and plot the input and out put characteristics of the given transistor in CE(common emitter) configuration. 6. To study and plot drain characteristics and transfer characteristics of JFET 7. To study and plot drain characteristics and transfer characteristics of N-Channel metal oxide semiconductor junction field effect transistor (MOSFET) 8. To study of rectifier circuits 1. Half wave rectifier 2. Full wave rectifier 3. Bridge rectifier and find ripple factor with different filter circuits 9. To study different clipping and clamping circuits Page 23 of 26 DELHI TECHNOLOGICAL UNIVERSITY ELECTRONICS & COMMUNICATION ENGG. DEPTT. ELECTRONICS DEVICES AND CIRCUITS- II LAB List of Experiments for Even Semester 1. To Plot the Frequency Response of a single stage RC Coupled Amplifier with feed back and without feedback and find the following: 1. Voltage Gain 2. Lower cut off Frequency 3. Upper cut off Frequency 4. Bandwidth 5. Gain Bandwidth Product 2. To Plot the Frequency Response of a Double stage RC Coupled Amplifier find the Following: 1. Voltage Gain 2. Lower cut off Frequency 3. Upper cut off Frequency 4. Bandwidth 5. Gain Bandwidth Product and loading effect 3. To Plot the Frequency Response of a FET Common Source Amplifier find the following: 1. Voltage Gain 2. Lower cut off Frequency 3. Upper cut off Frequency 4. Bandwidth 5. Gain Bandwidth Product 4. To study and calculate the input and output impedance of Darlington Amplifier and also calculate the amplification factor 5. To Study BJT Differential Amplifier and measure its CMRR 6. To Construct RC phase shift oscillator and to measure the output frequency 7. To study Wein Bridge Oscillator and to measure the output frequency 8. To study Hartley and colpitts oscillator and to measure the output frequency Page 24 of 26 DELHI TECHNOLOGICAL UNIVERSITY ELECTRONICS & COMMUNICATION ENGG. DEPTT. FOR ELECTRONICS DEVICES AND CIRCUITS- I LAB Mr. Alok Kumar Singh Lab In-charge Delhi Technological university Page 25 of 26 DELHI TECHNOLOGICAL UNIVERSITY ELECTRONICS & COMMUNICATION ENGG. DEPTT. FOR ELECTRONICS DEVICES AND CIRCUITS- II LAB Dr. Mrs. S.Indu Lab In-charge Delhi Technological University Page 26 of 26

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# Experiment No. -1 Aim: To Plot the Frequency Response of a single

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