Supporting Information X L14-02047R

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Supplementary information for:

Precision stress localization during mechanical harvesting of vertically oriented semiconductor micro and nanostructure arrays

M. M. Ombaba, LV. Jayaraman and M. S. Islam*

Northern California Nanotechnology Center and Electrical and Computer Engineering, University of California, One shields Avenue, Davis CA, 95616

Northern California Nanotechnology Center and Electrical and Computer Engineering, University of

California, One shields Avenue, Davis CA, 95616

A rough estimation of artifacts atop the integrated film was carried out by analyzing the SEM micrograph of 100 micropillar roots in order to determine any non-uniformities if any (demarcated by the orange triangle Figure 1a). The results were pixelated to indicate the visible and covered roots as illustrated in

Figure 1a. Conservatively, it is evident that over 90 % of the roots of the transferred micropillars were devoid of artifacts. Similarly, 100 micropits left behind after micropillar detachment as represented in

Figure 1c (within the marked rectangle) were examined for defects. It is clearly visible that a few uprooted micropillars were sheared off at slightly higher vertical points than their counterparts, leaving behind stumps rather than micropits. This result was pixelated as shown in Figure 1d wherein over 95% of the pits exhibit striking similarity with each other. Nonetheless our result is a tremendous improvement over substrates separated from their roots by mechanical cutting, 1 chemical cutting 2 and by ultrasonication.

3

Fig S1. (a) SEM image of the integrated PS film, (b) A pixelated graph of the PS embedded micropillars within the orange boundary of the SEM in 1a. (c) SEM image of the mother substrate. (d) A pixelated graph of the PS embedded micropillars within the orange boundary of the SEM.

Simulations were conducted using COMSOL 4.2. Software. The experimental set-up for the simulation conducted on the PS block embedded Si microwire. A physical constraint was imposed on the base of silicon.

Fig.S2. Schematic of geometrical and mechanical stress simulation conditions applied to illustrate the von

Mises surface force distribution along a single Si microwire fully embedded in A PS block. A gap of

10nm was left between PS and Si mother substrate.

When the microwire diameter was decreased from 3 to 2 and 1.5, full structural transfer was possible as illustrated below in Fig.S3 below.

Fig S3. SEM images of (substrate showing on microwire atop a silicon substrate. (b-c) Transferred silicon microwires embedded in polystyrene (d) 2

 m thick wires, 33

 m long structures embedded in PS.

(e,f) The mother wafer after structural transfer, notice that its.0.5 mm in length and no discernible defects are present. In all the SEM, there is a significantly large number of dust on the substrates due to poor samples.

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